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At least 19 records

LabVIEW Interface for PCI-SpaceWire Interface Card

This software provides a LabView interface to the NT drivers for the PCISpaceWire card, which is a peripheral component interface (PCI) bus interface that conforms to the IEEE-1355/ SpaceWire standard. As SpaceWire grows in popularity, the ability to use SpaceWire links within LabVIEW will be important to electronic ground support equipment vendors. In addition, there is a need for a high-level LabVIEW interface to the low-level device- driver software supplied with the card. The LabVIEW virtual instrument (VI) provides graphical interfaces to support all (1) SpaceWire link functions, including message handling and routing; (2) monitoring as a passive tap using specialized hardware; and (3) low-level access to satellite mission-control subsystem functions. The software is supplied in a zip file that contains LabVIEW VI files, which provide various functions of the PCI-SpaceWire card, as well as higher-link-level functions. The VIs are suitably named according to the matching function names in the driver manual. A number of test programs also are provided to exercise various functions.

Lux, James↗

PCI: A PATRAN-NASTRAN model translator

The amount of programming required to develop a PATRAN-NASTRAN translator was surprisingly small. The approach taken produced a highly flexible translator comparable with the PATNAS translator and superior to the PATCOS translator. The coding required varied from around ten lines for a shell element to around thirty for a bar element, and the time required to add a feature to the program is typically less than an hour. The use of a lookup table for element names makes the translator also applicable to other versions of NASTRAN. The saving in time as a result of using PDA's Gateway utilities was considerable. During the writing of the program it became apparent that, with a somewhat more complex structure, it would be possible to extend the element data file to contain all data required to define the translation from PATRAN to NASTRAN by mapping of data between formats. Similar data files on property, material and grid formats would produce a completely universal translator from PATRAN to any FEA program, or indeed any CAE system.

Sheerer, T. J.↗

Reconfigurable Processing Module

To accommodate a wide spectrum of applications and technologies, NASA s Exploration System's Missions Directorate has called for reconfigurable and modular technologies to support future missions to the moon and Mars. In response, Langley Research Center is leading a program entitled Reconfigurable Scaleable Computing (RSC) that is centered on the development of FPGA-based computing resources in a stackable form factor. This paper details the architecture and implementation of the Reconfigurable Processing Module (RPM), which is the key element of the RSC system. The RPM is an FPGA-based, space-qualified printed circuit assembly leveraging terrestrial/commercial design standards into the space applications domain. The form factor is similar to, and backwards compatible with, the PCI-104 standard utilizing only the PCI interface. The size is expanded to accommodate the required functionality while still better than 30% smaller than a 3U CompactPCI(TradeMark)card and without the overhead of the backplane. The architecture is built around two FPGA devices, one hosting PCI and memory interfaces, and another hosting mission application resources; both of which are connected with a high-speed data bus. The PCI interface FPGA provides access via the PCI bus to onboard SDRAM, flash PROM, and the application resources; both configuration management as well as runtime interaction. The reconfigurable FPGA, referred to as the Application FPGA - or simply "the application" - is a radiation-tolerant Xilinx Virtex-4 FX60 hosting custom application specific logic or soft microprocessor IP. The RPM implements various SEE mitigation techniques including TMR, EDAC, and configuration scrubbing of the reconfigurable FPGA. Prototype hardware and formal modeling techniques are used to explore the performability trade space. These models provide a novel way to calculate quality-of-service performance measures while simultaneously considering fault-related behavior due to SEE soft errors.

Somervill, Kevin↗

Flexible Peripheral Component Interconnect Input/Output Card

The Flexible Peripheral Component Interconnect (PCI) Input/Output (I/O) Card is an innovative circuit board that provides functionality to interface between a variety of devices. It supports user-defined interrupts for interface synchronization, tracks system faults and failures, and includes checksum and parity evaluation of interface data. The card supports up to 16 channels of high-speed, half-duplex, low-voltage digital signaling (LVDS) serial data, and can interface combinations of serial and parallel devices. Placement of a processor within the field programmable gate array (FPGA) controls an embedded application with links to host memory over its PCI bus. The FPGA also provides protocol stacking and quick digital signal processor (DSP) functions to improve host performance. Hardware timers, counters, state machines, and other glue logic support interface communications. The Flexible PCI I/O Card provides an interface for a variety of dissimilar computer systems, featuring direct memory access functionality. The card has the following attributes: 8/16/32-bit, 33-MHz PCI r2.2 compliance, Configurable for universal 3.3V/5V interface slots, PCI interface based on PLX Technology's PCI9056 ASIC, General-use 512K 16 SDRAM memory, General-use 1M 16 Flash memory, FPGA with 3K to 56K logical cells with embedded 27K to 198K bits RAM, I/O interface: 32-channel LVDS differential transceivers configured in eight, 4-bit banks; signaling rates to 200 MHz per channel, Common SCSI-3, 68-pin interface connector.

Bigelow, Kirk K.↗

Stackable Form-Factor Peripheral Component Interconnect Device and Assembly

A stackable form-factor Peripheral Component Interconnect (PCI) device can be configured as a host controller or a master/target for use on a PCI assembly. PCI device may comprise a multiple-input switch coupled to a PCI bus, a multiplexor coupled to the switch, and a reconfigurable device coupled to one of the switch and multiplexor. The PCI device is configured to support functionality from power-up, and either control function or add-in card function.

Somervill, Kevin M.↗

Energy Efficient Microlith-Based Catalytic Reactor and Recuperator for Air Quality Control Applications

Precision Combustion, Inc. (PCI) and NASA’s Marshall Space Flight Center (MSFC) have been developing, characterizing, and optimizing high temperature catalytic oxidizers (HTCO) based on PCI’s patented Microlith technology to meet the requirements of future extended human spaceflight explorations. Previous efforts focused on integrating PCI’s HTCO unit with a compact, simple recuperative heat exchanger to reduce the overall system size and weight. Significant improvement was demonstrated over traditional approaches of integrating the HTCO with an external recuperative heat exchanger. While the critical target performance metrics were achieved, the thermal effectiveness of PCI’s recuperator remained a potential area of improvement to further reduce the energy requirements of the integrated system. Using the same material combinations and an improved recuperator design, the redesigned prototype has experimentally demonstrated 20 – 30% reduction (flow dependent) in steady state power consumption compared to the earlier prototype without compromising the destruction efficiency of methane and volatile organic compounds (VOCs). Moreover, design modifications and improvements allow our redesigned prototype to be more easily manufactured compared to traditional brazed plate-fin recuperator designs. The redesigned prototype was delivered to MSFC for validation testing. Here, we report and discuss the performance of the improved prototype HTCO unit with a high efficiency recuperative heat exchanger based on testing at PCI and MSFC. The device is expected to provide a reliable and robust means of disposing of trace levels of methane and VOCs by oxidizing them into carbon dioxide and water in order to maintain clean air in enclosed spaces, such as crewed spacecraft cabins.

Vilekar, Saurabh A.↗

The Communication Link and Error ANalysis (CLEAN) simulator

During the period July 1, 1993 through December 30, 1993, significant developments to the Communication Link and Error ANalysis (CLEAN) simulator were completed and include: (1) Soft decision Viterbi decoding; (2) node synchronization for the Soft decision Viterbi decoder; (3) insertion/deletion error programs; (4) convolutional encoder; (5) programs to investigate new convolutional codes; (6) pseudo-noise sequence generator; (7) soft decision data generator; (8) RICE compression/decompression (integration of RICE code generated by Pen-Shu Yeh at Goddard Space Flight Center); (9) Markov Chain channel modeling; (10) percent complete indicator when a program is executed; (11) header documentation; and (12) help utility. The CLEAN simulation tool is now capable of simulating a very wide variety of satellite communication links including the TDRSS downlink with RFI. The RICE compression/decompression schemes allow studies to be performed on error effects on RICE decompressed data. The Markov Chain modeling programs allow channels with memory to be simulated. Memory results from filtering, forward error correction encoding/decoding, differential encoding/decoding, channel RFI, nonlinear transponders and from many other satellite system processes. Besides the development of the simulation, a study was performed to determine whether the PCI provides a performance improvement for the TDRSS downlink. There exist RFI with several duty cycles for the TDRSS downlink. We conclude that the PCI does not improve performance for any of these interferers except possibly one which occurs for the TDRS East. Therefore, the usefulness of the PCI is a function of the time spent transmitting data to the WSGT through the TDRS East transponder.

Ebel, William J.↗

Determination of an Optimal Commercial Data Bus Architecture for a Flight Data System

NASA/Marshall Space Flight Center (MSFC) is continually looking for methods to reduce cost and schedule while keeping the quality of work high. MSFC is NASA's lead center for space transportation and microgravity research. When supporting NASA's programs several decisions concerning the avionics system must be made. Usually many trade studies must be conducted to determine the best ways to meet the customer's requirements. When deciding the flight data system, one of the first trade studies normally conducted is the determination of the data bus architecture. The schedule, cost, reliability, and environments are some of the factors that are reviewed in the determination of the data bus architecture. Based on the studies, the data bus architecture could result in a proprietary data bus or a commercial data bus. The cost factor usually removes the proprietary data bus from consideration. The commercial data bus's range from Versa Module Eurocard (VME) to Compact PCI to STD 32 to PC 104. If cost, schedule and size are prime factors, VME is usually not considered. If the prime factors are cost, schedule, and size then Compact PCI, STD 32 and PC104 are the choices for the data bus architecture. MSFC's center director has funded a study from his discretionary fund to determine an optimal low cost commercial data bus architecture. The goal of the study is to functionally and environmentally test Compact PCI, STD 32 and PC 104 data bus architectures. This paper will summarize the results of the data bus architecture study.

Crawford, Kevin↗

High-Rate Digital Receiver Board

A high-rate digital receiver (HRDR) implemented as a peripheral component interface (PCI) board has been developed as a prototype of compact, general-purpose, inexpensive, potentially mass-producible data-acquisition interfaces between telemetry systems and personal computers. The installation of this board in a personal computer together with an analog preprocessor enables the computer to function as a versatile, highrate telemetry-data-acquisition and demodulator system. The prototype HRDR PCI board can handle data at rates as high as 600 megabits per second, in a variety of telemetry formats, transmitted by diverse phase-modulation schemes that include binary phase-shift keying and various forms of quadrature phaseshift keying. Costing less than $25,000 (as of year 2003), the prototype HRDR PCI board supplants multiple racks of older equipment that, when new, cost over $500,000. Just as the development of standard network-interface chips has contributed to the proliferation of networked computers, it is anticipated that the development of standard chips based on the HRDR could contribute to reductions in size and cost and increases in performance of telemetry systems.

Ghuman, Parminder↗

Personality based clusters as predictors of aviator attitudes and performance

The feasibility of identification of personality-based population clusters was investigated along with the relationships of these subpopulations to relevant attitude and performance measures. The results of instrumental and expressive personality tests, using the Personal Characteristics Inventory (PCI) test battery and the Cockpit Management Attitudes Questionnaire, suggest that theoretically meaningful subpopulations exist among aviators, and that these groupings are useful in understanding of personality factors acting as moderator variables in the determination of aviator attitudes and performance. Out of the three clusters most easily described in terms of their relative elevations on the PCI subscales ('the right stuff', the 'wrong stuff', and the 'no stuff'), the members of the right stuff cluster tended to have more desirable patterns of responses along relevant attitudinal dimensions.

Gregorich, Steve↗

GSFC Cutting Edge Avionics Technologies for Spacecraft

With the launch of NASA's first fiber optic bus on SAMPEX in 1992, GSFC has ushered in an era of new technology development and insertion into flight programs. Predating such programs the Lewis and Clark missions and the New Millenium Program, GSFC has spearheaded the drive to use cutting edge technologies on spacecraft for three reasons: to enable next generation Space and Earth Science, to shorten spacecraft development schedules, and to reduce the cost of NASA missions. The technologies developed have addressed three focus areas: standard interface components, high performance processing, and high-density packaging techniques enabling lower cost systems. To realize the benefits of standard interface components GSFC has developed and utilized radiation hardened/tolerant devices such as PCI target ASICs, Parallel Fiber Optic Data Bus terminals, MIL-STD-1773 and AS1773 transceivers, and Essential Services Node. High performance processing has been the focus of the Mongoose I and Mongoose V rad-hard 32-bit processor programs as well as the SMEX-Lite Computation Hub. High-density packaging techniques have resulted in 3-D stack DRAM packages and Chip-On-Board processes. Lower cost systems have been demonstrated by judiciously using all of our technology developments to enable "plug and play" scalable architectures. The paper will present a survey of development and insertion experiences for the above technologies, as well as future plans to enable more "better, faster, cheaper" spacecraft. Details of ongoing GSFC programs such as Ultra-Low Power electronics, Rad-Hard FPGAs, PCI master ASICs, and Next Generation Mongoose processors.

Luers, Philip J.↗

PiVoT GPS Receiver

NASA Goddard Space Flight Center has built an open architecture, 24 channel spaceflight Global Positioning System (GPS) receiver. The compact PCI PiVoT GPS receiver card is based on the Mitel/GEC Plessey Builder 2 board. PiVoT uses two Plessey 2021 correlators to allow tracking of up to 24 separate GPS SV's on unique channels. Its four front ends can support four independent antennas, making it a useful card for hosting GPS attitude determination algorithms. It has been built using space quality, radiation tolerant parts. The PiVoT card works at a lower signal to noise ratio than the original Builder 2 board. It also hosts an improved clock oscillator. The PiVoT software is based on the original Piessey Builder 2 software ported to the Linux operating system. The software is posix compliant and can be easily converted to other posix operating systems. The software is open source to anyone with a licensing agreement with Plessey. Additional tasks can be added to the software to support GPS science experiments or attitude determination algorithms. The next generation PiVoT receiver will be a single radiation hardened compact PCI card containing the microprocessor and the GPS receiver optimized for use above the GPS constellation.

Wennersten, Miriam↗

It's a Clean Machine

Under an SBIR (Small Business Innovative Research) from Lewis Research Center, Precision Combustion, Inc. (PCI) developed the Advanced Technology Catalytic Combustor. The research proved the viability of efficient, cost-effective catalytic reduction of gas turbine nitrogen oxide emissions along with fuel efficiency. PCI has signed agreements with Westinghouse, other gas turbine manufacturers, including Capstone Turbine Corporation to develop a catalytic combustor for their hybrid electric vehicle.

Source record↗

Compact, Lightweight Adsorber and Sabatier Reactor for CO2 Capture and Reduction for Consumable and Propellant Production

The utilization of CO2 to produce (or recycle) life support consumables, such as O2 and H2O, and to generate propellant fuels is an important aspect of NASA's concept for future, long duration planetary exploration. One potential approach is to capture and use CO2 from the Martian atmosphere to generate the consumables and propellant fuels. Precision Combustion, Inc. (PCI), with support from NASA, continues to develop its regenerable adsorber technology for capturing CO2 from gaseous atmospheres (for cabin atmosphere revitalization and in-situ resource utilization applications) and its Sabatier reactor for converting CO2 to methane and water. Both technologies are based on PCI's Microlith(R) substrates and have been demonstrated to reduce size, weight, and power consumption during CO2 capture and methanation process. For adsorber applications, the Microlith substrates offer a unique resistive heating capability that shows potential for short regeneration time and reduced power requirements compared to conventional systems. For the Sabatier applications, the combination of the Microlith substrates and durable catalyst coating permits efficient CO2 methanation that favors high reactant conversion, high selectivity, and durability. Results from performance testing at various operating conditions will be presented. An effort to optimize the Sabatier reactor and to develop a bench-top Sabatier Development Unit (SDU) will be discussed.

Junaedi, Christian↗

Microlith-based Structured Sorbent for Carbon Dioxide, Humidity, and Trace Contaminant Control in Manned Space Habitats

To support continued manned space exploration, the development of atmosphere revitalization systems that are lightweight, compact, durable, and power efficient is a key challenge. The systems should be adaptable for use in a variety of habitats and should offer operational functionality to either expel removed constituents or capture them for closedloop recovery. As mission durations increase and exploration goals reach beyond low earth orbit, the need for regenerable adsorption processes for continuous removal of CO2 and trace contaminants from cabin air becomes critical. Precision Combustion, Inc. (PCI) and NASA Marshall (MSFC) have been developing an Engineered Structured Sorbents (ESS) approach based on PCI s patented Microlith technology to meet the requirements of future, extended human spaceflight explorations. This technology offers the inherent performance and safety attributes of zeolite and other sorbents with greater structural integrity, regenerability, and process control, thereby providing potential durability and efficiency improvements over current state-of-the-art systems. The major advantages of the ESS explored in this study are realized through the use of metal substrates to provide structural integrity (i.e., less partition of sorbents) and enhanced thermal control during the sorption process. The Microlith technology also offers a unique internal resistive heating capability that shows potential for short regeneration time and reduced power requirement compared to conventional systems. This paper presents the design, development, and performance results of the integrated adsorber modules for removing CO2, water vapor, and trace chemical contaminants. A related effort that utilizes the adsorber modules for sorption of toxic industrial chemicals is also discussed. Finally, the development of a 4-person two-leg ESS system for continuous CO2 removal is also presented.

Junaedi, Christian↗

CO2 Reduction Assembly Prototype Using Microlith-Based Sabatier Reactor for Ground Demonstration

The utilization of CO2 to produce life support consumables, such as O2 and H2O, via the Sabatier reaction is an important aspect of NASA's cabin Atmosphere Revitalization System (ARS) and In-Situ Resource Utilization (ISRU) architectures for both low-earth orbit and long-term manned space missions. Carbon dioxide can be reacted with H2, obtained from the electrolysis of water, via Sabatier reaction to produce methane and H2O. Methane can be stored and utilized as propellant while H2O can be either stored or electrolyzed to produce oxygen and regain the hydrogen atoms. Depending on the application, O2 can be used to replenish the atmosphere in human-crewed missions or as an oxidant for robotic and return missions. Precision Combustion, Inc. (PCI), with support from NASA, has previously developed an efficient and compact Sabatier reactor based on its Microlith® catalytic technology and demonstrated the capability to achieve high CO2 conversion and CH4 selectivity (i.e., ≥90% of the thermodynamic equilibrium values) at high space velocities and low operating temperatures. This was made possible through the use of high-heat-transfer and high-surface-area Microlith catalytic substrates. Using this Sabatier reactor, PCI designed, developed, and demonstrated a stand-alone CO2 Reduction Assembly (CRA) test system for ground demonstration and performance validation. The Sabatier reactor was integrated with the necessary balance-of-plant components and controls system, allowing an automated, single "push-button" start-up and shutdown. Additionally, the versatility of the test system prototype was demonstrated by operating it under H2-rich (H2/CO2 of >4), stoichiometric (ratio of 4), and CO2-rich conditions (ratio of <4) without affecting its performance and meeting the equilibrium-predicted water recovery rates. In this paper, the development of the CRA test system for ground demonstration will be discussed. Additionally, the performance results from testing the system at various operating conditions and the results from durability testing will be presented.

Junaedi, Christian↗

Microlith-Based Catalytic Reactor for Air Quality and Trace Contaminant Control Applications

Traditionally, gaseous compounds such as methane, carbon monoxide, and trace contaminants have posed challenges for maintaining clean air in enclosed spaces such as crewed spacecraft cabins as they are hazardous to humans and are often difficult to remove by conventional adsorption technology. Catalytic oxidizers have provided a reliable and robust means of disposing of even trace levels of these compounds by converting them into carbon dioxide and water. Precision Combustion, Inc. (PCI) and NASA - Marshall (MSFC) have been developing, characterizing, and optimizing high temperature catalytic oxidizers (HTCO) based on PCI's patented Microlith® technology to meet the requirements of future extended human spaceflight explorations. Current efforts have focused on integrating the HTCO unit with a compact, simple recuperative heat exchanger to reduce the overall system size and weight while also reducing its energy requirements. Previous efforts relied on external heat exchangers to recover the waste heat and recycle it to the oxidizer to minimize the system's power requirements; however, these units contribute weight and volume burdens to the overall system. They also result in excess heat loss due to the separation of the HTCO and the heat recuperator, resulting in lower overall efficiency. Improvements in the recuperative efficiency and close coupling of HTCO and heat recuperator lead to reductions in system energy requirements and startup time. Results from testing HTCO units integrated with heat recuperators at a variety of scales for cabin air quality control and heat melt compactor applications are reported and their benefits over previous iterations of the HTCO and heat recuperator assembly are quantified in this paper.

Vilekar, Saurabh↗