Search NASA⌕ Search

SEARCH · Search NASA

Results for “PLL Reference”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

An integer- N frequency synthesizer for flexible on-chip clock generation

A low-power integer-N frequency synthesizer for flexible on-chip clock generation has been designed in a 65 nm CMOS process. The circuit can be programmed to generate two independent low-jitter clocks between 30 MHz and 3 GHz that are locked to a 10–50 MHz reference input. The design uses a phase-locked loop (PLL) with a dual-tuned LC voltage-controlled oscillator (VCO), programmable feedback divider, and dual output dividers. The total power consumption from 1.2 V and 0.8 V supplies is 4.0 mW. In conclusion, experimental results confirm the functionality of the proposed synthesizer over a wide range of output frequencies.

47 OTHER INSTRUMENTATION↗

Time Disciplined Non-PLL Active Synchronization for Grid Forming Inverters

Two major issues facing grid-forming inverters are synchronism and phase reference inaccuracies. Prior literature has addressed these problems with solutions such as disciplining the phase reference using GPS and active synchronization modes but these methods have not yet been integrated together. This paper serves to unite solutions and develop a means for an inverter to remain synchronized and grid-forming without phase reference inaccuracies through a novel time-disciplined active synchronization phase reference. Further, this work expands upon prior literature on active synchronization to include black-start capabilities. Finally, the time disciplined phase reference is evaluated in Simulink as a grid-forming inverter capable of any synchronization circumstance and assessed by key metrics from modern standards.

blackstart↗

Single Stage PLL-less Decoupled Active and Reactive Power Control for Weak Grid Interactive Inverters

This paper presents a single stage phase locked loop-less (PLL-less) active and reactive power (PQ) control for single-phase weak grid interactive inverters. The absence of the PLL requirement in the proposed PQ control enhances the stability margin comparing to conventional current control approaches in both the stationary or the synchronous reference frame. Additionally, the proposed control scheme enables direct PQ control with a single loop control structure. This paper demonstrates that the proposed PLL-less PQ control scheme is asymptotically stable if the controller gains are positive. The necessary conditions for supplying the rated active power into the weak grid are derived. The provided analysis shows that certain amount of reactive power injection is necessary to avoid point of common coupling (PCC) voltage collapse when the rated active power is injected into the weak grid. Several case studies are provided to demonstrate the performance of the proposed PLL-less PQ control scheme under weak grid condition.

Khan, Ahmad↗

A 24-Channel Digitizer With a JESD204B-Compliant Serial Interface for High-Speed Detectors

In this report a 24-channel application-specific integrated circuit (ASIC) for the readout of high-speed CMOS active pixel sensors for charged particle detection is presented. The chip comprises 24 preamplifiers, 24 distinct 12-bit, 25 MSPS Pipelined analog-to-digital converters (ADCs) with self-calibration, an internal phase-locked loop (PLL), and a 3 Gbps serial interface that conforms to the JESD204B standard. To simplify interfacing with a variety of sensors, the ASIC also includes an automatic offset calibration loop. The high level of integration of the ASIC reduces overall system cost and area, and exploiting the signal characteristics of the image sensor allows the ADC to be optimized for reduced power dissipation. The use of an integrated serializer and an industry standard protocol simplifies integration of the ASIC into a complete camera system. The ASIC, called the High-Speed Image Preprocessor Targeted for Electron Readout, or HIPSTER, with a die area of 64.26 mm 2 , is packaged in a 480-ball grid array (BGA) and is fabricated in 180-nm CMOS technology. HIPSTER achieves typical differential nonlinearity (DNL) < 0.55 LSB, input-referred thermal noise of $114.5 μV-rms, and a bit error rate (BER) of better than 10-14. The power dissipation is 98 mW/channel.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Unified Universal Control and Coordination of Inverter-Based Resources, and Validation for a PV + Battery Hybrid Plant

As renewable energy deployment grows, hybrid power plants (HPPs) combining photovoltaic (PV) and battery systems must evolve to offer both energy and grid stability services. These systems typically include a mix of grid-following (GFL) and grid-forming (GFM) inverters, presenting unique coordination and control challenges. This Department of Energy–funded project developed and validated a Unified Universal Control and Coordination (UUCC) framework for such PV + battery hybrid plants, enabling seamless and stable operation, including ultrafast black start, autonomous synchronization, and robust frequency and voltage regulation, under different grid conditions. The project significantly advanced the understanding of inverter-based resource (IBR) control by developing and validating three complementary system-level approaches for hybrid GFL/GFM operation: 1. A combined Virtual Resistance (VR)-based GFL and Virtual Oscillator Control (VOC)-based GFM method, where each inverter type is governed by a specialized control strategy. Together, these achieve stable, fast-response coordination, eliminating inrush current and enabling smooth black start and grid synchronization across a wide range of grid strengths. 2. A Deadbeat-based UUCC strategy, which uses discrete-time, switching-cycle-level control for both GFL and GFM inverters. This approach replaces traditional PI/PLL control with a control parameter-free, high-bandwidth framework that supports stable LVRT and instantaneous synchronization under all conditions. 3. A benchmark comparison with Siemens’ commercial GFM microgrid controller, which provided a fast baseline platform. The commercial approach decoupled v & f control was implemented on a commercial microgrid controller.The baseline commercial benchmark helped highlight superior transient response and black start performance offered by the deadbeat and VOC approaches. These technical contributions offer substantial improvements over conventional inverter control schemes, which often rely on slow phase-locked loop (PLL)-based synchronization, require careful control parameters tuning, and prone to unstable in weak grids with GFL inverters and in stiff grid with GFM inverters therefore challenging for hybrid GFL+GFM under all grid conditions. The deadbeat-based UUCC framework enables simpler, faster, and more robust operation of hybrid IBR systems using wide-bandgap (WBG) devices such as SiC power semiconductors. The rapid expansion of hybrid distributed energy resources (DERs), including residential and commercial PV-BESS installations such as Tesla Powerwall, PV with vehicle-to-grid (V2G) capability, and other integrated configurations, presents complex operational challenges for medium-voltage radial distribution feeders. These networks are subject to frequent disturbances such as faults, switching operations, rapid reclosing sequences, and feeder reconfigurations, all of which introduce dynamic stress on IBRs. In addition, planned feeder segmentation and deliberate islanding for resilience will require DERs that can autonomously perform blackstart, establish voltage and frequency references, and resynchronize with the main grid. The advanced deadbeat-based UUCC control and blackstart functionalities developed in this project directly address these requirements, enabling decentralized and autonomous operation of inverter-dominated DERs in distribution systems under a wide range of fault and reconfiguration scenarios. From a public benefit perspective, these innovations enable more reliable and cost-effective integration of renewable energy into distribution networks. The ability to autonomously black start and stabilize grids under varying grid conditions support accelerates recovery from outages and support decentralized resilient energy systems. By reducing system complexity and improving performance, this project lays critical groundwork for future inverter-dominated power grids that are clean, reliable, and accessible to all.

14 SOLAR ENERGY↗