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Viewgraphs on the development of the Radiation-Hardened Re-programmable Field-Programmable Gate Array (RHrFPGA) are presented. The topics include: 1) Radiation Test Suite; 2) Testing Interface; 3) Test Configuration; 4) Facilities; 5) Test Programs; 6) Test Procedure; and 7) Test Results. A summary of heavy ion and proton testing is also included.
A pressure ramp programmer model was designed, fabricated and tested. This model, in conjunction with an automatic blood pressure monitor, automatically controls the pressure in the blood pressure monitor arterial cuff. The cuff pressurization cycle is designed to maximize accuracy and repeatability of blood pressure measurements. The key feature of this automatic cycle is rapid blood pressure cuff bleed down from an initial setting until systolic (diastolic) pressure is encountered followed by a short repressurization and slow bleed, long enough to permit accurate systolic (diastolic) pressure determination. The system includes a pressure reservoir which bleeds the cuff through a precision needle valve; a solenoid valve which permits rapid pressurization from the reservoir; and a pressure sensor which provides information for bleed rate and set point controls. Korotkoff sound signals from a microphone in the blood pressure cuff (not part of the system) provide decision information to the digital control system. The system completed a series of engineering tests using simulated Korotkoff sound inputs. The system performed successfully in all cases and was stable over an extended period of time.
There are no author-identified significant results in this report.
This document is a set of guidelines to aid a programmer in making the various decisions necessary for a clear user-programmer dialogue. Its goal is to promote an effective and efficient transfer of information between programmer and user. These guidelines are divided into four sections: (1) Format, (2) Sequence, (3) Audience, and (4) Aim. Format, in terms of this study, means the spatial and structural presentation of information. Sequence deals with the procedural aspects of multiple panel displays. This section looks at the issues of timelines of presentation, modularization of information, and patterns of user behavior. Audience looks at the relationship among programmer, user, and message. It covers the issues of analyzing the audience's knowledge, attitudes, and needs, anticipating the audience's inferences, and identifying textual ambiguities. The programmer's aim or intention shows up in everything from tone to format. Aim considers the programmer's purpose.
A special-purpose desk has been designed to facilitate collaboration by two computer programmers sharing one desktop computer or computer terminal. The impetus for the design is a trend toward what is known in the software industry as extreme programming an approach intended to ensure high quality without sacrificing the quantity of computer code produced. Programmers working in pairs is a major feature of extreme programming. The present desk design minimizes the stress of the collaborative work environment. It supports both quality and work flow by making it unnecessary for programmers to get in each other s way. The desk (see figure) includes a rotating platform that supports a computer video monitor, keyboard, and mouse. The desk enables one programmer to work on the keyboard for any amount of time and then the other programmer to take over without breaking the train of thought. The rotating platform is supported by a turntable bearing that, in turn, is supported by a weighted base. The platform contains weights to improve its balance. The base includes a stand for a computer, and is shaped and dimensioned to provide adequate foot clearance for both users. The platform includes an adjustable stand for the monitor, a surface for the keyboard and mouse, and spaces for work papers, drinks, and snacks. The heights of the monitor, keyboard, and mouse are set to minimize stress. The platform can be rotated through an angle of 40 to give either user a straight-on view of the monitor and full access to the keyboard and mouse. Magnetic latches keep the platform preferentially at either of the two extremes of rotation. To switch between users, one simply grabs the edge of the platform and pulls it around. The magnetic latch is easily released, allowing the platform to rotate freely to the position of the other user
NASA ARC's Coded Structures Laboratory (CSL) is developing autonomous construction, maintenance, and reconfiguration technologies to meet long-duration and deep space infrastructure needs, in accordance with long-term NASA goals of "in-space reliance" and "mass-less exploration." We seek to achieve these capabilities by utilizing a "programmable meta-material" approach that integrates emerging advances in materials (mechanical meta-materials), manufacturing (cooperative mobile robotics), and autonomy (multi-agent planning algorithms). Through the ARMADAS project, we have shown assembly of high-performance engineered cellular materials using multiple cooperating mobile robotic assemblers. In this paper, we describe how such a programmable meta-material architecture may shift the paradigm of how we design, build, manufacture, and operate future space infrastructure and assets. The core of a programmable meta-material architecture consists of 3 main technology sub-areas: the structure, the assembly agents, and the assembly algorithms. We co-design these systems to ensure an adaptable system that can create and reconfigure structures from a base set of building block components. From this core technology, we can branch out and expand the capability of the system through additional secondary component types and robotic agents to perform activities such as inspections, maintenance, repair, payload installation, or perform power and communications interconnect. As these technologies mature, future designers will be able to utilize the system to rapidly integrate and operate assets in space or on planetary surfaces from a set of well-tested part library, or create their own modules to integrate into the system. A core trait to the development of this system is the automation approach. Because of the modular and functional discrete (pixel-like) nature of the structural system, a diverse set of powerful algorithms for analysis, planning, and simulation can be adapted and leveraged to optimize construction, maintenance, and dynamic reorganization (as hardware with programmable form and function). With an ability to free the design space from launch vehicle constraints and fundamentally shift how a mission is designed and conducted, we discuss the influence of a programmable meta-material architecture on mission design, build, and operations. For the "design phase", we discuss project lifecycle effects, costs, time, and performance. For the "build phase", we discuss reusability, ISRU, manufacturing, material logistics, and scalability. And for "operations", we discuss autonomy, maintenance and upgrades, reliability, and reconfiguration. Autonomy and modularity are the primary enabling traits of this system. Engineering systems that utilize a modular and reconfiguration building block approach such as digital communication and computation systems, currently lead all other areas of technology in size and complexity scalability. NASA is extending the benefits and flexibility of digital systems to hardware systems, to optimize materials lifecycle management and expand our space exploration mission capabilities.
Misaligned incentives lead to reduced interaction between scientists and programmers on modern NASA science data-product development teams. Typically, situations arise where the scientist is not incentivized to learn modern coding practices and the programmer does not understand the science algorithms in the code. A programmer is responsible for the deliverable code thus setting a tradeoff between the desire for code improvement versus fear of compromising the integrity of data-product while the scientist continues to rely on their legacy codebases owing to the complexity of using the delivered code outside the processing environment and lack of validation modules. The NASA/CERES-TISA project has adopted a collaborative approach, with scientists and programmers both utilizing the same software repository with multiple branches, some optimized for delivery to a processing datacenter and others for scientific product development and validation. A team of scientists and programmers jointly review any new science code updates for integration into the codebase and strive to improve practices through promoting algorithm understanding, better institutional knowledge exchange and documentation, modularization, and developing data processing flow-dictated validation and debugging methods. This leads to a reduction in the personnel single point failures and reduced development time for creation of new science data-products.
Spacecraft require all manner of both digital and analog circuits. Onboard digital systems are constructed almost exclusively from field-programmable gate array (FPGA) circuits providing numerous advantages over discrete design including high integration density, high reliability, fast turn-around design cycle time, lower mass, volume, and power consumption, and lower parts acquisition and flight qualification costs. Analog and mixed-signal circuits perform tasks ranging from housekeeping to signal conditioning and processing. These circuits are painstakingly designed and built using discrete components due to a lack of options for field-programmability. FPAA (Field-Programmable Analog Array) and FPMA (Field-Programmable Mixed-signal Array) parts exist but not in radiation-tolerant technology and not necessarily in an architecture optimal for the design of analog circuits for spaceflight applications. This paper outlines an architecture proposed for an FPAA fabricated in an existing commercial digital CMOS process used to make radiation-tolerant antifuse-based FPGA devices. The primary concerns are the impact of the technology and the overall array architecture on the flexibility of programming, the bandwidth available for high-speed analog circuits, and the accuracy of the components for high-performance applications.
The document is intended to serve as the programmer's Manual for the Banning Artwork Program. A detailed description of the internal logic and flow of the Artwork Program has been included in this report. It is recommended that every user review this manual in order to receive an appreciation of the functions performed by the Artwork Program; however, the User's Manual for the Artwork Program contains sufficient information to allow the designer/engineer to efficiently use the Artwork Program. Before beginning a detailed study of this Programmer's Manual, the reader should have a complete understanding of the contents of the User's Manual for the Banning Artwork Program. It is assumed that the programmer using this manual has a working knowledge of FORTRAN IV.
Basic concept, system design and operation principles of the telemetry system developed for the Small Astronomy Satellite-3 (SAS-3) are analyzed. The concept of programmable format selected for the SAS-3 represents an optical combination of the fixed format system of SAS-1 and SAS-2, and the adaptive format concept. The programmable telemetry system permits a very wide range of changes in the data sampling order by a ground control station, depending on the experimental requirements, so that the maximal amount of useful data can be returned from orbit. The programmable system also allows the data format to differ from one spacecraft to another without changing hardware. Attention is given to the command requirements and redundancy of the SAS-3 telemetry system.
The design requirements for a Programmable Data Communications Controller (PDCC) that reduces the difficulties in attaching data terminal equipment to a computer are presented. The PDCC is an interface between the computer I/O channel and the bit serial communication lines. Each communication line is supported by a communication port that handles all line control functions and performs most terminal control functions. The port is fabricated on a printed circuit board that plugs into a card chassis, mating with a connector that is joined to all other card stations by a data bus. Ports are individually programmable; each includes a microprocessor, a programmable read-only memory for instruction storage, and a random access memory for data storage.
The primary purpose of programmable satellite receivers is to provide flexibility in application through digital control of the important functions of the receiver. This permits the acquisition and demodulation of medium to very low data rates in widely varying communications environments and over a wide range of modulation schemes. The first application of the programmable concept is in the high-reliability, low-power NASA Standard Command Detector Unit. A second programmable receiver has been designed and breadboarded for the Jupiter Orbiter Probe or Galileo mission.
A software system that integrates an ADAGE 3000 Programmable Display Generator into a C.A.D. software package known as the Solid Modeling Program is described. The Solid Modeling Program (SMP) is an interactive program that is used to model complex solid object through the composition of primitive geomeentities. In addition, SMP provides extensive facilities for model editing and display. The ADAGE 3000 Programmable Display Generator (PDG) is a color, raster scan, programmable display generator with a 32-bit bit-slice, bipolar microprocessor (BPS). The modularity of the system architecture and the width and speed of the system bus allow for additional co-processors in the system. These co-processors combine to provide efficient operations on and rendering of graphics entities. The resulting software system takes advantage of the graphics capabilities of the PDG in the operation of SMP by distributing its processing modules between the host and the PDG. Initially, the target host computer was a PRIME 850, which was later substituted with a VAX-11/785. Two versions of the software system were developed, a phase 1 and a phase 2. In phase 1, the ADAGE 3000 is used as a frame buffer. In phase II, SMP was functionally partitioned and some of its functions were implemented in the ADAGE 3000 by means of ADAGE's SOLID 3000 software package.
Networks of Boolean programmable logic modules are presented as one purely digital class of artificial neural nets. The approach contrasts with the continuous analog framework usually suggested. Programmable logic networks are capable of handling many neural-net applications. They avoid some of the limitations of threshold logic networks and present distinct opportunities. The network nodes are called dynamically programmable logic modules. They can be implemented with digitally controlled demultiplexers. Each node performs a Boolean function of its inputs which can be dynamically assigned. The overall network is therefore a combinational circuit and its outputs are Boolean global functions of the network's input variables. The approach offers definite advantages for VLSI implementation, namely, a regular architecture with limited connectivity, simplicity of the control machinery, natural modularity, and the support of a mature technology.
This manual is intended as a guide for application programmers using the Concurrent Image Processing Executive (CIPE). CIPE is intended to become the support system software for a prototype high performance science analysis workstation. In its current configuration CIPE utilizes a JPL/Caltech Mark 3fp Hypercube with a Sun-4 host. CIPE's design is capable of incorporating other concurrent architectures as well. CIPE provides a programming environment to applications' programmers to shield them from various user interfaces, file transactions, and architectural complexities. A programmer may choose to write applications to use only the Sun-4 or to use the Sun-4 with the hypercube. A hypercube program will use the hypercube's data processors and optionally the Weitek floating point accelerators. The CIPE programming environment provides a simple set of subroutines to activate user interface functions, specify data distributions, activate hypercube resident applications, and to communicate parameters to and from the hypercube.
Field Programmable Gate Arrays commonly called FPGA's are the newer generation of field programmable devices and offer more flexibility in the logic modules they incorporate and in how they are interconnected. The flexibility, the number of logic building blocks available, and the high gate densities achievable are why users find FPGA's attractive. These attributes are important in reducing product development costs and shortening the development cycle. The aerospace community is interested in incorporating this new generation of field programmable technology in space applications. To this end, a consortium was formed to evaluate the quality, reliability, and radiation performance of FPGA's. This report presents the test results on FPGA parts provided by ACTEL Corporation.
AIPS++ is an Astronomical Information Processing System being designed and implemented by an international consortium of NRAO and six other radio astronomy institutions in Australia, India, the Netherlands, the United Kingdom, Canada, and the USA. AIPS++ is intended to replace the functionality of AIPS, to be more easily programmable, and will be implemented in C++ using object-oriented techniques. Programmability in AIPS++ is planned at three levels. The first level will be that of a command-line interpreter with characteristics similar to IDL and PV-Wave, but with an intensive set of operations appropriate to telescope data handling, image formation, and image processing. The third level will be in C++ with extensive use of class libraries for both basic operations and advanced applications. The third level will allow input and output of data between external FORTRAN programs and AIPS++ telescope and image databases. In addition to summarizing the above programmability characteristics, this talk will given an overview of the classes currently being designed for telescope data calibration and editing, image formation, and the 'toolkit' of mathematical 'objects' that will perform most of the processing in AIPS++.
State of the an programmable devices are utilizing advanced processing technologies, non-standard circuit structures, and unique electrical elements in commercial-off-the-shelf (COTS)-based, high-performance devices. This paper will discuss that the above factors, coupled with the systems application environment, have a strong interplay that affect the radiation hardness of programmable devices and have resultant system impacts in (1) reliability of the unprogrammed, biased antifuse for heavy ions (rupture), (2) logic upset manifesting itself as clock upset, and (3) configuration upset. General radiation characteristics of advanced technologies are examined and manufacturers' modifications to their COTS-based and their impact on future programmable devices will be analyzed.