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At least 19 records

Two-Dimensional Systolic Array For Kalman-Filter Computing

Two-dimensional, systolic-array, parallel data processor performs Kalman filtering in real time. Algorithm rearranged to be Faddeev algorithm for generalized signal processing. Algorithm mapped onto very-large-scale integrated-circuit (VLSI) chip in two-dimensional, regular, simple, expandable array of concurrent processing cells. Processor does matrix/vector-based algebraic computations. Applications include adaptive control of robots, remote manipulators and flexible structures and processing radar signals to track targets.

Chang, Jaw John

Experiences with hypercube operating system instrumentation

The difficulties in conceptualizing the interactions among a large number of processors make it difficult both to identify the sources of inefficiencies and to determine how a parallel program could be made more efficient. This paper describes an instrumentation system that can trace the execution of distributed memory parallel programs by recording the occurrence of parallel program events. The resulting event traces can be used to compile summary statistics that provide a global view of program performance. In addition, visualization tools permit the graphic display of event traces. Visual presentation of performance data is particularly useful, indeed, necessary for large-scale parallel computers; the enormous volume of performance data mandates visual display.

Reed, Daniel A.

A fast sorting algorithm for a hypersonic rarefied flow particle simulation on the connection machine

The data parallel implementation of a particle simulation for hypersonic rarefied flow described by Dagum associates a single parallel data element with each particle in the simulation. The simulated space is divided into discrete regions called cells containing a variable and constantly changing number of particles. The implementation requires a global sort of the parallel data elements so as to arrange them in an order that allows immediate access to the information associated with cells in the simulation. Described here is a very fast algorithm for performing the necessary ranking of the parallel data elements. The performance of the new algorithm is compared with that of the microcoded instruction for ranking on the Connection Machine.

Dagum, Leonardo

Visualizing Parallel Computer System Performance

Parallel computer systems are among the most complex of man's creations, making satisfactory performance characterization difficult. Despite this complexity, there are strong, indeed, almost irresistible, incentives to quantify parallel system performance using a single metric. The fallacy lies in succumbing to such temptations. A complete performance characterization requires not only an analysis of the system's constituent levels, it also requires both static and dynamic characterizations. Static or average behavior analysis may mask transients that dramatically alter system performance. Although the human visual system is remarkedly adept at interpreting and identifying anomalies in false color data, the importance of dynamic, visual scientific data presentation has only recently been recognized Large, complex parallel system pose equally vexing performance interpretation problems. Data from hardware and software performance monitors must be presented in ways that emphasize important events while eluding irrelevant details. Design approaches and tools for performance visualization are the subject of this paper.

Malony, Allen D.

Performance of a class of parallel spread-spectrum code acquisition schemes in the presence of data modulation

An acquisition procedure for data-modulated direct-sequence spread-spectrum systems is investigated. The correlation time is partitioned into subintervals, and the integration results in these subintervals are noncoherently combined for detection. The tradeoff between noncoherent combining loss and data modulation degradation guides the optimum choice of the number of subintervals. Two forms of data modulation are considered, namely, the alternate-data and random-data cases. The parallel acquisition schemes discussed allow multiple code-phase offsets to be examined at each test. The circular state diagram approach is used to analyze the performances of these schemes. The theory presented is valid for a class of such parallel schemes.

Cheng, Unjeng

The use of transputers in processing telemetry data

Parallelism will be an essential ingredient of high performance systems of the future. The Inmos transputer is a high performance single-chip computer whose architecture facilitates the construction of parallel processing systems. Occam is a high level language developed for use with the Inmos transputer. This paper describes a project to evaluate the feasibility of using the transputer to implement real time processing of telemetry data.

Delgado, Hugo M., Jr.

Fast Fourier Transform algorithm design and tradeoffs

The Fast Fourier Transform (FFT) is a mainstay of certain numerical techniques for solving fluid dynamics problems. The Connection Machine CM-2 is the target for an investigation into the design of multidimensional Single Instruction Stream/Multiple Data (SIMD) parallel FFT algorithms for high performance. Critical algorithm design issues are discussed, necessary machine performance measurements are identified and made, and the performance of the developed FFT programs are measured. Fast Fourier Transform programs are compared to the currently best Cray-2 FFT program.

Kamin, Ray A., III

An investigation for the development of an integrated optical data preprocessor

The successful fabrication and demonstration of an integrated optical circuit designed to perform a parallel processing operation by utilizing holographic subtraction to simultaneously compare N analog signal voltages with N predetermined reference voltages is summarized. The device alleviates transmission, storage and processing loads of satellite data systems by performing, at the sensor site, some preprocessing of data taken by remote sensors. Major accomplishments in the fabrication of integrated optics components include: (1) fabrication of the first LiNbO3 waveguide geodesic lens; (2) development of techniques for polishing TIR mirrors on LiNbO3 waveguides; (3) fabrication of high efficiency metal-over-photoresist gratings for waveguide beam splitters; (4) demonstration of high S/N holographic subtraction using waveguide holograms; and (5) development of alignment techniques for fabrication of integrated optics circuits. Important developments made in integrated optics are the discovery and suggested use of holographic self-subtraction in LiNbO3, development of a mathematical description of the operating modes of the preprocessor, and the development of theories for diffraction efficiency and beam quality of two dimensional beam defined gratings.

Verber, C. M.

Application of data flow concepts to a multigrid solver for the Euler equations

In this study a multigrid solver for Euler equations (FLO52R) was examined to determine its performance potential on a hypothetical computer using a data flow architecture. The proposed computer would require massive parallelism to realize its design performance. On the other hand this parallelism would be more easily realized than with a conventional vector processor such as the Cray-1S. Several changes to the proposed design substantially alleviated most of the remaining bottlenecks to parallel processing. Other changes allowed clearer definition of memory access and disk I/O. Finally, a portion of the algorithm was rewritten to improve parallel performance. With these changes, performance levels approaching that of a Cray-1S may be possible for a computer costing far less. Estimates are given for overall speed, memory, and network bandwidth, and for instruction memory requirements.

Merriam, M. L.

Iterative solution of large, sparse linear systems on a static data flow architecture - Performance studies

The applicability of static data flow architectures to the iterative solution of sparse linear systems of equations is investigated. An analytic performance model of a static data flow computation is developed. This model includes both spatial parallelism, concurrent execution in multiple PE's, and pipelining, the streaming of data from array memories through the PE's. The performance model is used to analyze a row partitioned iterative algorithm for solving sparse linear systems of algebraic equations. Based on this analysis, design parameters for the static data flow architecture as a function of matrix sparsity and dimension are proposed.

Reed, D. A.

Computer sciences

The Computer Science Program provides advanced concepts, techniques, system architectures, algorithms, and software for both space and aeronautics information sciences and computer systems. The overall goal is to provide the technical foundation within NASA for the advancement of computing technology in aerospace applications. The research program is improving the state of knowledge of fundamental aerospace computing principles and advancing computing technology in space applications such as software engineering and information extraction from data collected by scientific instruments in space. The program includes the development of special algorithms and techniques to exploit the computing power provided by high performance parallel processors and special purpose architectures. Research is being conducted in the fundamentals of data base logic and improvement techniques for producing reliable computing systems.

Smith, Paul H.

Dataflow computing approach in high-speed digital simulation

New computational tools and methodologies for the digital simulation of continuous systems were explored. Programmability, and cost effective performance in multiprocessor organizations for real time simulation was investigated. Approach is based on functional style languages and data flow computing principles, which allow for the natural representation of parallelism in algorithms and provides a suitable basis for the design of cost effective high performance distributed systems. The objectives of this research are to: (1) perform comparative evaluation of several existing data flow languages and develop an experimental data flow language suitable for real time simulation using multiprocessor systems; (2) investigate the main issues that arise in the architecture and organization of data flow multiprocessors for real time simulation; and (3) develop and apply performance evaluation models in typical applications.

Ercegovac, M. D.

State-of-the-art Space Telescope Digicon performance data

The Digicon has been chosen as the detector for the High Resolution Spectrograph and the Faint Object Spectrograph of the Space Telescope. Both tubes are 512 channel, parallel-output devices and feature CsTe photocathodes on MgF2 faceplates. Using a computer-assisted test facility, the tubes have been characterized with respect to diode array performance, photocathode response (1100-9000 A), and imaging capability. Data are presented on diode dark current and capacitance distributions, pulse height resolution, photocathode quantum efficiency, uniformity and blemishes, dark count rate, distortion, resolution, and crosstalk.

Ginaven, R. O.

Semi-automatic process partitioning for parallel computation

On current multiprocessor architectures one must carefully distribute data in memory in order to achieve high performance. Process partitioning is the operation of rewriting an algorithm as a collection of tasks, each operating primarily on its own portion of the data, to carry out the computation in parallel. A semi-automatic approach to process partitioning is considered in which the compiler, guided by advice from the user, automatically transforms programs into such an interacting task system. This approach is illustrated with a picture processing example written in BLAZE, which is transformed into a task system maximizing locality of memory reference.

Koelbel, Charles

An analysis of cryotrap heat exchanger performance test data (400 area) and recommendations for a system to handle Apollo RCS engines

The current arrangement of a Platecoil heat exchanger which uses LN2 on the inside of parallel tubes, in counter flow to the test cell engine exhaust gases which are drawn through a box surrounding the plates by the existing vacuum blowers is examined. As a result of inadequate performance and special test data it was decided to redesign the system to accommodate an Apollo RCS engine.

Rakow, A.

Solid-propellant rocket motor internal ballistic performance variation analysis, phase 2

The Monte Carlo method was used to investigate thrust imbalance and its first time derivative throughtout the burning time of pairs of solid rocket motors firing in parallel. Results obtained compare favorably with Titan 3 C flight performance data. Statistical correlations of the thrust imbalance at various times with corresponding nominal trace slopes suggest several alternative methods of predicting thrust imbalance. The effect of circular-perforated grain deformation on internal ballistics is discussed, and a modified design analysis computer program which permits such an evaluation is presented. Comparisons with SRM firings indicate that grain deformation may account for a portion of the so-called scale factor on burning rate between large motors and strand burners or small ballistic test motors. Thermoelastic effects on burning rate are also investigated. Burning surface temperature is calculated by coupling the solid phase energy equation containing a strain rate term with a model of gas phase combustion zone using the Zeldovich-Novozhilov technique. Comparisons of solutions with and without the strain rate term indicate a small but possibly significant effect of the thermoelastic coupling.

Sforzini, R. H.

Performance evaluation of a simulated data-flow computer with low-resolution actors

Basic problems related to the exploitation of parallelism in a program include sequencing of the instructions and communication of the data. It is pointed out that the data-flow approach offers an elegant solution to the sequencing problem, since all data dependencies are automatically handled and only instructions with ready input sets are activated. It is shown that a change in the level of subcomputations (actors) affects communications costs. The concept of variable resolution is discussed, and the testbed environment is examined. Attention is given to the architecture of the processing elements, the communication network, and the simulators. A description of the analytical model is also provided. Simulation and results are discussed, taking into account test programs and allocation, the variation of the number of processing elements, the variation of the resolution in directed acyclic graphs, performance in processing loops, and array handling.

Gaudiot, J. L.

Multiprocessing the Sieve of Eratosthenes

The Sieve of Eratosthenes for finding prime numbers in recent years has seen much use as a benchmark algorithm for serial computers while its intrinsically parallel nature has gone largely unnoticed. The implementation of a parallel version of this algorithm for a real parallel computer, the Flex/32, is described and its performance discussed. It is shown that the algorithm is sensitive to several fundamental performance parameters of parallel machines, such as spawning time, signaling time, memory access, and overhead of process switching. Because of the nature of the algorithm, it is impossible to get any speedup beyond 4 or 5 processors unless some form of dynamic load balancing is employed. We describe the performance of our algorithm with and without load balancing and compare it with theoretical lower bounds and simulated results. It is straightforward to understand this algorithm and to check the final results. However, its efficient implementation on a real parallel machine requires thoughtful design, especially if dynamic load balancing is desired. The fundamental operations required by the algorithm are very simple: this means that the slightest overhead appears prominently in performance data. The Sieve thus serves not only as a very severe test of the capabilities of a parallel processor but is also an interesting challenge for the programmer.

Bokhari, S.