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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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A new type of resonant-tunneling diode (RTD) oscillator that generates 5 mW at 1.18 GHz is reported. This result was obtained by connecting in parallel 25 individual diodes designed for such a connection. This experiment demonstrates that RTDs can successfully be used in a chip-level power-combining circuit.
The implementation of Pan and Reif's Parallel Nested Dissection (PND) algorithm on mesh connected parallel computers is described. This is the first known algorithm that allows very large, sparse linear systems of equations to be solved efficiently in polylog time using a small number of processors. How the processor bound of PND can be matched to the number of processors available on a given parallel computer by slowing down the algorithm by constant factors is described. Also, for the important class of problems where G(A) is a grid graph, a unique memory mapping that reduces the inter-processor communication requirements of PND to those that can be executed on mesh connected parallel machines is detailed. A description of an implementation on the Goodyear Massively Parallel Processor (MPP), located at Goddard is given. Also, a detailed discussion of data mappings and performance issues is given.
A parallel algorithm for the solution of the generalized eigenproblem in linear elastic finite element analysis, (K)(phi)=(M)(phi)(omega), where (K) and (M) are of order N, and (omega) is of order q is presented. The parallel algorithm is based on a completely connected parallel architecture in which each processor is allowed to communicate with all other processors. The algorithm has been successfully implemented on a tightly coupled multiple-instruction-multiple-data (MIMD) parallel processing computer, Cray X-MP. A finite element model is divided into m domains each of which is assumed to process n elements. Each domain is then assigned to a processor, or to a logical processor (task) if the number of domains exceeds the number of physical processors. The macro-tasking library routines are used in mapping each domain to a user task. Computational speed-up and efficiency are used to determine the effectiveness of the algorithm. The effect of the number of domains, the number of degrees-of-freedom located along the global fronts and the dimension of the subspace on the performance of the algorithm are investigated. For a 64-element rectangular plate, speed-ups of 1.86, 3.13, 3.18 and 3.61 are achieved on two, four, six and eight processors, respectively.
This paper presents a stability analysis of parallel-connected bi-directional series-series resonant network wireless power transfer (WPT), optimized for Electric Vehicle (EV) charging and vehicle-to-grid (V2G) applications. The study addresses critical stability challenges in systems integrated with diverse distributed energy resources (DERs), including photovoltaics, fuel cells, wind turbines, energy storage systems, and the AC grid. The stability of such integrated DC grid systems is paramount for ensuring reliable operation, particularly under varying power flow conditions and dynamic interactions between parallel WPT systems. The analysis included system impedance characterization, state-space modeling, and open and closed-loop stability evaluations. The results demonstrated that the integration of a robust control architecture effectively mitigates instability risks and supports scalable, efficient operation. This work underscores the converter's adaptability and its potential for large-scale deployment in wireless EV charging infrastructures and integrated DC grid systems.
This paper presents a carrier phase shifting technique for minimizing the aggregate harmonics in networks of asymmetric parallel-connected inverters for distributed power generation system applications. The proposed technique is: 1) implemented in a decentralized manner, relying only on local voltage and current measurements, and 2) optimal in the sense that it minimizes a cost function representing the carrier-frequency current harmonics. The analysis indicates that the proposed optimal carrier phase shifting technique can enable order-of-magnitude reductions in harmonic power, and also universal improvements compared to symmetric carrier interleaving for asymmetric inverter networks. Moreover, compared to existing methods that require either centralized communication or information exchange between inverters to coordinate carriers, the proposed technique is completely decentralized, which provides important practical benefits for implementation, including improved robustness and reduced cost. The technique is experimentally validated on a network of three single-phase 2-kW inverters and demonstrates a 36.5% reduction in the weighted total harmonic distortion factor of the aggregate inverter current, and the ability to converge to the optimal carrier phase spacing dynamically in less than one line frequency cycle (16.7 ms) in steady state and transient operating conditions.
A parallel algorithm is presented for the solution of the generalized eigenproblem in linear elastic finite element analysis. The algorithm is based on a completely connected parallel architecture in which each processor is allowed to communicate with all other processors. The algorithm is successfully implemented on a tightly coupled MIMD parallel processor. A finite element model is divided into m domains each of which is assumed to process n elements. Each domain is then assigned to a processor or to a logical processor (task) if the number of domains exceeds the number of physical processors. The effect of the number of domains, the number of degrees-of-freedom located along the global fronts, and the dimension of the subspace on the performance of the algorithm is investigated. For a 64-element rectangular plate, speed-ups of 1.86, 3.13, 3.18, and 3.61 are achieved on two, four, six, and eight processors, respectively.
With the increase of direct current (dc) based power generating stations and loads, multi-terminal medium voltage dc (MT-MVdc) systems are gaining popularity. The dc sources and loads are interfaced with the MT-MVdc systems using series and parallel connected dual-active-bridge (SP-DAB). In this paper, the dc fault ride through procedure of SP-DAB meant for MT-MVdc application is analyzed. The need for dc breaker (DCB) under the requirements of MT-MVdc is established through EMT simulation studies. It is shown that an additional dc filter capacitor is essential at the output terminals of the SP-DAB to ride through the dc faults.
A high frequency oscillator is provided by connecting two amplifier circuits in parallel where each amplifier circuit provides the other amplifier circuit with the conditions necessary for oscillation. The inherent noise present in both amplifier circuits causes the quiescent current, and in turn, the generated frequency, to change. The changes in quiescent current cause the transconductance and the load impedance of each amplifier circuit to vary, and this in turn results in opposing changes in the input susceptance of each amplifier circuit. Because the changes in input susceptance oppose each other, the changes in quiescent current also oppose each other. The net result is that frequency stability is enhanced.
This paper presents a novel approach to power sharing between direct connected grid-forming converters, utilizing virtual cable impedance and droop-based outer loop control. To enhance stability, resistive droop is implemented, while virtual cable impedance with non-zero resistive and inductive components ensures improved power sharing. The inner loop controller employs a Lyapunov energy function to achieve superior dynamic performance. The proposed control architecture is validated through comprehensive modeling and real-time processor-in-the-loop simulations, demonstrating its robustness and efficiency under various operating conditions. The results highlight the potential of this control strategy to improve the reliability and efficiency of renewable energy systems. Additionally, a comparative analysis with traditional methods underscores the advantages of the proposed approach in terms of stability and performance. The proposed control architecture offers a scalable and flexible solution for grid-forming converters, enabling seamless integration of renewable energy sources. Its robustness and adaptability make it an attractive solution for real-world applications. Furthermore, the approach can be extended to other power electronic systems, enhancing overall system performance and efficiency. By providing a reliable and efficient control strategy, this paper contributes to the advancement of renewable energy systems and their adoption in the energy sector. The proposed control strategy has far-reaching implications for the widespread adoption of renewable energy sources, enabling a more sustainable and efficient energy future. The overall system is modeled in MATLAB/Simulink and PLECS software domain.
To increase power transfer capacity of high-voltage direct current (HVdc) transmission, a new extra high-power HVdc architecture with multiple standard modular multilevel converters (MMCs) per substation has recently been introduced. This paper proposes a power flow model for a multi-terminal HVdc (MTdc) grid with this innovative substation architecture. The proposed MTdc model can be integrated seamlessly with existing ac-dc power flow algorithms with minimal modifications. The model is applicable to various MTdc grid types and topologies, different numbers of dc buses, dc lines, and MMCs per substation, along with diverse control parameters. In addition, it accurately captures both balanced and unbalanced operations of the MTdc grid. The proposed model is verified using a 5-terminal bipole MTdc grid that spans 4 areas in the Eastern Interconnection system of the USA. The numerical solutions obtained from unified and sequential ac-dc power flow algorithms under different operating conditions closely match the time-domain simulation results in PSCAD, validating the accuracy and versatility of the proposed MTdc power flow model.
Connected components is a fundamental kernel in graph applications. The fastest existing multicore algorithms for solving graph connectivity are based on some form of edge sampling and/or linking and compressing trees. However, many combinations of these design choices have been left unexplored. In this paper, we design the ConnectIt framework, which provides different sampling strategies as well as various tree linking and compression schemes. ConnectIt enables us to obtain several hundred new variants of connectivity algorithms, most of which extend to computing spanning forest. In addition to static graphs, we also extend ConnectIt to support mixes of insertions and connectivity queries in the concurrent setting. We present an experimental evaluation of ConnectIt on a 72-core machine, which we believe is the most comprehensive evaluation of parallel connectivity algorithms to date. Compared to a collection of state-of-the-art static multicore algorithms, we obtain an average speedup of 12.4x (2.36x average speedup over the fastest existing implementation for each graph). Using ConnectIt, we are able to compute connectivity on the largest publicly-available graph (with over 3.5 billion vertices and 128 billion edges) in under 10 seconds using a 72-core machine, providing a 3.1x speedup over the fastest existing connectivity result for this graph, in any computational setting. For our incremental algorithms, we show that our algorithms can ingest graph updates at up to several billion edges per second. To guide the user in selecting the best variants in ConnectIt for different situations, we provide a detailed analysis of the different strategies. Finally, we show how the techniques in ConnectIt can be used to speed up two important graph applications: approximate minimum spanning forest and SCAN clustering.
An evaluation of the current nickel hydrogen cell design is presented. The IPV, or the Individual Pressure Vessel, is the state of the art right now. The present design, 3 1/2 inch cell, has a current limit of 50 ampere-hours. The nickel hydrogen cell design is the state of the art. Its size is 3 1/2 inches which limits it to 50 hours. The probable limits of that are probably 160 amphere IPV cell remaining in the passive cooling mode. The IPV stacks is a parallel connection of electrodes. Positive electrodes are connected with leads to the top portion of the stack and negative electrodes are connected with leads and pulled down to the bottom. So it is a combination connection of paralleling series electrostacking--parallel inside each individual stack, and series connected from one stack to the next. It offers, in the analysis, improvements in packaging, cost, energy density, and specific energy.
Abstract Transpiration cooling is able to provide more uniform coolant coverage than film cooling to effectively protect the component surface from contacting the hot gas. Due to numerous coolant ejection outlets within a small area at the target surface, the experimental thermo-fluid investigation on transpiration cooling becomes a significant challenge. Two classic methods to investigate film cooling, the steady-state foil heater method and the transient thermography technique, fail for transpiration cooling because the foil heater would block numerous coolant outlets, and the semi-infinite solid conduction model no longer holds for porous plates. In this study, a micro-lithography method to fabricate a silver coil pattern on top of the additively manufactured polymer porous media as the surface heater was proposed. The circuit was deliberately designed to cover the solid surface in a combination of series connection, and parallel connection to ensure the power in each unit cell area at the target surface was identical. With uniform heat flux generation, the steady-state tests were conducted to obtain distributions of a pair of parameters, adiabatic cooling effectiveness, and heat transfer coefficient (HTC). The results showed that the adiabatic cooling effectiveness could reach 0.65 with a blowing ratio lower than 0.5. Meanwhile, the heat transfer coefficient ratio (hf/h0) of transpiration cooling was close to 1 with a small blowing ratio at 0.125. A higher HTC ratio was observed for smaller pitch-to-diameter cases due to more turbulence intensity generated at the target surface.
In this study, a new kind of hybrid high-voltage direct current (HVDC) system is proposed. Each terminal of the proposed system consists of one line commutated converter (LCC) and one full-bridge modular multilevel converter (FB-MMC). The LCC and FB-MMC are connected in parallel so that they can share the same transmission line. The active–reactive power capability of the hybrid HVDC system is extended compared with the conventional LCC-HVDC system, and power reversal control without power interruption can be achieved by the coordination control of LCC and FB-MMC. Besides, the proposed hybrid HVDC system is capable of handling DC fault, because both LCC and FB-MMC have DC fault blocking capability. Moreover, the power rating of FB-MMC can be designed to low value while keeping the bulk-power transmission capability of LCC. A two-terminal bipolar hybrid HVDC system is built in PSCAD/EMTDC. The simulation results verify the effectiveness and feasibility of the proposed hybrid topology and corresponding control strategies.
This paper presents a system-level efficiency study of modular DC/DC converter and fuel cell stack configurations under series, parallel, and series–parallel connections. The investigation considers selected DC/DC converter topologies, including isolated and non-isolated architectures, boost, non-inverting buck-boost, and resonant converters, integrated with commercially available fuel cell stacks, including the Accelera FCE150, Ballard FCgen-HPS, and Toyota TFCM2. DC/DC converter modules are evaluated in modular configurations rated at 60 kW and 90 kW and two distinct output voltage ranges, specifically 580–730V and 780–930V, examining how different interconnection schemes impact overall system efficiency. The converters are evaluated under full load (100%), partial load (66%), and light load (33%) conditions, providing a comprehensive assessment of efficiency and operational characteristics across varying power demands. Approximately two-thousand efficiency data points are obtained from laboratory prototype–level component measurements and validated design evaluations across multiple converter topologies, modular configurations, voltage ranges, and load conditions, providing a robust dataset for comparative system-level efficiency analysis. The results highlight the effects of modularity and topology selection on system-level efficiency, offering a “playbook” framework for designers to select appropriate DC/DC converter arrangements and fuel cell stack connections for series, parallel, or hybrid configurations based on efficiency considerations.
A solar device includes a first string of first solar wafers, wherein a plurality of the first solar wafers each overlap with at least one vertically adjacent solar wafer from the first string. Additionally, the solar device includes a second string of second solar wafers, wherein a plurality of the second solar wafers each overlap with at least one vertically adjacent solar wafer from the second string, wherein a plurality of the first solar wafers overlap with one or more of the plurality of second solar wafers to electrically connect horizontally adjacent solar wafers in parallel.
A solar device includes a first string of first solar wafers, wherein a plurality of the first solar wafers each overlap with at least one vertically adjacent solar wafer from the first string. Additionally, the solar device includes a second string of second solar wafers, wherein a plurality of the second solar wafers each overlap with at least one vertically adjacent solar wafer from the second string, wherein a plurality of the first solar wafers overlap with one or more of the plurality of second solar wafers to electrically connect horizontally adjacent solar wafers in parallel.