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Results for “Patterned circuit”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

System and method for large-scale PCB production including continuous selective adhesion

A method for the large-scale production of PCBs including a continuous selective adhesion process for creating printed circuit traces providing input to a production line. A roll of printed circuit traces is produced using rolls of flexible substrate, conductive layer, and conductive layer support by applying adhesive between the rolls of flexible substrate and conductive layer, bringing the rolls together, transferring a circuit pattern onto the flexible substrate, curing the adhesive through non-opaque areas of the circuit pattern, and separating the non-bonded areas. The resulting printed circuit traces are applied from the roll to mounts, and circuit components are applied from a roll to the traces as the mounts move along the line. Additional rolls of printed circuit traces and circuit components may be incorporated, and multi-layer PCBs may be produced. As part of the production line, the finished PCBs may be applied to flat or contoured products.

Hatch, Jonathan Douglas↗
DOE OSTI2022

Controlled wetting and spreading of metals on substrates using porous interlayers and related articles

The disclosure generally relates to a method of creating patterned metallic circuits (e.g., silver circuits) on a substrate (e.g., a ceramic substrate). A porous metal interlayer (e.g., porous nickel) is applied to the substrate to improve wetting and adhesion of the patterned metal circuit material to the substrate. The substrate is heated to a temperature sufficient to melt the patterned metal circuit material but not the porous metal interlayer. Spreading of molten metal circuit material on the substrate is controlled by the porous metal interlayer, which can itself be patterned, such as having a defined circuit pattern. Thick-film silver or other metal circuits can be custom designed in complicated shapes for high temperature/high power applications. The materials designated for the circuit design allows for a low-cost method of generating silver circuits other metal circuits on a ceramic substrate.

Nicholas, Jason Dale↗
DOE OSTI2022

Antenna system

An antenna system comprises a substrate, an antenna positioned on the substrate, and a circuit component positioned on the substrate. The antenna is positioned on a first surface of the substrate and operable to emit a radiation pattern. The circuit component is positioned on the substrate in a null region of the radiation pattern. The thickness of portions of the substrate are modified to achieve a desired performance characteristic of the antenna.

Byers, Kyle J.↗
DOE OSTI2025

Spatiotemporal pattern detection, generation, and computation with circuits

Abstract Implementations of neurons, delays, and synapse circuits are presented with simulations. These neural elements are used to create two small spiking neural networks, the Rate-Window and Order-Biased clusters, which are capable of detecting simple two-spike spatiotemporal patterns. A simple pattern detecting network (SPDN) is created by combining the Rate-Window and Order-Biased clusters, where clusters are small spiking neural networks, and its simple pattern detection ability is demonstrated in simulation. The SPDN is used to implement a complex pattern detecting network (CPDN) and its complex pattern detection ability is demonstrated in simulation. Methods for generating arbitrary spatiotemporal patterns are presented. The CPDN and spatiotemporal pattern generation methods are then used to implement a novel spatiotemporal computing paradigm based on detecting and responding to spatiotemporal symbols. A simulation of a spatiotemporal half adder is presented to demonstrate the computing paradigm.

97 - MATHEMATICS AND COMPUTING↗
DOE OSTI2023

Ciliary localization of a light-activated neuronal GPCR shapes behavior

Many neurons in the central nervous system produce a single primary cilium that serves as a specialized signaling organelle. Several neuromodulatory G-protein-coupled receptors (GPCRs) localize to primary cilia in neurons, although it is not understood how GPCR signaling from the cilium impacts circuit function and behavior. We find that the vertebrate ancient long opsin A (VALopA), a Gi-coupled GPCR extraretinal opsin, targets to cilia of zebrafish spinal neurons. In the developing 1-d-old zebrafish, brief light activation of VALopA in neurons of the central pattern generator circuit for locomotion leads to sustained inhibition of coiling, the earliest form of locomotion. We find that a related extraretinal opsin, VALopB, is also Gi-coupled, but is not targeted to cilia. Light-induced activation of VALopB also suppresses coiling, but with faster kinetics. We identify the ciliary targeting domains of VALopA. Retargeting of both opsins shows that the locomotory response is prolonged and amplified when signaling occurs in the cilium. We propose that ciliary localization provides a mechanism for enhancing GPCR signaling in central neurons.

59 BASIC BIOLOGICAL SCIENCES↗
DOE OSTI2023

Porphene and porphite as porphyrin analogs of graphene and graphite

Two-dimensional materials have unusual properties and promise applications in nanoelectronics, spintronics, photonics, (electro)catalysis, separations, and elsewhere. Most are inorganic and their properties are difficult to tune. Here we report the preparation of Zn porphene, a member of the previously only hypothetical organic metalloporphene family. Similar to graphene, these also are fully conjugated two-dimensional polymers, but are composed of fused metalloporphyrin rings. Zn porphene is synthesized on water surface by two-dimensional oxidative polymerization of a Langmuir layer of Zn porphyrin with K 2 IrCl 6 , reminiscent of known one-dimensional polymerization of pyrroles. It is transferable to other substrates and bridges μm-sized pits. Contrary to previous theoretical predictions of metallic conductivity, it is a p-type semiconductor due to a predicted Peierls distortion of its unit cell from square to rectangular, analogous to the appearance of bond-length alternation in antiaromatic molecules. The observed reversible insertion of various metal ions, possibly carrying a fifth or sixth ligand, promises tunability and even patterning of circuits on an atomic canvas without removing any π centers from conjugation.

36 MATERIALS SCIENCE↗
DOE OSTI2026

QPatLib v1.0 — Measurement-based quantum simulation Pauli string unitary pattern collections

This Zenodo record accompanies the paper “Scalable Measurement-Based Quantum Simulation Patterns for Benchmarking” arXiv.2605.12502 and provides QPatLib v1.0 measurement-pattern datasets in human-readable JSONL together with a ZIP archive of OpenQASM 3.0 circuits used for validation and reproducibility. The patterns and circuits implement Pauli string unitaries for benchmark cases. Cases include all possible string combinations for less than 6 qubits and strings used in Hamiltonians for certain diatomic molecules for 6 or more qubits. Format: Each pattern_*.jsonl file is containins measurement patterns for all subsets for a given model/instance and subset strategy: it begins with a preamble containing model metadata, subset definitions, provenance, and (when feasible) full-pattern test results, followed by one pattern entry per subset. Each subset entry includes a required pattern_ascii field storing the measurement pattern in the measurement-calculus/Graphix standard with signal shifting, written left-to-right in the canonical order nodes → edges → measurements (with signal dependencies) → byproduct corrections (X/Z). The circuits are included as circuit_files.zip. Patterns in this record were validated against the corresponding circuits and checked for causal flow. Codes for generating these patterns can be found at QPatLib repository on Github

Graphix↗
DOE OSTI2024

Dry etching of epitaxial InGaAs/InAlAs/InAlGaAs structures for fabrication of photonic integrated circuits

A dry etching process to transfer the pattern of a photonic integrated circuit design for high-speed laser communications is described. The laser stack under consideration is a 3.2-µm-thick InGaAs/InAlAs/InAlGaAs epitaxial structure grown by molecular beam epitaxy. The etching was performed using Cl2-based inductively-coupled-plasma and reactive-ion-etching (ICP-RIE) reactors. Four different recipes are presented in two similar ICP-RIE reactors, with special attention paid to the etched features formed with various hard mask compositions, in-situ passivations, and process temperatures. The results indicate that it is possible to produce high-aspect-ratio features with sub-micron separation on this multilayer structure. Additionally, the results of the etching highlight the tradeoffs involved with the corresponding recipes.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2023

FINITE-ELEMENT DISTORED WAVE BORN APPROXIMATION FOR SURFACE SCATTERING

FE-DWBA is a software package that computes the x-ray scattering patterns of objects that locate on a surface or buried next to a surface, such as the nano-circuits and nano-patterns of the mask used in the extreme ultraviolet lithography. It can incorporate the dynamical scattering effect (photons scattered multiple times), which is predominant in surface scattering and yield high-fidelity scattering patterns. The application includes surface imaging using x-rays, and critical dimension determination for semiconductor manufacturing.

HU, MAIOQI↗
DOE OSTI2023

A Pulse Generation Framework with Augmented Program-aware Basis Gates and Criticality Analysis

Near-term intermediate scale quantum (NISQ) de- vices are subject to considerable noise and short coherence time. Consequently, it is critical to minimize circuit execution latency. Traditionally, each basis gate of a transpiled circuit is decoded into a fixed episode of the device control pulses. Recently, people started to investigate merged pulse generation for customized gates through quantum optimal control (QOC). However, existing QOC approaches face the challenges of (i) restricted search space due to prohibitive compilation overhead; (ii) suboptimal end-to-end performance due to aggressive local optimization and falsely introduced dependency among the customized gates; (iii) inadequate adaptivity towards system calibration, which is critical for NISQ devices. In this work, we propose PAQOC, a novel QOC framework that can (i) automatically detect frequently encountered gate patterns in the logical circuit by modeling the problem as a subgraph mining process and reuse these patterns to enable much larger search space exploration (i.e., program aware); (ii) systemically construct customized gate-set based on the impact to the overall program latency (i.e., criticality-aware); and (iii) quickly adapt to system re-calibration thanks to the small-scale pattern-based gate generation (i.e., adaptivity-aware). PAQOC achieves a good tradeoff between circuit performance and compilation time, allowing fully automatic, single stop, ad- hoc customized pulse generation for more efficient execution of user programs on NISQ devices. Evaluations using fifteen applications show that PAQOC can achieve on average 1.95× speedup of the circuit latency and achieve on average 36.7% reduction in compilation overhead. With PAQOC, circuits can run faster with reduced noise, allowing deeper circuits to be tested within the coherence time of present NISQ platforms.

Chen, Yanhao↗
DOE OSTI2025

Obtaining Real Production Data Through On-Component Printed SIR Patterns

Cleanliness validation of printed circuit assemblies has become increasingly important as electronic assemblies become smaller, denser, and more challenging to clean, prompting an increase in reliance in custom solutions. With increasingly fast paced development cycles, long lead times and costs of quality custom surrogate test boards become prohibitive in obtaining cleanliness data that is a true representative of the final product. In this study, aerosol jet printing, an additive manufacturing technology for electronics, was used to manufacture surface insulation resistance (SIR) test structures that were evaluated on their ability to detect cleanliness defects and remain stable when clean, as well as their survivability to standard electronics wash processes. Additionally, in an effort to further increase the agility of true product testing, SIR test structures were printed directly onto ball-grid-arrays (BGAs) and tested the survivability of conformally printed leads for data acquisition. SIR test structures displayed good wash survivability on standard FR4 and BGAs, including wraparounds for on-component prints, and high sensitivity to cleanliness defects. The presented results demonstrate the feasibility of printed SIR structures as a quick-turn, highly customizable solution for wash validation with potential for increased fidelity cleanliness testing.

SIR, Additive Manufacturing, Printed Electronics, ↗
DOE OSTI2026

NeuroCoreX: An Open-Source FPGA-Based Spiking Neural Network Emulator with On-Chip Learning

Spiking Neural Networks (SNNs) are computational models inspired by the event-driven communication and connectivity patterns of biological neural circuits. They enable high energy efficiency and natural support for diverse architectures ranging from layered networks to small-world and graphstructured topologies. In this work, we introduce NeuroCoreX, an open-source, FPGA-based spiking neural network emulator that provides real-time, on-chip learning and flexible network organization. NeuroCoreX supports both feedforward sensory inputs streamed directly from sensors or PCs via UART and recurrent on-chip connectivity, enabling simultaneous processing and learning from external stimuli and internal network dynamics-capabilities rarely available in existing FPGA SNN platforms. The system implements a Leaky Integrate-and-Fire (LIF) neuron model with current-based synapses and supports pair-based STDP learning on both feedforward and recurrent synapses. A lightweight Python interface enables interactive configuration, live monitoring, weight read-back, and experiment control. Importantly, NeuroCoreX is tightly integrated with the SuperNeuroMAT simulator, allowing SNN models to be transferred seamlessly from software to hardware for hardware-in-the-loop development. By combining real-time plasticity, flexible connectivity, and an open-source VHDL implementation, NeuroCoreX provides an extensible and accessible platform for neuromorphic research, algorithm-hardware co-design, and energy-efficient edge intelligence.

Gautam, Ashish [ORNL]↗
DOE OSTI2021

A quantum algorithm for string matching

Algorithms that search for a pattern within a larger data-set appear ubiquitously in text and image processing. Here, we present an explicit, circuit-level implementation of a quantum pattern-matching algorithm that matches a search string (pattern) of length M inside a longer text of length N. Our algorithm has a time complexity of $\tildeO$($\sqrt{N}$), while the space complexity remains modest at O(N+ M). We report the quantum gate counts relevant for both pre-fault-tolerant and fault-tolerant regimes.

Physics↗
DOE OSTI2022

Performance trade-offs in reconfigurable networks for HPC

Designing efficient interconnects to support high-bandwidth and low-latency communication is critical toward realizing high performance computing (HPC) and data center (DC) systems in the exascale era. At extreme computing scales, providing the requisite bandwidth through overprovisioning becomes impractical. These challenges have motivated studies exploring reconfigurable network architectures that can adapt to traffic patterns at runtime using optical circuit switching. Despite the plethora of proposed architectures, surprisingly little is known about the relative performances and trade-offs among different reconfigurable network designs. We aim to bridge this gap by tackling two key issues in reconfigurable network design. First, we study how cost, power consumption, network performance, and scalability vary based on optical circuit switch (OCS) placement in the physical topology. Specifically, we consider two classes of reconfigurable architectures: one that places OCSs between top-of-rack (ToR) switches—ToR-reconfigurable networks (TRNs)—and one that places OCSs between pods of racks—pod-reconfigurable networks (PRNs). Second, we tackle the effects of reconfiguration frequency on network performance. Our results, based on network simulations driven by real HPC and DC workloads, show that while TRNs are optimized for low fan-out communication patterns, they are less suited for carrying high fan-out workloads. PRNs exhibit better overall trade-off, capable of performing comparably to a fully non-blocking fat tree for low fan-out workloads, and significantly outperform TRNs for high fan-out communication patterns.

Teh, Min Yee↗
DOE OSTI2026

A Unidirectional Two-Compartment Neuron Circuit with On-chip STDP learning

Most neuromorphic chips implement the single-compartment point neuron model where synapse circuits connect directly to a leaky integrate and fire (LIF) soma circuit. However, when using a biologically plausible soma circuit (e.g., Hodgkin-Huxley neuron model), an interface circuitry, such as a current conveyor circuit, is needed to transmit synaptic current to the soma circuit. This is especially true for ultra-low power neuron circuits, where membrane capacitance is on the order of 20 fF. This need for an interface circuit arises because the parasitic capacitance and leakage current caused by fabrication mismatch and second-order effects of the output transistors in the synapse circuits can disturb the spiking dynamics of the soma circuit if connected without an interface. Using an interface circuit to isolate the soma’s membrane capacitor from synapses resolves this issue. We propose to use a unidirectional resistor (a transconductance circuit) to connect the synapse and soma circuits instead of conventional current conveyor circuits. Using a biologically plausible spike pattern detection model, we show that the on-chip spike-timing-dependent plasticity (STDP) learning performance of the proposed unidirectional two-compartment neuron circuit is similar to a single-compartment circuit (with a current conveyor as an interface) and additionally, it is more power-efficient and biologically plausible. The chip is fabricated in the Taiwan Semiconductor Manufacturing Company (TSMC) 250 nm technology node and comprises a single neuron circuit.

Gautam, Ashish [ORNL]↗
DOE OSTI2021

Void formation in operator growth, entanglement, and unitarity

The structure of the Heisenberg evolution of operators plays a key role in explaining diverse processes in quantum many-body systems. In this paper, we discuss a new universal feature of operator evolution: an operator can develop a void during its evolution, where its nontrivial parts become separated by a region of identity operators. Such processes are present in both integrable and chaotic systems, and are required by unitarity. We show that void formation has important implications for unitarity of entanglement growth and generation of mutual information and multipartite entanglement. We study explicitly the probability distributions of void formation in a number of unitary circuit models, and conjecture that in a quantum chaotic system the distribution is given by the one we find in random unitary circuits, which we refer to as the random void distribution. We also show that random unitary circuits lead to the same pattern of entanglement growth for multiple intervals as in (1 + 1)-dimensional holographic CFTs after a global quench, which can be used to argue that the random void distribution leads to maximal entanglement growth.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2022

Determinants of synapse diversity revealed by super-resolution quantal transmission and active zone imaging

Neural circuit function depends on the pattern of synaptic connections between neurons and the strength of those connections. Synaptic strength is determined by both postsynaptic sensitivity to neurotransmitter and the presynaptic probability of action potential evoked transmitter release (P r ). Whereas morphology and neurotransmitter receptor number indicate postsynaptic sensitivity, presynaptic indicators and the mechanism that sets P r remain to be defined. To address this, we developed QuaSOR, a super-resolution method for determining P r from quantal synaptic transmission imaging at hundreds of glutamatergic synapses at a time. We mapped the P r onto super-resolution 3D molecular reconstructions of the presynaptic active zones (AZs) of the same synapses at the Drosophila larval neuromuscular junction (NMJ). We find that P r varies greatly between synapses made by a single axon, quantify the contribution of key AZ proteins to P r diversity and find that one of these, Complexin, suppresses spontaneous and evoked transmission differentially, thereby generating a spatial and quantitative mismatch between release modes. Transmission is thus regulated by the balance and nanoscale distribution of release-enhancing and suppressing presynaptic proteins to generate high signal-to-noise evoked transmission.

59 BASIC BIOLOGICAL SCIENCES↗