Results for “Power Electronic Grid Interface”

NASA NTRS1988

Successful completion of a cyclic ground test of a mercury ion auxiliary propulsion system

An engineering model Ion Auxiliary Propulsion System (IAPS) 8-cm thruster (S/N 905) has completed a life test at NASA Lewis Research Center. The mercury ion thruster successfully completed and exceeded the test goals of 2557 on/off cycles and 7057 hr of operation at full thrust. The final 1200 cycles and 3600 hr of the life test were conducted using an engineering model of the IAPS power electronics unit (PEU) and breadboard digital controller and interface unit (DCIU). This portion of the test is described in this paper with a charted history of thruster operating parameters and off-normal events. Performance and operating characteristics were constant throughout the test with only minor variations. The engineering model power electronics unit operated without malfunction; the flight software in the digital controller and interface unit was exercised and verified. Post-test inspection of the thruster revealed facility enhanced accelerator grid erosion but overall the thruster was in good condition. It was concluded that the thruster performance was not drastically degraded by time or cycles. Additional cyclic testing is currently under consideration.

Francisco, David R.↗

NASA NTRS1988

Successful completion of a cyclic ground test of a mercury Ion Auxiliary Propulsion System

An engineering model Ion Auxiliary Propulsion System (IAPS) 8-cm thruster (S/N 905) has completed a life test at NASA Lewis Research Center. The mercury ion thruster successfully completed and exceeded the test goals of 2557 on/off cycles and 7057 hr of operation at full thrust. The final 1200 cycles and 3600 hr of the life test were conducted using an engineering model of the IAPS power electronics unit (PEU) and breadboard digital controller and interface unit (DCIU). This portion of the test is described in this paper with a charted history of thruster operating parameters and off-normal events. Performance and operating characteristics were constant throughout the test with only minor variations. The engineering model power electronics unit operated without malfunction; the flight software in the digital controller and interface unit was exercised and verified. Post-test inspection of the thruster revealed facility enhanced accelerator grid erosion but overall the thruster was in good condition. It was concluded that the thruster performance was not drastically degraded by time or cycles. Additional cyclic testing is currently under consideration.

Francisco, David R.↗

NASA NTRS1982

Electron lithography STAR design guidelines. Part 3: The mosaic transistor array applied to custom microprocessors. Part 4: Stores logic arrays, SLAs implemented with clocked CMOS

The Mosaic Transistor Array is an extension of the STAR system developed by NASA which has dedicated field cells designed to be specifically used in semicustom microprocessor applications. The Sandia radiation hard bulk CMOS process is utilized in order to satisfy the requirements of space flights. A design philosophy is developed which utilizes the strengths and recognizes the weaknesses of the Sandia process. A style of circuitry is developed which incorporates the low power and high drive capability of CMOS. In addition the density achieved is better than that for classic CMOS, although not as good as for NMOS. The basic logic functions for a data path are designed with compatible interface to the STAR grid system. In this manner either random logic or PLA type structures can be utilized for the control logic.

Trotter, J. D.↗