SEARCH · Search NASA
Results for “SiC IGBT”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Flexible Large Power Solid State Transformer (FLP-SST)
A large power transformer (LPT) is a major component in the electric power system grid. With the passage of time their reliability in terms of failure and service maintenance has been a big concern. According to a report by EPRI, various agencies have emphasized, and recent events have demonstrated, the critical nature of power transformers in the face of possible high-impact, low-frequency (HILF) events. The HILF events include intentional malicious events (e.g., physical attacks, cyber-attacks, coordinated attacks, electromagnetic pulse weapons, and others), natural disasters (e.g., hurricanes, earthquakes, severe geomagnetic disturbances, etc.), and non-intentional or accidental events such as nuclear power plant accidents. With aging, the line frequency transformers (LFTs) are also prone to failure due to insulation degradation, coolant leakage, mechanical failure, inadequate maintenance, etc. and thus poses a bigger threat to the electrical grid. Moreover, these transformers are custom made to fit the needs at the substation and weighs approximately between 100-400 tons, hence are neither interchangeable nor stored as a spare one. Hence reasonable efforts need to be made regarding the replacement of the LPT with a more feasible technology that does not pose similar issues. The concept of Flexible Large Power Solid-State Transformer (FLPSST) has addressed the aforementioned issues to provide an economical solutions for the failure of LPTs.
Metal oxide semiconductor (MOS) controlled devices and methods of making the same
Metal-Oxide-Semiconductor (MOS) controlled semiconductor devices and methods of making the devices are provided. The devices include a gate which controls current flow through channel regions positioned between source/emitter and drain regions of the device. The devices include a gate oxide layer having a variable thickness. The thickness of the gate oxide layer under the edge of the gate and over the source/emitter regions is different than the thickness over the channel regions of the device. The oxide layer thickness near the edge of the gate can be greater than the oxide layer thickness over the channel regions. The source/emitter regions can be implanted to provide enhanced oxide growth during gate oxide formation. The source/emitter region can include regions that are implanted to provide enhanced oxide growth during gate oxide formation and regions which do not provide enhanced oxide growth during gate oxide formation. The devices can be SiC devices such as SiC MOSFETs and SiC IGBTs.
Metal oxide semiconductor (MOS) controlled devices and methods of making the same
Metal-Oxide-Semiconductor (MOS) controlled semiconductor devices and methods of making the devices are provided. The devices include a gate which controls current flow through channel regions positioned between source/emitter and drain regions of the device. The devices include a gate oxide layer having a variable thickness. The thickness of the gate oxide layer under the edge of the gate and over the source/emitter regions is different than the thickness over the channel regions of the device. The oxide layer thickness near the edge of the gate can be greater than the oxide layer thickness over the channel regions. The source/emitter regions can be implanted to provide enhanced oxide growth during gate oxide formation. The source/emitter region can include regions that are implanted to provide enhanced oxide growth during gate oxide formation and regions which do not provide enhanced oxide growth during gate oxide formation. The devices can be SiC devices such as SiC MOSFETs and SiC IGBTs.
Metal oxide semiconductor (MOS) controlled devices and methods of making the same
Metal-Oxide-Semiconductor (MOS) controlled semiconductor devices and methods of making the devices are provided. The devices include a gate which controls current flow through channel regions positioned between source/emitter and drain regions of the device.The devices include a gate oxide layer having a variable thickness. The thickness of the gate oxide layer under the edge of the gate and over the source/emitter regions is different than the thickness over the channel regions of the device. The oxide layer thickness near the edge of the gate can be greater than the oxide layer thickness over the channel regions. The source/emitter regions can be implanted to provide enhanced oxide growth during gate oxide formation. The source/emitter region can include regions that are implanted to provide enhanced oxide growth during gate oxide formation and regions which do not provide enhanced oxide growth during gate oxide formation. The devices can be SiC devices such as SiC MOSFETs and SiC IGBTs.
1.2 kV, 10 A, 4H-SiC Bi-Directional Field Effect Transistor (BiDFET) with Low On-State Voltage Drop
Bidirectional power switches are used in matrix-or cyclo-converters and in multistage inverter circuits to facilitate high-frequency AC-to-AC conversion. A new 1.2 kV bidirectional MOSFET (BiDFET) with low on-resistance is achieved and demonstrated using two discrete SiC power MOSFET bare die chips, packaged within a four-terminal custom-designed module. Static and dynamic characterization has been carried out to inspect the on-state and switching behaviour of the BiDFET. Here, the BiDFET is shown to have a low forward voltage drop of 0.6 V at a current of 10 A, which is more than 2.5x smaller than previous Si IGBT and SiC MOSFET based bidirectional switch implementations.
The BREKTRIA 500 – A Breakthrough in Technology and Power Density for an Advanced 500kW Utility-Scale String Inverter (Final Technical Report)
The primary goal of this development project, planned to be 36 months in duration, was to create a 500kW utility-scale string inverter, demonstrating an advanced hybrid architecture that would achieve unprecedented high power density, and bring the inverter to the stage of production readiness. Specific key objectives for the 500kW utility-scale string inverter were: Create a 500kW 3-phase 600Vac inverter that was similar in overall size to the existing 250kW string inverters in the market, thereby demonstrating dramatically increased power density; Achieve a cost of goods, including all manufacturing-related costs and overheads, at or below 2.5¢/Wac ($12,500); Demonstrate full-power operation at a 45-50C ambient temperature with no power de-rating; Accommodate a PV array DC input of up to 1MWdc, aka a DC/AC Ratio of 2.0; Demonstrate peak efficiency greater than 99% at any operating dc voltage, and a CEC weighted average efficiency greater than or equal to 98.5%. The motivation for this project was to leapfrog the competition by creating the world’s most powerful string inverter, utilizing an innovative topology and achieving a step change increase in power density. Achieving the goals of the project would have enabled Yaskawa Solectria Solar to demonstrate its technology leadership, manufacture the utility-scale string inverter in the company’s facilities in Illinois, and bring to the market a highly-differentiated and compelling product to help the company grow its share in the large and growing utility market segment. During the course of this project, BREK Electronics’ hybrid architecture inverter was taken from an early-stage 125kW prototype, to a more mature and successfully demonstrated power stage at twice the power. Two 250kW power stages were planned to build the 500kW inverter. Significant progress was made in the inverter controls, achieving a clean AC sinewave and closed-loop operation into the grid, and improved efficiency by control of the high-speed switching. Further, the updated 250kW power stage was on track to achieve full power operation at an ambient temperature of 50C. At the time of the project’s closure in September 2022, global semiconductor supply remained limited, with shortages creating dramatic swings in both availability and price. Given this situation, our ability to predict cost-of-goods two years out with any accuracy or confidence was limited. As a result, the probability of attaining the target cost of 2.5¢/Wac for the 500kW inverter remained uncertain at the closure of the project. This project successfully demonstrated the potential for the advanced hybrid architecture inverter that emerged from a decade of university research on Si IGBTs and SiC mosfets, leading to this unique inverter topology. The team has taken the first steps toward an evolutionary advancement in inverter technology that remains to be fully realized.
A Datasheet Driven Unified Si/SiC Compact IGBT Model for N-Channel and P-Channel Devices
This paper presents a unified physics-based insulated-gate bipolar transistor (IGBT) compact model for circuit simulation that predicts the performance of both Si and SiC, n- and p-channel devices. The model can predict the detailed switching waveforms of these technologies based on its charge-based formulation. Further, this compact IGBT model is presented alongside a unique datasheet-driven parameter extraction process. The parameter extraction process enables users to quickly extract model parameters from data typically published without the need of taking physical measurements. The model has been validated with both Si and SiC devices for static and dynamic characteristics. The SiC IGBTs used for validation are a 12.5-kV n-channel device and a 13-kV p-channel device, while the Si IGBT chosen was IXDH30N120 from IXYS Corp. (Milpitas, CA, USA). This is the only IGBT model that predicts the performance of both n- and p-channel, Si and SiC devices, providing more freedom for the development of complex power electronics circuit designs. The convergence of the model has been verified by implementing a complex circuit consisting of both a dc-dc converter and a dc-ac inverter. The results presented here show that the unified model can be used to describe the behavior of a wide range of Si and SiC IGBT circuits. This paper is accompanied by a Verilog-A source code and a power point file demonstrating the model parameter extraction sequence.
Solid state protective smart plug device
A wireless-controlled smart plug device and methods of use and operation, using a solid state switch to provide electrical power from an outlet to a load, and provide protection against overload, short circuit, ground, arc, or voltage surge faults. The switch includes a bidirectional semiconductor switch with two back-to-back connected transistors, such as silicon power MOSFETs, silicon insulated-gate bipolar transistors (IGBTs), silicon carbide (SiC) transistors, or gallium nitride (GaN) transistors, each configured to control the current flow from the electrical receptacle to the external electrical load.
A Disruptive Approach to Electric Vehicle Power Electronics Final Report
This project developed and demonstrated a new power electronics technology for electric vehicle drivetrains, that achieved significant improvements in power density and efficiency over standard drive cycles, relative to the commercial state of the art. In particular, the prototype measured loss and efficiency curves demonstrated a reduction in total loss over the US EPA US06 drive cycle by a factor of four. Similar reductions are observed for urban (UDDS) and highway (HWFET) drive cycles. Further, the project demonstrated a significant reduction in the total film capacitor requirements, by over an order of magnitude; this was achieved through fundamental improvements in converter circuit topologies. These nonincremental technology advances can lead to significant improvements in temperature rise, reliability, cost, and cooling system size and weight. These results were achieved through a new proposed composite converter architecture, and were demonstrated in a boost-type system similar to that employed by Toyota, Ford, and Honda. A 30 kW silicon prototype achieved a US06 average efficiency of 97.5%, which represents a reduction in average loss by a factor of approximately four relative to the 92.5% average efficiency of the commercial state of the art. A silicon carbide prototype achieved similar efficiency, while also achieving power densities of 23 kW/L (volumetric) and 20 kW/kg (gravimetric) in a boost dc-dc system including magnetics and film capacitors. This was achieved with a SiC switching frequency of 240 kHz, which allowed employment of planar magnetics. These power densities are roughly four times better than the commercial state of the art, and significantly exceed the DOE APEEM 2020 goals. In addition to the composite boost system, a SiC inverter was demonstrated at the 800 V 30 kW level. This inverter was demonstrated driving a permanent magnet machine over the US 06 drive cycle. The replacement of 1200 V Si IGBTs with 1200 V SiC MOSFETs led to improvement of CAFE average efficiency from 98.7% to 99.5%, which corresponds to a reduction of average loss by a factor of approximately two. The modular nature of the composite converter architecture opens the possibility of reuse of one or more converter modules during charging operations, providing a path for onboard charging capability at significant power levels while significantly reducing the volume and weight of the added charger module. This project demonstrated an integrated Level II charger whose add-on specific weight was approximately four times better than the DOE PHEV charger 2022 targets.
Evaluating switch lifetime in soft-switched single-stage differential-mode SST
The reliability of semiconductor switches in single-stage differential-mode solid-state transformers (DM-SSTs) has not been systematically evaluated under soft-switching operation and realistic grid conditions. This paper presents a switch-level reliability analysis for soft-switched and hard-switched DM-SST configurations by integrating converter-specific power loss modeling with empirical lifetime prediction. Analytical derivation of device current profiles specific to the DM-SST is used to characterize electrothermal stress, which is then mapped to lifetime using degradation models obtained from power cycling tests (PCTs). Applied to realistic SST load profiles and grid voltage variations, this approach provides a probabilistic prediction of switch lifetime for the DM-SST. Lifetime estimates for both SiC MOSFETs and Si IGBTs are presented, offering insight into device degradation under converter operating conditions. The results quantify the reliability benefits of soft switching in single-stage SSTs, highlighting how switching dynamics influence long-term switch degradation.
A High Voltage Fast Switching Power Module for Active Control of Magnetic Fields and Edge Plasma Currents in Fusion Validation Platforms (Final Report)
Explore the source record for details and available documents.
Investigation of Dynamic Temperature-Sensitive Electrical Parameters for Medium-Voltage Low-Current Silicon Carbide and Silicon Devices
This paper presents five dynamic temperature-sensitive electrical parameters (TSEPs) for the medium-voltage silicon carbide (SiC) and silicon (Si) devices. The theoretical temperature dependence of these parameters is analyzed. A test platform that enables to implement the temperature relevant dynamic characterization is developed. The tested TSEPs are summarized in terms of their relationship with junction temperature, drain/collector current, DC voltage, and external gate resistance. The comparison between the 3 kV 12 A Si IGBT and 3.3 kV 5 A SiC MOSFET with the identical TO-263 package is conducted. The results verify that the turn-off drain-source voltage switching rate achieves better thermal sensitivity for medium-voltage low-current SiC MOSFETs compared with Si IGBTs. Both the turn-on and turn-off delay time exhibit better thermal linearity for the two devices. The turn-off delay time further achieves five times better thermal sensitivity than the turn-on delay time for investigated medium-voltage SiC MOSFETs.
Highly Integrated Wide Bandgap Power Module for Next Generation Plug-In Vehicles (Final Report)
Wide bandgap devices are key enablers for high power density traction inverters. A highly integrated wide bandgap (WBG) power module enables higher temperature operation, higher inverter efficiency and overall smaller die area with the same power delivery. However, it requires careful design of the power module to take advantage of all the superior material properties that silicon carbide (SiC) provides over conventional silicon (Si) Insulated Gate Bipolar Transistor (IGBT) based design. This project developed an efficient and densely packed SiC power module for an automotive traction inverter application. Extensive study was performed to select the best performing SiC die considering a wide range of temperature variation, suitability to integrate into target packaging, robust body diode performance and overall high electrical efficiency. Multiple design ideas were explored to achieve lower stray inductance for both power loop and signal loop, uniform current distribution, compact form factor, and very high thermal performance. The final power module package includes all six inverter switches in the same module (six-pack) with die sintered at both bottom and top surfaces utilizing high performance substrate to achieve high electrical and thermal performance. Two power module variants were developed using 900 V and 1200 V devices for operating at two different high voltage levels (> 600 V HV battery). Both power modules were comprehensively characterized, and high efficiency operation of the inverter was confirmed through analysis. Finally, a complete functional inverter was built with the 1200V power modules using other essential components (HV capacitors, gate driver board, controller board, current sensor, connectors etc.) and tested using GM’s standard test procedure. There are several challenges associated with adopting WBG devices for high voltage operation. In order to assess and mitigate those challenges, GM and subrecipients of this project have conducted multiple detailed studies. This includes phase current reconstruction using integrated Rogowski coil, device junction temperature estimation using on-state gate resistance, modeling and testing the effect of high voltage and fast switching on motor insulation and bearings, partial discharge inception voltage measurement under different environmental conditions. Findings of all these studies are summarized in this report.
The BiDFET Device and Its Impact on Converters
The matrix converter topology for direct ac-to-ac conversion offers elimination of the bulky and unreliable D.C. link capacitors used in the popular Voltage-Source Inverter (VSI) with a front-end rectifier. The resulting more compact and higher efficiency implementation is a desirable solution for a wide variety of applications, such as photovoltaic energy generation, motor drives, and energy storage systems. The development of matrix converters has been hampered by the lack of availability of commercial bidirectional power switches with the ability to block high voltages in the first and third quadrants, carry on state current in both quadrants with low voltage drop, exhibit large forward-biased safe-operating-area (FBSOA), and low switching power losses. Consequently, many implementations have been tried in the past using discrete devices, as listed in Table I. Two implementations utilize commonly available asymmetric blocking IGBTs, while two cases make use of SiC power MOSFETs. They generally have a large parts count (4-6 individual switches) that occupies significant space in the converter where multiple bi-directional switches are required. They also have a high on-state voltage drop that degrades efficiency. As a result, one implementation utilizes symmetric blocking IGBT to achieve a low parts count (2), but its switching losses are unacceptably high.
Design and Testing of a Hard-Fault Protection Circuit for a 1 kV SiC MOSFET Inverter
Due to increasingly high DC link voltages and further advancements in the current density of silicon carbide (SiC) MOSFETs, it has become evident that conventional IGBT protection methods are not sufficient to prevent exceeding the current rating of these devices during low-inductance fault events. This paper explores the use of an air core Rogowski coil topology to mitigate these hard fault events. The design of this circuit resulted in safe shutdown of a low impedance phase-to-phase fault in under one microsecond, tested up to DC link voltages of 1 kV. This paper details the theory, design, simulation, and successful test results of this method.