ACAS Xu Processor Data Handler Manager. Software Architecture Design
ACAS Xu Software Architecture diagram
ACAS Xu↗
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Vertiport Automation Software Architecture and Requirements
The purpose of Vertiport Automation Software Architecture and Requirements was developed to mature the Vertiport Automation System (VAS) described in the High-Density Automated Vertiport ConOps, into a set of artifacts that enable the development of a VAS prototype. The scope of document was to develop: (1) A VAS Software Architecture diagram that logically organizes VAS functionality into specific software components; (2) VAS Software Trade Study identifying existing commercial products and NASA research that can be used in part or with modifications to fulfill VAS functionality. (3) A set of VAS Functional Requirements which decompose the VAS concept into software functionality, including any interfaces and data flows needed; (4) A set of VAS Test Approaches describing a methodology for verification of the VAS Functional Requirements; and (5) An application user experience (UX) design study describing the general features needed in a VAS user interface.
Advanced Air Mobility↗
NASA CEV Reference GN&C Architecture
The Orion Crew Exploration Vehicle (CEV) will be the first human spacecraft built by NASA in almost 3 decades and will be the first vehicle to perform both Low Earth Orbit (LEO) missions and lunar missions since Apollo. The awesome challenge of designing a Guidance, Navigation, and Control (GN&C) system for this vehicle that satisfies all of its various mission requirements is countered by the opportunity to take advantage of the improvements in algorithms, software, sensors, and other related GN&C technology over this period. This paper describes the CEV GN&C reference architecture developed to support the overall NASA reference configuration and validate the driving requirements of the Constellation (Cx) Architecture Requirements Document (CARD, Reference 1) and the CEV System Requirements Document (SRD, Reference 2). The Orion GN&C team designed the reference architecture based on the functional allocation of GN&C roles and responsibilities of CEV with respect to the other Cx vehicles, such as the Crew Launch Vehicle (CLV), Earth Departure Stage (EDS), and Lunar Surface Area Module (LSAM), across all flight phases. The specific challenges and responsibilities of the CEV GN&C system from launch pad to touchdown will be introduced along with an overview of the navigation sensor suite, its redundancy management, and flight software (FSW) architecture. Sensors will be discussed in terms of range of operation, data utility within the navigation system, and rationale for selection. The software architecture is illustrated via block diagrams, commensurate with the design aspects.
Tamblyn, Scott↗
Interfacing a high performance disk array file server to a Gigabit LAN
Our previous prototype, RAID-1, identified several bottlenecks in typical file server architectures. The most important bottleneck was the lack of a high-bandwidth path between disk, memory, and the network. Workstation servers, such as the Sun-4/280, have very slow access to peripherals on busses far from the CPU. For the RAID-2 system, we addressed this problem by designing a crossbar interconnect, Xbus board, that provides a 40MB/s path between disk, memory, and the network interfaces. However, this interconnect does not provide the system CPU with low latency access to control the various interfaces. To provide a high data rate to clients on the network, we were forced to carefully and efficiently design the network software. A block diagram of the system hardware architecture is given. In the following subsections, we describe pieces of the RAID-2 file server hardware that had a significant impact on the design of the network interface.
Seshan, Srinivasan↗
Ares I Crew Launch Vehicle Upper Stage Avionics and Software Overview
This viewgraph presentation gives an overall description of the avionics and software functions of the Ares I Upper Stage Crew Launch Vehicle. The contents include: 1) IUA Team - Development Approach Roadmap; 2) Ares I US Avionics and Software Development Approach; 3) NDT Responsibilities; 4) Ares I Upper Stage Avionics Locations; 5) Ares I Overall Avionics & Software Functions; 6) Block Diagram Version of Avionics Architecture; 7) Instrument Unit Avionics Preliminary Design; and 8) Upper Stage Avionics External Interfaces.
Nola, Charles L.↗
The Cassini Spacecraft: Object Oriented Flight Control Software
The Cassini AACS object-oriented Flight Software is depicted in increasing levels of detail using a Context Diagram, Architecture Diagrams, an Object Diagram for each object, and a Statechart for each object. The detail contained in the diagrams is enhanced and refined during the Requirements and Design Phases of both Subsystem and Software Development. Examples of all the diagrams as well as the criteria for object selection, the advantages of statecharts, and the ease of modifying the design to accommodate changes in scope are described.
object-oriented↗
The Cassini spacecraft: Object oriented flight control software
The Cassini Attitude and Articulation Control Subsystem (AACS) is responsible for determining and controlling the spacecraft attitude including instrument pointing, antenna pointing, and thrust vector pointing during velocity change maneuvers. The 12 year mission life, long round-trip light time, and extended periods of coast without continuous ground control drive the AACS flight software design in the directions of autonomy, fault tolerance, and modularity to accommodate planned upgrades in flight. The Cassini AACS Flight Software is depicted in increasing levels of detail using a Context Diagram, Architecture Diagrams (i.e., Dependency Diagrams), an Object Diagram for each object, and a Statechart (i.e., State Transition Diagram) for each object. The detail contained in the diagrams is enhanced and refined during the Requirements and Design Phases of both Subsystem and Software Development. Examples of all the diagrams as well as the criteria for object selection, the advantages of statecharts, and the ease of modifying the design to accommodate changes in scope are described.
Hackney, John C.↗
Hardware and software fault tolerance - A unified architectural approach
The loss of hardware fault tolerance which often arises when design diversity is used to improve the fault tolerance of computer software is considered analytically, and a unified design approach is proposed to avoid the problem. The fundamental theory of fault-tolerant (FT) architectures is reviewed; the current status of design-diversity software development is surveyed; and the FT-processor/attached-processor (FTP/AP) architecture developed by Lala et al. (1986) is described in detail and illustrated with diagrams. FTP/AP is shown to permit efficient implementation of N-version FT software while still tolerating random hardware failures with very high coverage; the reliability is found to be significantly higher than that of conventional majority-vote N-version software.
Lala, Jaynarayan H.↗
Run Time Assurance for Electric Vertical Takeoff and Landing Aircraft
NASA is conducting research to demonstrate and evaluate the application of Run Time Assurance (RTA) as a means to assure safety in Electric Vertical Takeoff and Landing (eVTOL) aircraft with highly automated or autonomous flight capability supervised by a single onboard pilot. The work described in this report demonstrates an application of RTA and examines the implications for design and analysis of aircraft functions and systems; aircraft safety hazards; safety assurance; development assurance; and pilot tasks and performance. This research effort also seeks to assess the efficacy of the combined application of traditional Functional Hazard Analysis (FHA) and the more modern System Theoretic Process Analysis (STPA) techniques to perform hazard analyses on aircraft with complex automated and autonomous systems and an onboard pilot. During the research effort we developed architectural designs of two alternate eVTOL aircraft, generally following the process characterized in the SAE standards ARP4754 and ARP4761. The design has focused on the control architectures of these aircraft, which are identical except that one incorporates RTA techniques to reduce the criticality of some key software components. Artifacts of this process include a taxonomy of aircraft-level functions, aircraft-level architecture diagrams, aircraft-level functional hazard assessments (AFHA), function allocations onto aircraft systems and subsystems, functional block diagrams for a select set of control-related functions, and system-level functional hazard assessments (SFHA) for those functions. This project has highlighted the notion that DAL D is something of a sweet spot for low-confidence controllers in an RTA-based design. Among the many activities described in DO-178C, the activities related to requirement verifiability, algorithmic accuracy, and test coverage can be the most challenging for the kinds of advanced control techniques that may be desirable in novel UAM designs, such as adaptive control, machine-learning, artificial intelligence, numerical search, and Monte Carlo based algorithms. Moreover, the standard requires that development teams demonstrate that errors leading to unacceptable failure conditions have been removed from the software. The RTA architecture, which cordons off the low-confidence function, makes it much easier to show this for these kinds of algorithms. With regard to the use of STPA and FHA as complementary hazard analysis techniques, our research effort led us to the conclusion that STPA should be used to derive requirements for hardware and software systems and/or components. Also, STPA is a natural complement to other processes in ARP4754A involving design studies and iteration.
Run-time assurance↗
JPL's Space Flight Operations Center: Development project overview
The topics are covered in view graph form and include the following: (1) major elements of deep space flight programs; (2) development schedule; (3) primary design goals; (4) Space Flight Operations Center (SFOC) data systems architecture; (5) technical guidelines; (6) SFOC data system functional architecture; (7) typical SFOC node; (8) SFOC components; (9) SFOC software categories; (10) planned subsystem core diagram for Mars observer; (11) SFOC use of public domain/3rd party software; (12) SFOC hardware; (13) SFOC target six mission configuration; and (14) SFOC development status and plans.
Ebersole, M.↗
NASA experimental airborne doppler radar and real time processor for wind shear detection
The topics are presented in viewgraph form and include the following: experimental radar system capabilities; an experimental radar system block diagram; wind shear radar signal and data processor (WRSDP); WRSDP hardware architecture; WRSDP system design goals; DSP software development tools; OS-9 software development tools; WRSDP digital signal processing; WRSDP display operational modes; WRSDP division of functions; structure of WRSDP signal and data processing algorithms; and the wind shear radar flight experiment.
Schaffner, Philip H.↗
FPGA Based Reconfigurable ATM Switch Test Bed
Various issues associated with "FPGA Based Reconfigurable ATM Switch Test Bed" are presented in viewgraph form. Specific topics include: 1) Network performance evaluation; 2) traditional approaches; 3) software simulation; 4) hardware emulation; 5) test bed highlights; 6) design environment; 7) test bed architecture; 8) abstract sheared-memory switch; 9) detailed switch diagram; 10) traffic generator; 11) data collection circuit and user interface; 12) initial results; and 13) the following conclusions: Advances in FPGA make hardware emulation feasible for performance evaluation, hardware emulation can provide several orders of magnitude speed-up over software simulation; due to the complexity of hardware synthesis process, development in emulation is much more difficult than simulation and requires knowledge in both networks and digital design.
Chu, Pong P.↗
Practical Application of Model-based Programming and State-based Architecture to Space Missions
A viewgraph presentation to develop models from systems engineers that accomplish mission objectives and manage the health of the system is shown. The topics include: 1) Overview; 2) Motivation; 3) Objective/Vision; 4) Approach; 5) Background: The Mission Data System; 6) Background: State-based Control Architecture System; 7) Background: State Analysis; 8) Overview of State Analysis; 9) Background: MDS Software Frameworks; 10) Background: Model-based Programming; 10) Background: Titan Model-based Executive; 11) Model-based Execution Architecture; 12) Compatibility Analysis of MDS and Titan Architectures; 13) Integrating Model-based Programming and Execution into the Architecture; 14) State Analysis and Modeling; 15) IMU Subsystem State Effects Diagram; 16) Titan Subsystem Model: IMU Health; 17) Integrating Model-based Programming and Execution into the Software IMU; 18) Testing Program; 19) Computationally Tractable State Estimation & Fault Diagnosis; 20) Diagnostic Algorithm Performance; 21) Integration and Test Issues; 22) Demonstrated Benefits; and 23) Next Steps
Mission Data System (MDS)↗
IPG Job Manager v2.0 Design Documentation
This viewgraph presentation provides a high-level design of the IPG Job Manager, and satisfies its Master Requirement Specification v2.0 Revision 1.0, 01/29/2003. The presentation includes a Software Architecture/Functional Overview with the following: Job Model; Job Manager Client/Server Architecture; Job Manager Client (Job Manager Client Class Diagram and Job Manager Client Activity Diagram); Job Manager Server (Job Manager Client Class Diagram and Job Manager Client Activity Diagram); Development Environment; Project Plan; Requirement Traceability.
Hu, Chaumin↗
Standards in the architectural effort
The NASA Scientific and Technical Information (STI) Project Architecture Group was established to build a framework for modernization, provide guidance and direction for standardization and integration efforts, and to develop a set of concepts, interfaces, and entities to specifiy standards. The STI data processing architecture is a set of diagrams and descriptions that characterize the principal functions and services as well as hardware and software components. The use of standards promotes scalability and interchangeability.
Markham, Howard↗
GRASP/Ada (Graphical Representations of Algorithms, Structures, and Processes for Ada): The development of a program analysis environment for Ada. Reverse engineering tools for Ada, task 1, phase 2
The study, formulation, and generation of structures for Ada (GRASP/Ada) are discussed in this second phase report of a three phase effort. Various graphical representations that can be extracted or generated from source code are described and categorized with focus on reverse engineering. The overall goal is to provide the foundation for a CASE (computer-aided software design) environment in which reverse engineering and forward engineering (development) are tightly coupled. Emphasis is on a subset of architectural diagrams that can be generated automatically from source code with the control structure diagram (CSD) included for completeness.
Cross, James H., II↗
A fault tolerant 80960 engine controller
The paper describes the design of the 80960 Fault Tolerant Engine Controller for the supervision of engine operations, which was designed for the NASA Marshall Space Center. Consideration is given to the major electronic components of the controller, including the engine controller, effectors, and the sensors, as well as to the controller hardware, the controller module and the communications module, and the controller software. The architecture of the controller hardware allows modifications to be made to fit the requirements of any new propulsion systems. Multiple flow diagrams are presented illustrating the controller's operations.
Reichmuth, D. M.↗
BGen: A UML Behavior Network Generator Tool
BGen software was designed for autogeneration of code based on a graphical representation of a behavior network used for controlling automatic vehicles. A common format used for describing a behavior network, such as that used in the JPL-developed behavior-based control system, CARACaS ["Control Architecture for Robotic Agent Command and Sensing" (NPO-43635), NASA Tech Briefs, Vol. 32, No. 10 (October 2008), page 40] includes a graph with sensory inputs flowing through the behaviors in order to generate the signals for the actuators that drive and steer the vehicle. A computer program to translate Unified Modeling Language (UML) Freeform Implementation Diagrams into a legacy C implementation of Behavior Network has been developed in order to simplify the development of C-code for behavior-based control systems. UML is a popular standard developed by the Object Management Group (OMG) to model software architectures graphically. The C implementation of a Behavior Network is functioning as a decision tree.
Huntsberger, Terry↗