Space avionics and microsystems
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As the budget for the space industry is dwindling, a reusable avionics architecture applicable across multiple missions is urgently needed to reduce the development and production costs of flight projects. This paper presents a multi-mission avionics architecture which employs interface standards extensively, sot hat avionics systems can be built rapidly by assembling subsystems and instruments in a plug-and-play manner. The key feature of this architecture is a "backbone" standard parallel bus which can accommodate various standard interfaces through a repertoire of I/O modules. Hence, specific ;mission requirements can be met by selecting and integrating the appropriate subsystems and instruments into the system. This architecture can also adopt different "backbone" buses, implement redundant processors, and support distributed processing. An example of the architecture using the MOPS6000 from the Southwest Research Institute is also described. Experiments will be done in the Flight System Testbed (FST) of the Jet Propulsion Laboratory to benchmark the MOPS6000 and to demonstrate its multi-mission capability.
Fulfilling NASA's new vision for space exploration requires the development of sustainable, flexible and fault tolerant spacecraft control systems. The traditional development paradigm consists of the purchase or fabrication of hardware boards with fixed processor and/or Digital Signal Processing (DSP) components interconnected via a standardized bus system. This is followed by the purchase and/or development of software. This paradigm has several disadvantages for the development of systems to support NASA's new vision. Building a system to be fault tolerant increases the complexity and decreases the performance of included software. Standard bus design and conventional implementation produces natural bottlenecks. Configuring hardware components in systems containing common processors and DSPs is difficult initially and expensive or impossible to change later. The existence of Hardware Description Languages (HDLs), the recent increase in performance, density and radiation tolerance of Field Programmable Gate Arrays (FPGAs), and Intellectual Property (IP) Cores provides the technology for reprogrammable Systems on a Chip (SOC). This technology supports a paradigm better suited for NASA's vision. Hardware and software production are melded for more effective development; they can both evolve together over time. Designers incorporating this technology into future avionics can benefit from its flexibility. Systems can be designed with improved fault isolation and tolerance using hardware instead of software. Also, these designs can be protected from obsolescence problems where maintenance is compromised via component and vendor availability.To investigate the flexibility of this technology, the core of the Central Processing Unit and Input/Output Processor of the Space Shuttle AP101S Computer were prototyped in Verilog HDL and synthesized into an Altera Stratix FPGA.
The report reviews a 1993 effort that investigated issues associated with the development of requirements, with the practice of concurrent engineering and with rapid prototyping, in the development of a next-generation Reaction Jet Drive Controller. This report details lessons learned, the current status of the prototype, and suggestions for future work. The report concludes with a discussion of the vision of future avionics architectures based on the principles associated with open architectures and integrated vehicle health management.
This report reviews a 1994 effort that continued 1993 investigations into issues associated with the definition of requirements, with the practice concurrent engineering and rapid prototyping in the context of the development of a prototyping of a next-generation reaction jet driver controller. This report discusses lessons learned, the testing of the current prototype, the details of the current design, and the nature and performance of a mathematical model of the life cycle of a pilot operated valve solenoid.
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The Space Shuttle avionics system, which was conceived in the early 1970's and became operational in the 1980's represents a significant advancement of avionics system technology in the areas of systems and redundacy management, digital data base technology, flight software, flight control integration, digital fly-by-wire technology, crew display interface, and operational concepts. The origins and the evolution of the system are traced; the requirements, the constraints, and other factors which led to the final configuration are outlined; and the functional operation of the system is described. An overall system block diagram is included.
The space environment presents unique challenges for avionics. Launch survivability, thermal management, radiation protection, and other factors are important for successful space designs. Many existing avionics designs use custom hardware and software to meet the requirements of space systems. Although some space vendors have moved more towards a standard product line approach to avionics, the space industry still lacks similar standards and common practices for avionics development. This lack of commonality manifests itself in limited reuse and a lack of interoperability. To address NASA s need for interoperable avionics that facilitate reuse, several hardware and software approaches are discussed. Experiences with existing space boards and the application of terrestrial standards is outlined. Enhancements and extensions to these standards are considered. A modular stack-based approach to space avionics is presented. Software and reconfigurable logic cores are considered for extending interoperability and reuse. Finally, some of the issues associated with the design of reusable interoperable avionics are discussed.
The baseline avionics systems for the space tug is comprised of a central digital computer that integrates the functions of all of the tug's subsystems by means of a redundant digital data bus. The major subsystems of the avionics system are: data management; communications; guidance, navigation, and control; rendezvous and docking; electrical power; and instrumentation. The baseline avionics system for the space tug resulting from system and subsystem trade studies is defined. Tug interfaces with the spacecraft, orbiter and the ground, and the baseline philosophy and configuration for onboard checkout of the tug are included. Baseline configurations, functional and operational features, component details and characteristics, and the supporting software are included in the subsystem descriptions.
The present symposium on aeronautics and space encompasses DOD research and development, science payloads, small microgravity carriers, the Space Station, technology payloads and robotics, commercial initiatives, STS derivatives, space exploration, and DOD space operations. Specific issues addressed include the use of AI to meet space requirements, the Astronauts Laboratory Smart Structures/Skins Program, the Advanced Liquid Feed Experiment, an overview of the Spacelab program, the Autonomous Microgravity Industrial Carrier Initiative, and the Space Station requirements and transportation options for a lunar outpost. Also addressed are a sensor-data display for telerobotic systems, the Pegasus and Taurus launch vehicles, evolutionary transportation concepts, the upgrade of the Space Shuttle avionics, space education, orbiting security sentinels, and technologies for improving launch-vehicle responsiveness.
This paper reports on the design and characterization of a small, low power, and low weight instrument, a High-LET Radiation Spectrometer (HiLRS), that measures energy deposited by heavy ions in microelectronic devices. The HILRS operates on pulse-height analysis principles and is designed for space and avionics applications. The detector component in the instrument is based on large scale arrays of p-n junctions. In this system, the pulse amplitude from a particle hit is directly proportional to the particle LET. A prototype flight unit has been fabricated and calibrated using several heavy ions with varying LETs and protons with several energies. The unit has been delivered to the Ballistic Missile Defense Organization (BMDO) c/o the Air Force Research Laboratory in Albuquerque, NM, for integration into the military Space Technology Research Vehicle (STRV), a US-UK cooperative mission. Another version of HILRS is being prepared for delivery in April to the Hubble Space Telescope (HST) project, to fly on the HST Orbital Systems Test (HOST) Platform on a shuttle mission.
This paper summarizes work in progress in three different areas: 1) a framework for the design of higly reliable and higly available space avionics systems; 2) distributed reliable computing architecture; and 3) Guarded Software Upgrading (GSU) techniques for software upgrading during long-term missions such as the Pluto/Kuiper missions.
This paper will describe the system architecture, the avionics components, the key performance and reliability requirements, and the current development status of the X2000 Avionics.
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The baseline avionics system features a central digital computer that integrates the functions of all the space tug subsystems by means of a redundant digital data bus. The central computer consists of dual central processor units, dual input/output processors, and a fault tolerant memory, utilizing internal redundancy and error checking. Three electronically steerable phased arrays provide downlink transmission from any tug attitude directly to ground or via TDRS. Six laser gyros and six accelerometers in a dodecahedron configuration make up the inertial measurement unit. Both a scanning laser radar and a TV system, employing strobe lamps, are required as acquisition and docking sensors. Primary dc power at a nominal 28 volts is supplied from dual lightweight, thermally integrated fuel cells which operate from propellant grade reactants out of the main tanks.
The Space Technology 5 (ST5) mission is a NASA New Millennium Program project that will validate new technologies for future space science missions and demonstrate the feasibility of building launching and operating multiple, miniature spacecraft that can collect research-quality in-situ science measurements. The three satellites in the ST5 constellation will be launched into a sun-synchronous Earth orbit in early 2006. ST5 fits into the 25-kilogram and 24-watt class of very small but fully capable spacecraft. The new technologies and design concepts for a compact power and command and data handling (C&DH) avionics system are presented. The 2-card ST5 avionics design incorporates new technology components while being tightly constrained in mass, power and volume. In order to hold down the mass and volume, and quali& new technologies for fUture use in space, high efficiency triple-junction solar cells and a lithium-ion battery were baselined into the power system design. The flight computer is co-located with the power system electronics in an integral spacecraft structural enclosure called the card cage assembly. The flight computer has a full set of uplink, downlink and solid-state recording capabilities, and it implements a new CMOS Ultra-Low Power Radiation Tolerant logic technology. There were a number of challenges imposed by the ST5 mission. Specifically, designing a micro-sat class spacecraft demanded that minimizing mass, volume and power dissipation would drive the overall design. The result is a very streamlined approach, while striving to maintain a high level of capability, The mission's radiation requirements, along with the low voltage DC power distribution, limited the selection of analog parts that can operate within these constraints. The challenge of qualifying new technology components for the space environment within a short development schedule was another hurdle. The mission requirements also demanded magnetic cleanliness in order to reduce the effect of stray (spacecraft-generated) magnetic fields on the science-grade magnetometer.