Increasing the Stability of Series Avalanche Transistor Circuits
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Pellegrin, J. -L.↗
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Single-Shot Readout Performance of Two Heterojunction-Bipolar-Transistor Amplification Circuits at Millikelvin Temperatures
High-fidelity single-shot readout of spin qubits requires distinguishing states much faster than the T 1 time of the spin state. One approach to improving readout fidelity and bandwidth (BW) is cryogenic amplification, where the signal from the qubit is amplified before noise sources are introduced and room-temperature amplifiers can operate at lower gain and higher BW. We compare the performance of two cryogenic amplification circuits: a current-biased heterojunction bipolar transistor circuit (CB-HBT), and an AC-coupled HBT circuit (AC-HBT). Both circuits are mounted on the mixing-chamber stage of a dilution refrigerator and are connected to silicon metal oxide semiconductor (Si-MOS) quantum dot devices on a printed circuit board (PCB). The power dissipated by the CB-HBT ranges from 0.1 to 1 μW whereas the power of the AC-HBT ranges from 1 to 20 μW. Referred to the input, the noise spectral density is low for both circuits, in the 15 to 30 fA/√Hz range. The charge sensitivity for the CB-HBT and AC-HBT is 330 μe/√Hz and 400 μe/√Hz, respectively. For the single-shot readout performed, less than 10 its is required for both circuits to achieve bit error rates below 10-3, which is a putative threshold for quantum error correction.
71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
Strain-insensitive intrinsically stretchable transistors and circuits
An all-elastomer strain engineering approach, which uses patterned elastomer layers with tunable stiffnesses, can be used to create intrinsically stretchable transistor arrays with a device density of 340 transistors cm -2 and strain insensitivity of less than 5% performance variation when stretched to 100% strain. Intrinsically stretchable electronics can form intimate interfaces with the human body, creating devices that could be used to monitor physiological signals without constraining movement. However, mechanical strain invariably leads to the degradation of the electronic properties of the devices. Here we show that strain-insensitive intrinsically stretchable transistor arrays can be created using an all-elastomer strain engineering approach, in which the patterned elastomer layers with tunable stiffnesses are incorporated into the transistor structure. By varying the cross-linking density of the elastomers, areas of increased local stiffness are introduced, reducing strain on the active regions of the devices. This approach can be readily incorporated into existing fabrication processes, and we use it to create arrays with a device density of 340 transistors cm -2 and a strain insensitivity of less than 5% performance variation when stretched to 100% strain. We also show that it can be used to fabricate strain-insensitive circuit elements, including NOR gates, ring oscillators and high-gain amplifiers for the stable monitoring of electrophysiological signals.
42 ENGINEERING↗
Evaporated tellurium thin films for p-type field-effect transistors and circuits
There is an emerging need for semiconductors that can be processed at near ambient temperature with high mobility and device performance. Although multiple n-type options have been identified, the development of their p-type counterparts remains limited. In this paper, we report the realization of tellurium thin films through thermal evaporation at cryogenic temperatures for fabrication of high-performance wafer-scale p-type field-effect transistors. We achieve an effective hole mobility of ~35 cm 2 V –1 s –1 , on/off current ratio of ~10 4 and subthreshold swing of 108 mV dec –1 on an 8-nm-thick film. High-performance tellurium p-type field-effect transistors are fabricated on a wide range of substrates including glass and plastic, further demonstrating the broad applicability of this material. Significantly, three-dimensional circuits are demonstrated by integrating multi-layered transistors on a single chip using sequential lithography, deposition and lift-off processes. Finally, various functional logic gates and circuits are demonstrated.
42 ENGINEERING↗
Air-Stable CuInSe 2 Nanocrystal Transistors and Circuits via Post-Deposition Cation Exchange
Colloidal semiconductor nanocrystals (NCs) are a promising materials class for solution-processable, next-generation electronic devices. However, most high-performance devices and circuits have been achieved using NCs containing toxic elements, which may limit their further device development. In this work, we fabricate high mobility CuInSe 2 NC field-effect transistors (FETs) using a solution-based, post-deposition, sequential cation exchange process that starts with electronically coupled, thiocyanate (SCN)-capped CdSe NC thin films. First Cu + is substituted for Cd 2+ transforming CdSe NCs to Cu-rich Cu 2 Se NC films. Next, Cu 2 Se NC films are dipped into a Na 2 Se solution to Se-enrich the NCs, thus compensating the Cu-rich surface, promoting fusion of the Cu 2 Se NCs, and providing sites for subsequent In-dopants. The liquid-coordination-complex trioctylphosphine–indium chloride (TOP–InCl 3 ) is used as a source of In 3+ to partially exchange and n -dope CuInSe 2 NC films. We demonstrate Al 2 O 3 -encapsulated, air-stable CuInSe 2 NC FETs with linear (saturation) electron mobilities of 8.2 ± 1.8 cm 2 /(V s) (10.5 ± 2.4 cm2/(V s)) and with current modulation of 10 5 , comparable to that for high-performance Cd-, Pb-, and As-based NC FETs. The CuInSe 2 NC FETs are used as building blocks of integrated inverters to demonstrate their promise for low-cost, low-toxicity NC circuits.
37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
Low-voltage polymer/small-molecule blend organic thin-film transistors and circuits fabricated via spray deposition
Organic thin-film electronics have long been considered an enticing candidate in achieving high-throughput manufacturing of low-power ubiquitous electronics. However, to achieve this goal, more work is required to reduce operating voltages and develop suitable mass-manufacture techniques. Here, we demonstrate low-voltage spray-cast organic thin-film transistors based on a semiconductor blend of 2,8-difluoro- 5,11-bis (triethylsilylethynyl) anthradithiophene and poly(triarylamine). Both semiconductor and dielectric films are deposited via successive spray deposition in ambient conditions (air with 40%–60% relative humidity) without any special precautions. Despite the simplicity of the deposition method, p-channel transistors with hole mobilities of >1 cm{sup 2}/Vs are realized at −4 V operation, and unipolar inverters operating at −6 V are demonstrated.
36 MATERIALS SCIENCE↗
Single-shot readout performance of two heterojunction-bipolar-transistor amplification circuits at millikelvin temperatures.
Abstract not provided.
Curry, Matthew Jon↗
Vertical organic electrochemical transistors for complementary circuits
Abstract Organic electrochemical transistors (OECTs) and OECT-based circuitry offer great potential in bioelectronics, wearable electronics and artificial neuromorphic electronics because of their exceptionally low driving voltages (<1 V), low power consumption (<1 µW), high transconductances (>10 mS) and biocompatibility 1–5 . However, the successful realization of critical complementary logic OECTs is currently limited by temporal and/or operational instability, slow redox processes and/or switching, incompatibility with high-density monolithic integration and inferior n-type OECT performance 6–8 . Here we demonstrate p- and n-type vertical OECTs with balanced and ultra-high performance by blending redox-active semiconducting polymers with a redox-inactive photocurable and/or photopatternable polymer to form an ion-permeable semiconducting channel, implemented in a simple, scalable vertical architecture that has a dense, impermeable top contact. Footprint current densities exceeding 1 kA cm −2 at less than ±0.7 V, transconductances of 0.2–0.4 S, short transient times of less than 1 ms and ultra-stable switching (>50,000 cycles) are achieved in, to our knowledge, the first vertically stacked complementary vertical OECT logic circuits. This architecture opens many possibilities for fundamental studies of organic semiconductor redox chemistry and physics in nanoscopically confined spaces, without macroscopic electrolyte contact, as well as wearable and implantable device applications.
Science & Technology - Other Topics↗
Single shot spin readout with a cryogenic high-electron-mobility transistor amplifier at sub-Kelvin temperatures
We use a cryogenic high-electron-mobility transistor circuit to amplify the current from a single electron transistor, allowing for demonstration of single shot readout of an electron spin on a single P donor in Si with 100 kHz bandwidth and a signal to noise ratio of ~9. In order to reduce the impact of cable capacitance, the amplifier is located adjacent to the Si sample, at the mixing chamber stage of a dilution refrigerator. For a current gain of ~2.7 x 10 3 the power dissipation of the amplifier is 13 μW, the bandwidth is ~1.3 MHz, and for frequencies above 300 kHz the current noise referred to input is ≤ 70 fA/√Hz. Furthermore, with this amplification scheme, we are able to observe coherent oscillations of a P donor electron spin in isotopically enriched 28 Si with 96% visibility.
1/f noise↗
High-performance carbon-nanotube-based complementary field-effect-transistors and integrated circuits with yttrium oxide
High-performance p-type carbon nanotube (CNT) transistors utilizing yttrium oxide as gate dielectric are presented by optimizing oxidization and annealing processes. Complementary metal-oxide-semiconductor (CMOS) field-effect-transistors (FETs) are then fabricated on CNTs, and the p- and n-type devices exhibit symmetrical high performances, especially with low threshold voltage near to zero. The corresponding CMOS CNT inverter is demonstrated to operate at an ultra-low supply voltage down to 0.2 V, while displaying sufficient voltage gain, high noise margin, and low power consumption. Yttrium oxide is proven to be a competitive gate dielectric for constructing high-performance CNT CMOS FETs and integrated circuits.
71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
The Fault Detection, Localization, and Tolerant Operation of Modular Multilevel Converters with an Insulated Gate Bipolar Transistor (IGBT) Open Circuit Fault
Reliability is one of the critical issues for a modular multilevel converter (MMC) since it consists of a large number of series-connected power electronics submodules (SMs). Here in this paper, a complete control strategy including fault detection, localization, and tolerant operation is proposed for the MMC under an insulated gate bipolar transistor (IGBT) open circuit fault. According to the output characteristics of the SM with the open-circuit fault of IGBT, a fault detection method based on the circulating current and output current observation is used. In order to further precisely locate the position of the faulty SM, a fault localization method based on the SM capacitor voltage observation is developed. After the faulty SM is isolated, the continuous operation of the converter is ensured by adopting the fault-tolerant strategy based on the use of redundant modules. To verify the proposed fault detection, fault localization, and fault-tolerant operation strategies, a 900 kVA MMC system under the conditions of an IGBT open circuit is developed in the Matlab/Simulink platform. The capabilities of rapid detection, precise positioning, and fault-tolerant operation of the investigated detection and control algorithms are also demonstrated.
42 ENGINEERING↗
Low-temperature spray-deposited indium oxide for flexible thin-film transistors and integrated circuits
Indium oxide (In{sub 2}O{sub 3}) films were deposited by ultrasonic spray pyrolysis in ambient air and incorporated into bottom-gate coplanar and staggered thin-film transistors. As-fabricated devices exhibited electron-transporting characteristics with mobility values of 1 cm{sup 2}V{sup −1}s{sup −1} and 16 cm{sup 2}V{sup −1}s{sup −1} for coplanar and staggered architectures, respectively. Integration of In{sub 2}O{sub 3} transistors enabled realization of unipolar inverters with high gain (5.3 V/V) and low-voltage operation. The low temperature deposition (≤250 °C) of In{sub 2}O{sub 3} also allowed transistor fabrication on free-standing 50 μm-thick polyimide foils. The resulting flexible In{sub 2}O{sub 3} transistors exhibit good characteristics and remain fully functional even when bent to tensile radii of 4 mm.
75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
Fully integrated multi-phase buck converter with coupled air core inductors
A multi-phase buck switching converter having grouped pairs of phases, each phase using two magnetically coupled air-core inductors. For each group, a first driver circuit controlling switching of a first power transistor switching circuit coupled to a first air-core inductor output for driving an output load at the first phase. A second driver circuit controlling switching of a second power transistor switching circuit coupled to a second air-core inductor output for driving said output load at the second phase. The first and second phases are spaced 180° apart. The coupled air-core inductors per group of such orientation, separation distance and mutual inductance polarity relative to each other such that magnetic coupling between the two or more inductors at each phase results in a net increase in effective inductance per unit volume. Each air-core inductor is a metal slab of defined length, height and thickness formed using back-end-of-line semiconductor manufacturing process.
Zhang, Xin↗
Fully integrated multi-phase buck converter with coupled air core inductors
A multi-phase buck switching converter having grouped pairs of phases, each phase using two magnetically coupled air-core inductors. For each group, a first driver circuit controlling switching of a first power transistor switching circuit coupled to a first air-core inductor output for driving an output load at the first phase. A second driver circuit controlling switching of a second power transistor switching circuit coupled to a second air-core inductor output for driving said output load at the second phase. The first and second phases are spaced 180° apart. The coupled air-core inductors per group of such orientation, separation distance and mutual inductance polarity relative to each other such that magnetic coupling between the two or more inductors at each phase results in a net increase in effective inductance per unit volume. Each air-core inductor is a metal slab of defined length, height and thickness formed using back-end-of-line semiconductor manufacturing process.
Zhang, Xin↗
Split source drain transistor
Systems, methods, circuits, and devices for providing and using transistors in a physically unclonable function (PUF) circuit. The transistors comprise a split source drain configuration including one or more inflection segments that increase process variations between the transistors such that each transistor generates a unique output signal.
Trujillo, Joshua Joseph↗
Simulation of a spiking neuron circuit using carbon nanotube transistors
Neuromorphic engineering is related to the existing analogies between the physical semiconductor VLSI (Very Large Scale Integration) and biophysics. Neuromorphic systems propose to reproduce the structure and function of biological neural systems for transferring their calculation capacity on silicon. Since the innovative research of Carver Mead, the neuromorphic engineering continues to emerge remarkable implementation of biological system. This work presents a simulation of an elementary neuron cell with a carbon nanotube transistor (CNTFET) based technology. The model of the cell neuron which was simulated is called integrate and fire (I&F) model firstly introduced by G. Indiveri in 2009. This circuit has been simulated with CNTFET technology using ADS environment to verify the neuromorphic activities in terms of membrane potential. This work has demonstrated the efficiency of this emergent device; i.e CNTFET on the design of such architecture in terms of power consumption and technology integration density.
77 NANOSCIENCE AND NANOTECHNOLOGY↗
Four-terminal circuit element with photonic core
A four-terminal circuit element is described that includes a photonic core inside of the circuit element that uses a wide bandgap semiconductor material that exhibits photoconductivity and allows current flow through the material in response to the light that is incident on the wide bandgap material. The four-terminal circuit element can be configured based on various hardware structures using a single piece or multiple pieces or layers of a wide bandgap semiconductor material to achieve various designed electrical properties such as high switching voltages by using the photoconductive feature beyond the breakdown voltages of semiconductor devices or circuits operated based on electrical bias or control designs. The photonic core aspect of the four-terminal circuit element provides unique features that enable versatile circuit applications to either replace the semiconductor transistor-based circuit elements or semiconductor diode-based circuit elements.
36 MATERIALS SCIENCE↗