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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records

Binary operations on neuromorphic hardware with application to linear algebraic operations and stochastic equations

Abstract Non-von Neumann computational hardware, based on neuron-inspired, non-linear elements connected via linear, weighted synapses—so-called neuromorphic systems—is a viable computational substrate. Since neuromorphic systems have been shown to use less power than CPUs for many applications, they are of potential use in autonomous systems such as robots, drones, and satellites, for which power resources are at a premium. The power used by neuromorphic systems is approximately proportional to the number of spiking events produced by neurons on-chip. However, typical information encoding on these chips is in the form of firing rates that unarily encode information. That is, the number of spikes generated by a neuron is meant to be proportional to an encoded value used in a computation or algorithm. Unary encoding is less efficient (produces more spikes) than binary encoding. For this reason, here we present neuromorphic computational mechanisms for implementing binary two’s complement operations. We use the mechanisms to construct a neuromorphic, binary matrix multiplication algorithm that may be used as a primitive for linear differential equation integration, deep networks, and other standard calculations. We also construct a random walk circuit and apply it in Brownian motion simulations. We study how both algorithms scale in circuit size and iteration time.

97 MATHEMATICS AND COMPUTING↗

Binary Operation Of A Liquid-Crystal Light Valve

Conditions for operation of commercially available liquid-crystal light valve as binary spatial light modulator discovered. In mode, modulator turns on sharply and then saturates as intensity of writing beam increases. Valve comprises photoconductive layer and liquid-crystal layer separated by dielectric mirror and sandwiched between two transparent electrodes. Potential applications include enhancement of images, optical recording, and holography.

Davis, Jeffrey A.↗

Prototype Focal-Plane-Array Optoelectronic Image Processor

Prototype very-large-scale integrated (VLSI) planar array of optoelectronic processing elements combines speed of optical input and output with flexibility of reconfiguration (programmability) of electronic processing medium. Basic concept of processor described in "Optical-Input, Optical-Output Morphological Processor" (NPO-18174). Performs binary operations on binary (black and white) images. Each processing element corresponds to one picture element of image and located at that picture element. Includes input-plane photodetector in form of parasitic phototransistor part of processing circuit. Output of each processing circuit used to modulate one picture element in output-plane liquid-crystal display device. Intended to implement morphological processing algorithms that transform image into set of features suitable for high-level processing; e.g., recognition.

Fang, Wai-Chi↗

Efficient Merge and Insert Operations for Binary Heaps and Trees

Binary heaps and binary search trees merge efficiently. We introduce a new amortized analysis that allows us to prove the cost of merging either binary heaps or balanced binary trees is O(l), in the amortized sense. The standard set of other operations (create, insert, delete, extract minimum, in the case of binary heaps, and balanced binary trees, as well as a search operation for balanced binary trees) remain with a cost of O(log n). For binary heaps implemented as arrays, we show a new merge algorithm that has a single operation cost for merging two heaps, a and b, of O(absolute value of a + min(log absolute value of b log log absolute value of b. log absolute value of a log absolute value of b). This is an improvement over O(absolute value of a + log absolute value of a log absolute value of b). The cost of the new merge is so low that it can be used in a new structure which we call shadow heaps. to implement the insert operation to a tunable efficiency. Shadow heaps support the insert operation for simple priority queues in an amortized time of O(f(n)) and other operations in time O((log n log log n)/f (n)), where 1 less than or equal to f (n) less than or equal to log log n. More generally, the results here show that any data structure with operations that change its size by at most one, with the exception of a merge (aka meld) operation, can efficiently amortize the cost of the merge under conditions that are true for most implementations of binary heaps and search trees.

Kuszmaul, Christopher Lee↗

Optical-Input, Optical-Output Morphological Processor

Some advantages of optical and electronic processing combined. Proposed optical-input/optical-output morphological processor is optoelectronic assembly performing some binary operations on picture elements of binary input image, yielding processed binary output image. Number of such processors cascaded to form more complicated image-processing system. Use of optics as connection medium makes rate of processing faster than in all-electronic system designed to perform same overall processing functions. At the same time, use of electronics as processing medium provides flexibility of reconfiguration not available in all-optical system.

Yu, Jeffrey W.↗

Model Checking with Edge-Valued Decision Diagrams

We describe an algebra of Edge-Valued Decision Diagrams (EVMDDs) to encode arithmetic functions and its implementation in a model checking library. We provide efficient algorithms for manipulating EVMDDs and review the theoretical time complexity of these algorithms for all basic arithmetic and relational operators. We also demonstrate that the time complexity of the generic recursive algorithm for applying a binary operator on EVMDDs is no worse than that of Multi- Terminal Decision Diagrams. We have implemented a new symbolic model checker with the intention to represent in one formalism the best techniques available at the moment across a spectrum of existing tools. Compared to the CUDD package, our tool is several orders of magnitude faster

Roux, Pierre↗

Model-Checking with Edge-Valued Decision Diagrams

We describe an algebra of Edge-Valued Decision Diagrams (EVMDDs) to encode arithmetic functions and its implementation in a model checking library along with state-of-the-art algorithms for building the transition relation and the state space of discrete state systems. We provide efficient algorithms for manipulating EVMDDs and give upper bounds of the theoretical time complexity of these algorithms for all basic arithmetic and relational operators. We also demonstrate that the time complexity of the generic recursive algorithm for applying a binary operator on EVMDDs is no worse than that of Multi-Terminal Decision Diagrams. We have implemented a new symbolic model checker with the intention to represent in one formalism the best techniques available at the moment across a spectrum of existing tools: EVMDDs for encoding arithmetic expressions, identity-reduced MDDs for representing the transition relation, and the saturation algorithm for reachability analysis. We compare our new symbolic model checking EVMDD library with the widely used CUDD package and show that, in many cases, our tool is several orders of magnitude faster than CUDD.

Roux, Pierre↗

Investment and operating costs of binary cycle geothermal power plants

Typical investment and operating costs for geothermal power plants employing binary cycle technology and utilizing the heat energy in liquid-dominated reservoirs are discussed. These costs are developed as a function of reservoir temperature. The factors involved in optimizing plant design are discussed. A relationship between the value of electrical energy and the value of the heat energy in the reservoir is suggested.

Holt, B.↗

Parallel image logical operations using cross correlation

Methods are presented for counting areas in an image in a parallel manner using noncoherent optical techniques. The techniques presented include the Levialdi algorithm for counting, optical techniques for binary operations, and cross-correlation.

Strong, J. P., III↗

Development of an optical parallel logic device and a half-adder circuit for digital optical processing

The paper describes the fabrication and operation of an optical parallel logic (OPAL) device which performs Boolean algebraic operations on binary images. Several logic operations on two input binary images were demonstrated using an 8 x 8 device with a CdS photoconductor and a twisted nematic liquid crystal. Two such OPAL devices can be interconnected to form a half-adder circuit which is one of the essential components of a CPU in a digital signal processor.

Athale, R. A.↗

Programmable pipelined image processor

A pipelined image processor selectively interconnects modules in a column of a two-dimensional array to modules of the next column of the array of modules 1,1 through M,N, where M is the number of modules in one dimension and N is the number of modules in the other direction. Each module includes two input selectors for A and B inputs, two convolvers, a binary function operator, a neighborhood comparison operator which produces an A output and an output selector which may select as a B output the output of any one of the components in the module, including the A output of the neighborhood comparison operator. Each module may be connected to as many as eight modules in the next column, preferably with the majority always in a different row that is up (or down) in the array for a generally spiral data path around the torus thus formed. The binary function operator is implemented as a look-up table addressed by the most significant 8 bits of each 12-bit argument. The table output includes a function value and the slopes for interpolation of the two arguments by multiplying the 4 least significant bits in multipliers and adding the products to the function value through adders.

Donald B Gennery↗

Quantum-parallel vectorized data encodings and computations on trapped-ion and transmon QPUs

Compact data representations in quantum systems are crucial for the development of quantum algorithms for data analysis. In this study, we present two innovative data encoding techniques, known as QCrank and QBArt, which exhibit significant quantum parallelism via uniformly controlled rotation gates. The QCrank method encodes a series of real-valued data as rotations on data qubits, resulting in increased storage capacity. On the other hand, QBArt directly incorporates a binary representation of the data within the computational basis, requiring fewer quantum measurements and enabling well-established arithmetic operations on binary data. We showcase various applications of the proposed encoding methods for various data types. Notably, we demonstrate quantum algorithms for tasks such as DNA pattern matching, Hamming weight computation, complex value conjugation, and the retrieval of a binary image with 384 pixels, all executed on the Quantinuum trapped-ion QPU. Furthermore, we employ several cloud-accessible QPUs, including those from IBMQ and IonQ, to conduct supplementary benchmarking experiments.

97 MATHEMATICS AND COMPUTING↗

In-orbit performance of the OAO inertial reference unit

The Inertial Reference Unit (IRU) used in NASA's Orbiting Astronomical Observatory uses three single degree of freedom, floated, rate-integrating gyros operated in binary, pulse-restrained torque loops to provide an inertial attitude reference for the spacecraft's attitude control system. The drift rates observed on these inertial grade gyros during the 1 1/2 year of in-orbit operation have remained within a band of 16 arcsec per hour peak-to-peak. When the effects of known disturbances are considered, the standard deviation of drift rate appears to approach one arcsec per hour. Included in this paper are a brief description of the OAO and IRU, a summary of the data reduction programs used to calibrate the IRU in orbit, and some thoughts on how gyros with good long-term drift stability could be applied to future spacecraft such as the Large Space Telescope and Earth Observatory Satellite.

Harris, R. A.↗

Single-channel digital command-detection system

System, fabricated of highly-reliable digital logic elements, operates on binary pulse-code-modulated signals and derives internal synchronization from data signal. All-digital implementation of detector develops synchronization from data signal by computer cross-correlation of command modulation signal with its expected forms in sequence and adjusts detector phases in accordance with correlation peaks.

Carl, C. C.↗

Competitively priced hydrogen via high-efficiency nuclear electrolysis

A fully dedicated nuclear-electrolytic hydrogen-production facility, based on advanced (1985) technology, has been synthesized and assessed at the conceptual level. The facility integrates an HTGR operating a binary shaftpower-extraction cycle at 980 C top temperature, direct dc electricity generation via acyclic generators, and high-current density high-pressure electrolyzers based on the solid polymer electrolyte approach. All subsystems are close-coupled and optimally interfaced. Pipeline-pressure hydrogen and coproduct oxygen are produced at 6900 kPa. On consistent costing bases, the advanced facility concept was found to provide hydrogen costs that were approximately half those associated with conventional, contemporary-technology nuclear electrolysis. The nuclear heat-to-hydrogen energy conversion efficiency for the advanced system was estimated as 43%, against 25% for the baseline present-day approach.

Escher, W. J. D.↗