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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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Wide‐Field Bond Quality Evaluation Using Frequency Domain Thermoreflectance with Deep Neural Network Feature Reconstruction

Heterogeneous integration of microelectronic components provides a pathway to improve circuit/component performance; however, this comes with assembly challenges, in particular due to complex interfaces via subsurface bump bonds. The ability of these bonds to transmit electrical signals and conduct heat to the carrier substrate limits component performance. In this work, hyperspectral frequency‐domain thermoreflectance (FDTR) imaging is demonstrated as a robust technique for evaluating the quality of subsurface indium bump bonds in a surrogate microelectronic sample. By performing microscale FDTR imaging with coarse motion image stitching, thermal phase maps that cover a 4 mm by 4 mm field‐of‐view with subsurface feature sensitivity at depths greater than 50 µm are obtained. The resulting FDTR hyperspectral data contains more than three million pixels and reveal the quality of subsurface microbump arrays. Wide‐field analysis of bonded versus gap regions is enabled by deep neural network feature reconstruction, that after training, rapidly provides an interpretable representation of bond quality. Utility of noisy higher frequency FDTR phase maps, i.e., near the computationally predicted sensing depth limit, results in an average prediction error of 11%. Taken together, FDTR with neural network‐based analysis demonstrates subsurface bond monitoring at length scales relevant for heterogeneously integrated microelectronics.

FDTR↗

A 3D-Printed Millimeter-Wave Inline Waveguide-to-Coplanar-Waveguide Transition to Enable Dense Spectrometer Arrays for Intensity Mapping Surveys

We present a 3D-printed millimeter-wave, octave-bandwidth, in-line waveguide-to-coplanar-waveguide transition designed to enable focal planes with dense arrays of on-chip spectrometers. These arrays will enable compelling surveys of the large-scale structure of the universe through millimeter-wave intensity mapping. The transition consists of a four-step ridge-waveguide transformer that couples light from a rectangular waveguide onto a coplanar waveguide via an electrical connection made with indium bump bonds. We develop a tolerance-aware optimization approach to identify high-performance transition geometries that are robust to manufacturing variations; the same formulation can be applied to other tolerance-sensitive design problems. We also describe the implementation of a custom apparatus and procedure for bump-bonding a silicon chip to a metallized 3D-printed component. We detail the fabrication of the coplanar waveguide chip and three-dimensional waveguide structure, simulations and metrology of a test device, and room temperature reflectance measurements of this device. The room temperature metrology and reflection measurements are consistent with a model that predicts a coupling efficiency of $\mathord{\sim} 95\%$ at cryogenic temperatures in the 85-170 GHz frequency range.

Stover, Austin [Chicago U.; Chicago U., KICP] (ORC↗

On-PIC Light Source Integration & Micro-dispensing of Solder Paste for Flip Chip Application

To reach the next level benefits of photonic integrated circuits (PICs), the Integrated Photonic Systems Roadmap-International describes the necessity of either heterogeneous or hybrid integration of light sources [1]. A new approach for hybrid integration is Photonic Wire Bonding where 3D nanolithography is used to pattern a polymer waveguide that connects light sources to PIC waveguides. The waveguides resemble electrical wire bonds and essentially do the same as their electrical counterpart for packaging photonic chips together. In order to reap the full benefits of a photonic wire bonds, the light source must be carefully packaged. In this work I seek to expand RIT’s photonic packaging capability by establishing a packaging process to integrate light sources, specifically an Indium Phosphide distributed feedback lasers and a reflective semiconductor optical amplifiers, directly onto a photonic integrated circuits. Another necessary requirement for PIC packaging is densely integrated electrical connectivity. In this thesis I developed a fine pitch flip chip interconnect technique demonstrated using gold stud bumps in conjunction with micro-dispensed solder paste. This work opens the door to high density photonic flip chip applications. The micro-dispensed solder paste dots having diameters 50-125 µm are currently being tested at a pitch of 150 µm . The gold stud bumps are formed with 1mil gold wire creating bumps with a diameter of 40-60 µm depending on specific parameter values. These capabilities will allow RIT to assemble and test novel photonic integrated devices, cutting down on the time and cost associated with third party assembly and tests facilities. Thereby keeping RIT at the forefront of photonic research.

Wongk, Nicole↗