Single event effects induced by heavy ions in SONOS charge trapping memory arrays.
Abstract not provided.
Xiao, Tianyao↗
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Analog computing using SONOS charge trap memory for low-power space-borne artificial intelligence
Full paper submission for accepted GOMAC'25 oral presentation.
Xiao, Tianyao Patrick [Sandia National Laboratorie↗
Ionizing radiation effects in SONOS-based neuromorphic inference accelerators
Here, we evaluate the sensitivity of neuromorphic inference accelerators based on Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) charge trap memory arrays to total ionizing dose (TID) effects. Data retention statistics were collected for 16 Mbit of 40 nm SONOS digital memory exposed to ionizing radiation from a Co-60 source, showing good retention of the bits up to the maximum dose of 500 krad(Si). Using this data, we formulate a rate-equation-based model for the TID response of trapped charge carriers in the ONO stack, and predict the effect of TID on intermediate device states between ‘program’ and ‘erase’. This model is then used to simulate arrays of low-power, analog SONOS devices that store 8-bit neural network weights and support in situ matrix-vector multiplication. We evaluate the accuracy of the irradiated SONOS-based inference accelerator on two image recognition tasks – CIFAR-10 and the challenging ImageNet dataset – using state-of-the-art convolutional neural networks, such as ResNet-50. We find that across the datasets and neural networks evaluated, the accelerator tolerates a maximum TID between 10 krad(Si) and 100 krad(Si), with deeper networks being more susceptible to accuracy losses due to TID.
43 PARTICLE ACCELERATORS↗
Low Power, Radiation Resilient Synchronous Edge Processing for Remote Monitoring
Next-generation space remote sensing systems may be equipped with imaging arrays that sense data at a rate that outstrips the processing capability of any computing hardware that can operate within a satellite’s power budget. This project developed novel convolutional and recurrent neural networks to detect and estimate point-like events amid clutter, and investigated their efficient and accurate implementation on analog in-memory computing systems that are 10-1000× more energy-efficient than digital processors. This project leveraged two memory devices at different levels of technological maturity: a large-scale analog computing prototype using commercial SONOS charge-trap memory, and electrochemical memory (ECRAM) with intrinsic radiation hardness. We experimentally demonstrated end-to-end analog processing of our neural networks on SONOS and characterized the radiation response of both SONOS and ECRAM. We advanced the state-of-the-art in ECRAM precision and reliability, and developed co-design methods to enable accurate long-term operation of SONOS analog accelerators in space radiation environments.
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
Disturb testing in flash memories
Non-volatile memory technology as defined by NAND architecture flash memory continues to lead the process scaling and device shrinking efforts of the entire integrated circuit industry. 45- nm technology nodes are now producing commercial 32Gb devices. These latest 32Gb devices are pioneering new charge trapping memory cell technologies using metal gates and high-k dielectric materials. These cells are called TANOS and consist of tantalum-nitride, aluminum oxide (high k material), nitride, oxide, and silicon. Such high-density memories continue to revolutionize commercial electronics in terms of new high-speed data architectures and significant reductions in overall power and weight consumption. In stark contrast, nearly all science-based interplanetary and earth-orbiting NASA spacecraft are still designing in and around mid-1980s-level non-volatile technology with 1Mb Electrically Erasable Read-Only Memory (EEPROM) devices. NASA has typically shunned the use of modern flash devices because of radiation and reliability concerns due to the commercial-offthe– shelf (COTS) nature of the NAND flash technology. Given the significant potential increases in overall system capability these modern flash devices could bring to NASA missions, it is important to continue to investigate these devices. This report will investigate certain portions of the reliability performance of NAND flash devices, specifically the disturb properties. Understanding the possible limitations such new non-volatile memory technology presents to NASA is the goal of this report.
Freie, Michael↗
An Accurate, Error-Tolerant, and Energy-Efficient Neural Network Inference Engine Based on SONOS Analog Memory
In this work, we demonstrate SONOS (silicon-oxide-nitrideoxide- silicon) analog memory arrays that are optimized for neural network inference. The devices are fabricated in a 40nm process and operated in the subthreshold regime for in-memory matrix multiplication. Subthreshold operation enables low conductances to be implemented with low error, which matches the typical weight distribution of neural networks, which is heavily skewed toward near-zero values. This leads to high accuracy in the presence of programming errors and process variations. We simulate the end-to-end neural network inference accuracy, accounting for the measured programming error, read noise, and retention loss in a fabricated SONOS array. Evaluated on the ImageNet dataset using ResNet50, the accuracy using a SONOS system is within 2.16% of floating-point accuracy without any retraining. The unique error properties and high On/Off ratio of the SONOS device allow scaling to large arrays without bit slicing, and enable an inference architecture that achieves 20 TOPS/W on ResNet50, a >10× gain in energy efficiency over state-of-the-art digital and analog inference accelerators.
97 MATHEMATICS AND COMPUTING↗
Nonvolatile Memory Technology for Space Applications
This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.
Oldham, Timothy R.↗
Programmable Cryogenic Memory in a Ge/GeSi Heterostructure
Programmable memory components that operate optimally at cryogenic temperatures are essential for cryogenic computing architectures that seek to implement computing-in-memory. In this work, we demonstrate highly programmable memory in a Ge/GeSi heterostructure field-effect transistor (HFET). To operate, the HFET is gated to introduce positive carriers within the Ge quantum well, creating a high-conductance state. We show that this device can be set to a low-conductance state by sweeping a negative bias on the device drain, and reset it to its high-conductance state by sweeping a more positive bias on the device gate, thereby creating memory. We then determine that the device can be programmed within a 103 range of conductances using either the SET or the RESET operation. We propose that memory is achieved through charge trapping as carriers tunnel out of the quantum well, and that altering the density and spatial distribution of carriers modulates the device conductance. This mechanism exhibits endurance over 1000 cycles at temperatures ≤ 25 K, suggesting that the carrier traps are located at the oxide-semiconductor interface. As a first demonstration of programmable conductance in a Ge/GeSi HFET, this work highlights the potential of group-IV HFETs to perform as analog cryogenic memory components.
cryogenic memory↗
Knowledge gaps for neuromorphic ionic computing
BACKGROUND Neuromorphic computing, inspired by the human brain’s ability to process information efficiently, represents a transformative approach to computation. In this Review, we explore the emerging field of neuromorphic ionic computing, which leverages ionic conduction and coupling to mimic neural processes, and identify critical knowledge gaps that must be addressed to realize its full potential. A central theme of the discussion is energy efficiency, a challenge that is both a limitation and an opportunity for this technology. Although complementary metal-oxide semiconductor (CMOS)–based neuromorphic technologies have made strides in scaling to billions of neurons and are increasingly applied in artificial intelligence and numerical computing, they remain orders of magnitude behind the human brain in terms of connectivity and energy efficiency. Neuromorphic ionic computing promises to overcome these limitations by leveraging the distinct architectural and operational principles of the brain. Our brains achieve this energy efficiency by combining several key features: using the same network elements to store and process information; using an incredibly complex and massively interconnected three-dimensional (3D) network of locally active elements that enables sparsity, robustness in the presence of noise, adaptation, and life-long learning; computing at comparatively low voltage and frequency; and last, taking advantage of a plethora of ions and small molecules as information carriers. Here, we propose that ionic computing systems can take advantage of similar features to achieve substantial gains in energy efficiency. ADVANCES Since the first reports of neuromorphic ionic behavior in nanofluidic channels, we have witnessed an explosion of reports that used ionic devices to produce synaptomimetic behaviors. However, achieving the goals of ionic computing requires not only implementation of much more sophisticated device functionality but also overcoming fundamental barriers in materials science, device architecture, and system integration. Current ionic devices, even those incorporating state-of-the-art materials, still suffer from limited functionality and stability, which restrict their performance and increase energy demands. Developing new materials with enhanced ionic properties is essential to overcome these limitations. Similarly, the design of neuromorphic devices must evolve to leverage the particular advantages of ionic processes. Existing architectures often follow a single-information-carrier logic of conventional electronics or are constructed of mesoscale fluidics, failing to capitalize on the energy-efficient mechanisms inherent to ionic systems or implement the multiple-information-carrier paradigm. Current neuromorphic chips focus on large-scale networks of analog memory elements based on mechanisms such as charge trap (flash), filamentary, phase change, or spin, which are built on top of a network of artificial CMOS neurons. Although such prototype networks have achieved impressive performance, it is difficult to envision how they can implement the key features such as massive connectivity, sophisticated plasticity, adaptability, sparsity, and “multichromatic” computing. Although small-scale devices have demonstrated promising results, integrating them, maintaining energy efficiency, and implementing temperature control as systems grow in complexity and size to computationally relevant scale remain major hurdles. Furthermore, interfacing neuromorphic ionic devices with existing computing technologies presents technical and conceptual challenges that will require innovative approaches that combine insights from neuroscience, materials science, and engineering. OUTLOOK Despite these challenges, the potential impact of neuromorphic ionic computing is profound with potential applications ranging from artificial intelligence to robotics and beyond. We also argue that neuromorphic ionic computing systems should not, at least in the beginning, compete with CMOS technologies but rather should focus on applications that require extreme energy efficiency with chemical and/or biological compatibility, such as biomedical applications (for example, brain-computer interfaces), environmental monitoring, and agricultural and food applications. Ultimately, this Review highlights the crucial role of interdisciplinary collaboration in advancing the field. Neuromorphic ionic computing is not merely a technological innovation; it represents a substantial step toward sustainable computation, aligning with the growing demand for energy-conscious solutions in a world that is increasingly reliant on data and computation.
Neuromorphic↗
Annual Conference on Nuclear and Space Radiation Effects, 15th, University of New Mexico, Albuquerque, N. Mex., July 18-21, 1978, Proceedings
Radiation effects in MOS devices and circuits are considered along with radiation effects in materials, space radiation effects and spacecraft charging, SGEMP, IEMP, EMP, fabrication of radiation-hardened devices, radiation effects in bipolar devices and circuits, simulation, energy deposition, and dosimetry. Attention is given to the rapid anneal of radiation-induced silicon-sapphire interface charge trapping, cosmic ray induced errors in MOS memory cells, a simple model for predicting radiation effects in MOS devices, the response of MNOS capacitors to ionizing radiation at 80 K, trapping effects in irradiated and avalanche-injected MOS capacitors, inelastic interactions of electrons with polystyrene, the photoelectron spectral yields generated by monochromatic soft X radiation, and electron transport in reactor materials.
Simons, M.↗
Galactic Cosmic Radiation (GCR) Measurements Made by M-42 Active Dosimeters on NASA Balloon Flights (New Mexico & Antarctica) Resemble Levels Expected at Mars
Mimicking galactic cosmic radiation (GCR) is difficult with ground-based simulations and experimental results are limited by facility constraints. In the past year, we flew two consecutive missions on large NASA scientific balloons (to ~ 38 km altitude) launched from New Mexico (6.5-hr flight) and Antarctica (32-d flight) and will report GCR doses comparable to levels expected at the equatorial Mars surface. Measurements were made in collaboration with the DLR and utilizing the M-42 active radiation dosimeter developed for use on Artemis 1. The M-42 instrument stores data in flash memory, records charged particles over a substantial part of the trapped proton and the GCR LET spectrum, and can be easily integrated into payloads due to its compact size (182 x 44 x 22 mm; 237 g) and internal battery (up to 6 weeks of operation). Our presentation will provide an overview of the two recent balloon missions (payload description; flight profiles), and summarize the radiation data collected in the middle stratosphere, highlighting how robust, real GCR exposures can be achieved without needing to fly orbital or deep space experiments.
radiation↗
Quantitative Analysis of Charge Injection and Discharging of Si Nanocrystals and Arrays by Electrostatic Force Microscopy
NASA requirements for computing and memory for microspacecraft emphasize high density, low power, small size, and radiation hardness. The distributed nature of storage elements in nanocrystal floating-gate memories leads to intrinsic fault tolerance and radiation hardness. Conventional floating-gate non-volatile memories are more susceptible to radiation damage. Nanocrystal-based memories also offer the possibility of faster, lower power operation. In the pursuit of filling these requirements, the following tasks have been accomplished: (1) Si nanocrystal charging has been accomplished with conducting-tip AFM; (2) Both individual nanocrystals on an oxide surface and nanocrystals formed by implantation have been charged; (3) Discharging is consistent with tunneling through a field-lowered oxide barrier; (4) Modeling of the response of the AFM to trapped charge has allowed estimation of the quantity of trapped charge; and (5) Initial attempts to fabricate competitive nanocrystal non-volatile memories have been extremely successful.
Bell, L. D.↗
Exploring transport-enabled gates with integrated optical addressing to demonstrate high fidelity control of trapped ion qubits in a scalable quantum computer
In recent years, experiments involving micofabricated surface ion traps have grown in complexity, and as this complexity grows, a common design has emerged in the form of quantum charge-coupled device architecture. This architecture, already utilized on multiple systems, supports multiple zones on a device for areas such as memory or computation. The shutting process between these zones is a process often seen to be minimized. An additional component to scalable surface trapped-ion experiments includes some form of integrated photonics, as free space lasers have difficulty scaling to many ions. Here, we discuss recent results in utilizing the shuttling process with integrated photonics to perform a specific type of gate, as well as demonstrating state preparation. Furthermore, we show that these gates can be utilized as a type of optical modulator as the Doppler shift that occurs during shuttling will make the light seen by shuttled ions different than that seen by stationary ions. Furthermore, we show that the shuttling operation can be utilized as an optical modulator, where the Doppler shift changes the frequency from that of a stationary ion.
42 ENGINEERING↗
Investigation of field induced trapping on floating gates
The development of a technology for building electrically alterable read only memories (EAROMs) or reprogrammable read only memories (RPROMs) using a single level metal gate p channel MOS process with all conventional processing steps is outlined. Nonvolatile storage of data is achieved by the use of charged floating gate electrodes. The floating gates are charged by avalanche injection of hot electrodes through gate oxide, and discharged by avalanche injection of hot holes through gate oxide. Three extra diffusion and patterning steps are all that is required to convert a standard p channel MOS process into a nonvolatile memory process. For identification, this nonvolatile memory technology was given the descriptive acronym DIFMOS which stands for Dual Injector, Floating gate MOS.
Gosney, W. M.↗
Mechanisms of Protonic Nonvolatile Memory Device
A nonvolatile memory device based on protonic transport in oxides has been proposed. The mobile H+ ions are introduced into the SiO2 layer by annealing Si/SiO2/Si structures in H2 at temperatures greater than 500 deg C. This effect has only been observed for confined oxides that have been annealed at greater than or equal to 1100 C prior to the hydrogenation anneal. This includes buried oxides such as Unibond and SIMOX as well as thermal oxides annealed with a polysilicon cap. An applied field moves the charge within the oxide and the charge stops moving when the field is removed. In a memory device, the hydrogen-annealed oxide is the gate oxide and the position of the mobile charge is sensed by the shift of the I-V curve. Much is still not understood about the motion of the charge across the buried oxide. Previous work has assumed that H+ transport and the time it takes to traverse the oxide is governed by interactions within the bulk of the oxide. Based on parameters that affect the transport time, we conclude that H+ trapping and detrapping at the Si/SiO2 interface are more important than H+ interactions within the oxide bulk. These parameters include the applied field, the H+ concentration and the oxide thickness. One consequence is that projections of device write-time based on the previous assumptions of H+ transport mechanisms may be overly optimistic.
P J Macfarlane↗
Sheath transitions in a cylindrical filament discharge: Axisymmetric 1D3V PIC-MCC simulations
We present the first nonplanar hot cathode discharge simulations that capture the role of the trapped-ions plasma, elucidating new phenomena unobservable in planar geometric discharges. A discharge struck between a single emitting wire filament cathode and a bounding anode is simulated in cylindrical geometry using an axisymmetric (radial) particle-in-cell Monte-Carlo collisions code. Operating the discharge near its ionization energy threshold can lead to the formation of a two plasma mode (TPM). One plasma forms in the conventional upstream region through electron impact ionization of background neutrals. A second plasma, whose global effect on the discharge was not previously well understood, forms downstream through the trapping of cold ions in the potential well of the filament’s virtual cathode, a process enabled by ion-neutral charge exchange collisions. Three space charge regions intersperse the electrode gap—an emissive sheath between the cathode filament and trapped-ions plasma, a double layer between the two plasmas, and a classical sheath between the upstream plasma and the outer anode. Simulations exhibit mode transitions and quenching instabilities that transform the discharge between the TPM and other single-plasma sheath modes that include classical (temperature-limited), space charge limited, and inverse (anode glow) modes. The transitions are explained via “aid-and-compete” dynamics wherein the growth of one plasma enhances growth in the other while concurrently exhibiting expansion dynamics antagonistic to each other. The system exhibits strong hysteresis memory during the mode transitions. Improved understanding and control of these sheath mode transitions are expected to benefit plasma applications with hot cathodes.
Electrical hysteresis↗
Effect of Gamma Radiation on TaOₓ ECRAM
Electrochemical random access memory (ECRAM) is an emerging three-terminal nonvolatile memory (NVM) with highly controllable channel conductance which is promising for use as an analog memory (or synapse) in analog in-memory computing (IMC) systems. Energy-efficient analog IMC computing is particularly desirable for power-constrained, high-radiation environments such as satellites. However, little is known about the suitability of ECRAM for use in a total ionizing dose (TID) environment. Here, this work investigates the effect of Co-60 gamma radiation on the channel conductance and noise—two properties critical for analog IMC systems—of a TaO x -based ECRAM up to 17.3 Mrad(SiO 2 ) for both low- and high-channel-conductance state devices. A transient increase in conductance is observed in response to radiation which consists of two elements: an immediate increase in conductivity due to photocurrent and a secondary increase in conductivity, which has a slower rise and saturation and can persist for hours after exposure. This secondary, persistent photoconductivity is attributed to charging caused by hole trapping. These transient effects would not likely occur in a space environment due to the low dose rate compared with this experiment. No permanent change is found in the low conductance state (LCS) following exposure and the minor shift in the high conductance change would be less significant than the regular retention decay in this state. A permanent increase in the random telegraph noise is observed, possibly due to increased traps created in the channel. This work demonstrates that TaO x -based ECRAM is suitable for use in spaceborne analog IMC systems that are subject to significant TID.
ECRAM↗
Nanoscale Probing of Electrical Memory Effects in van der Waals Layered PdSe 2
Tunable electronic materials that can be switched between different impedance states are fundamental to the hardware elements for neuromorphic computing architectures. This “brain-like” computing paradigm uses highly paralleled and colocated data processing, leading to greatly improved energy efficiency and performance compared to traditional architectures in which data have to be frequently transferred between processor and memory. In this work, we use scanning microwave impedance microscopy for nanoscale electrical and electronic characterization of two-dimensional layered semiconductor PdSe 2 to probe neuromorphic properties. The local resolution of tens of nanometers reveals significant differences in electronic behavior between and within PdSe 2 nanosheets (NSs). In particular, we detected both n-type and p-type behaviors, although previous reports only point to ambipolar n-type dominating characteristics. Nanoscale capacitance–voltage curves and subsequent calculation of characteristic maps revealed a hysteretic behavior originating from the creation and erasure of Se vacancies as well as the switching of defect charge states. In addition, stacks consisting of two NSs show enhanced resistive and capacitive switching, which is attributed to trapped charge carriers at the interfaces between the stacked NSs. Stacking n- and p-type NSs results in a combined behavior that allows one to tune electrical characteristics. In conclusion, as local inhomogeneities of electrical and electronic behavior can have a significant impact on the overall device performance, the demonstrated nanoscale characterization and analysis will be applicable to a wide range of semiconducting materials.
2D material↗