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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

The ABC130 barrel module prototyping programme for the ATLAS strip tracker

For the Phase-II Upgrade of the ATLAS Detector [1], its Inner Detector, consisting of silicon pixel, silicon strip and transition radiation sub-detectors, will be replaced with an all new 100% silicon tracker, composed of a pixel tracker at inner radii and a strip tracker at outer radii. The future ATLAS strip tracker will include 11,000 silicon sensor modules in the central region (barrel) and 7,000 modules in the forward region (end-caps), which are foreseen to be constructed over a period of 3.5 years. The construction of each module consists of a series of assembly and quality control steps, which were engineered to be identical for all production sites. In order to develop the tooling and procedures for assembly and testing of these modules, two series of major prototyping programs were conducted: an early program using readout chips designed using a 250 nm fabrication process (ABCN-250) [2,2] and a subsequent program using a follow-up chip set made using 130 nm processing (ABC130 and HCC130 chips). This second generation of readout chips was used for an extensive prototyping program that produced around 100 barrel-type modules and contributed significantly to the development of the final module layout. This paper gives an overview of the components used in ABC130 barrel modules, their assembly procedure and findings resulting from their tests.

47 OTHER INSTRUMENTATION↗
DOE OSTI2026

Developing a GUI for the Robotic Test Stand

The introduction of this poster explains the technology behind DUNE’s far and near detectors and how passing neutrinos generate electrons that drift into a wire grid. I then explain how 3 ASICs manage signals received from electron interception. Next, the poster states how COLDATA chips are undergoing quality control by a Robotic Test Stand using a state machine. I further explained how earlier tests were done via a command line script and the necessity to implement a user-friendly Graphical User Interface with new features a command line can’t implement. For the implementation section, tools and methods for implementation are listed such as Python, tkinter, and GitHub as well as how multithreading and queue implementation was necessary for GUI functionality. Then, I elaborated on the GUIs new features. Finally, I explain how the GUI will be distributed across multiple institutions and future changes planned for the GUI. Photos of the RTS, far detector cave, diagram of anode assembly plane, COLDATA chips, set up tab, result tab, and legacy command line interface are shown.

Gutierrez Villanueva, Jaziel [DuPage Coll.]↗
DOE OSTI2020

Setting operating points for circuits in an integrated circuit chip using an integrated voltage regulator power loss model

An apparatus includes an integrated circuit chip with a set of circuits having two or more subsets of circuits; an external voltage regulator separate from the integrated circuit chip; two or more integrated voltage regulators on the integrated circuit chip that each provide an input voltage to a respective subset of the circuits; and a controller. The controller determines, using an integrated voltage regulator power loss model, an electrical power loss for the integrated voltage regulators for a first combination of operating points for the subsets of the circuits. The controller then determines, based on the electrical power loss, a second combination of operating points for the subsets of the circuits that includes an adjustment to an operating point for at least one of the subsets of the circuits that compensates for an electrical power loss of the corresponding integrated voltage regulator. The controller sets an operating point of each of the subsets of the circuits based on the second combination of operating points.

42 ENGINEERING↗
DOE OSTI2022

A combined experimental and numerical approach that eliminates the non-uniqueness associated with the Johnson-Cook parameters obtained using inverse methods

Abstract Johnson-Cook constitutive model is a commonly used material model for machining simulations. The model includes five parameters that capture the initial yield stress, strain-hardening, strain-rate hardening, and thermal softening behavior of the material. These parameters are difficult to determine using experiments since the conditions observed during machining (such as high strain-rates of the order of $$10^5$$ 10 5 /sec - $$10^6$$ 10 6 /sec) are challenging to recreate in the laboratory. To address this problem, several researchers have recently proposed inverse approaches where a combination of experiments and analytical models are used to predict the Johnson-Cook parameters. The errors between the measured cutting forces, chip thicknesses and temperatures and those predicted by analytical models are minimized and the parameters are determined. In this work, it is shown that only two of the five Johnson-Cook parameters can be determined uniquely using inverse approaches. Two different algorithms, namely, Adaptive Memory Programming for Global Optimization (AMPGO) and Particle Swarm Optimization (PSO), are used for this purpose. The extended Oxley’s model is used as the analytical tool for optimization. For determining a parameter’s value, a large range for each parameter is provided as an input to the algorithms. The algorithms converge to several different sets of values for the five Johnson-Cook parameters when all the five parameters are considered as unknown in the optimization algorithm. All of these sets, however, yield the same chip shape and cutting forces in FEM simulations. Further analyses show that only the strain-rate and thermal softening parameters can be determined uniquely and the three parameters present in the strain-hardening term of the Johnson-Cook model cannot be determined uniquely using the inverse method. A combined experimental and numerical approach is proposed to eliminate this determine all parameters uniquely.

42 ENGINEERING↗
DOE OSTI2023

On-chip parallel processing of quantum frequency comb

Abstract The frequency degree of freedom of optical photons has been recently explored for efficient quantum information processing. Significant reduction in hardware resources and enhancement of quantum functions can be expected by leveraging the large number of frequency modes. Here, we develope an integrated photonic platform for the generation and parallel processing of quantum frequency combs (QFCs). Cavity-enhanced parametric down-conversion with Sagnac configuration is implemented to generate QFCs with identical spectral distributions. On-chip quantum interference of different frequency modes is simultaneously realized with the same photonic circuit. High interference visibility is maintained across all frequency modes with the identical circuit setting. This enables the on-chip reconfiguration of QFCs. By deterministically separating QFCs without spectral filtering, we further demonstrate high-dimensional Hong-Ou-Mandel effect. Our work provides the critical step for the efficient implementation of quantum information processing with integrated photonics using the frequency degree of freedom.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2025

PSEC5 Physical Verification

Ultra-Fast timing detectors, having a time resolution of 10pSec or less, are becoming increasingly important for many scientific disciplines, including High Energy Physics, Nuclear Physics, Medical Imaging and more. When developing ultra-fast detectors such as MCPs, LAPPDs, LGADs, SNSPDs, it is necessary to have access to a readout system that is low power, can support many channels and is cost effective. The PSEC5 chip was an application specific integrated circuit (ASIC) developed by the pioneering group of Prof. Henry Frisch at University of Chicago and micro electronic engineers at Fermi National Accelerator Laboratory. Three boards were designed, two to implement the readout system for an LAPPD and one to only characterize the PSEC1 chip. The main goal of the project shifted to setting up a testing environment to focus on the characterization of the chip. My student and I tested and characterized this ASIC using the third chip-on-board printed circuit board. Results show the successful fabrication and operation of some of the key building blocks and lead to the suggestions on modification for the second iteration of the chip.

Rico Aniles, H. D. [Unlisted]↗
DOE OSTI2020

Measurements of Single Event Upset in ATLAS IBL

Effects of Single Event Upsets (SEU) and Single Event Transients (SET) are studied in the FE-I4B chip of the innermost layer of the ATLAS pixel system. SEU/SET affect the FE-I4B Global Registers as well as the settings for the individual pixels, causing, among other things, occupancy losses, drops in the low voltage currents, noisy pixels, and silent pixels. Quantitative data analysis and simulations indicate that SET dominate over SEU on the load line of the memory. Operational issues and mitigation techniques are presented.

47 OTHER INSTRUMENTATION↗
DOE OSTI2021

Iterative self-organizing SCEne-LEvel sampling (ISOSCELES) for large-scale building extraction

Convolutional neural networks (CNN) provide state-of-the-art performance in many computer vision tasks, including those related to remote-sensing image analysis. Successfully training a CNN to generalize well to unseen data, however, requires training on samples that represent the full distribution of variation of both the target classes and their surrounding contexts. With remote sensing data, acquiring a sufficiently representative training set is a challenge due to both the inherent multi-modal variability of satellite or aerial imagery and the general high cost of labeling data. To address this challenge, we have developed ISOSCELES, an Iterative Self-Organizing SCEne LEvel Sampling method for hierarchical sampling of large image sets. Using affinity propagation, ISOSCELES automates the selection of highly representative training images. Compared to random sampling or using available reference data, the distribution of the training is principally data driven, reducing the chance of oversampling uninformative areas or undersampling informative ones. In comparison to manual sample selection by an analyst, ISOSCELES exploits descriptive features, spectral and/or textural, and eliminates human bias in sample selection. Using a hierarchical sampling approach, ISOSCELES can obtain a training set that reflects both between-scene variability, such as in viewing angle and time of day, and within-scene variability at the level of individual training samples. We verify the method by demonstrating its superiority to stratified random sampling in the challenging task of adapting a pre-trained model to a new image and spatial domain for country-scale building extraction. Using a pair of hand-labeled training sets comprising 1,987 sample image chips, a total of 496,000,000 individually labeled pixels, we show, across three distinct model architectures, an increase in accuracy, as measured by F1-score, of 2.2–4.2%.

42 ENGINEERING↗
DOE OSTI2024

Entropy Analysis of FPGA Interconnect and Switch Matrices for Physical Unclonable Functions

Random variations in microelectronic circuit structures represent the source of entropy for physical unclonable functions (PUFs). In this paper, we investigate delay variations that occur through the routing network and switch matrices of a field-programmable gate array (FPGA). The delay variations are isolated from other components of the programmable logic, e.g., look-up tables (LUTs), flip-flops (FFs), etc., using a feature of Xilinx FPGAs called dynamic partial reconfiguration (DPR). A set of partial designs is created to fix the placement of a time-to-digital converter (TDC) and supporting infrastructure to enable the path delays through the target interconnect and switch matrices to be extracted by subtracting out common-mode delay components. Delay variations are analyzed in the different levels of routing resources available within FPGAs, i.e., local routing and across-chip routing. Data are collected from a set of Xilinx Zynq 7010 devices, and a statistical analysis of within-die variations in delay through a set of the randomly-generated and hand-crafted interconnects is presented.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

Improved Charge Sensing on a SiMOS Double Quantum Dot using a Cryogenic Skipper Readout ASIC (Quandarum)

Major outstanding questions in high-energy physics such as the nature of dark matter and the existence of interactions beyond the standard model require new measurement techniques which are extremely sensitive to minute electromagnetic fields. An array of entangled spin qubits is a promising system for building novel detectors due to its combination of sensitivity and controllability. CMOS-based electron spin qubits, which have demonstrated the operational requirements for fault-tolerant quantum computing [1], offer a particular opportunity due to their compatibility with classical electronics, which allows the leveraging of decades of development of low-noise cryogenic detectors for physics. In this work, we combine a SiMOS double-quantum dot device architecture with a state-of-the-art cryoelectronic readout circuit [2-3] aimed to demonstrate improved charge readout using a single-electron transistor (SET). We identify the design characteristics for an SET that facilitate the use of on-chip classical electronics as a low-power, high-bandwidth first amplification stage and explore opportunities for sensor-readout co-design to minimize noise. This is the first of a series of steps to demonstrate high-fidelity readout of a large array of spin qubit with enough sensitivity to probe processes of interest for the investigation of beyond-standard-model physics.

Quinn, Adam [Fermilab]↗
DOE OSTI2021

Single photon sources with near unity collection efficiencies by deterministic placement of quantum dots in nanoantennas

Deterministic coupling between photonic nodes in a quantum network is an essential step toward implementing various quantum technologies. The omnidirectionality of free-standing emitters, however, makes this coupling highly inefficient, in particular if the distant nodes are coupled via low numerical aperture (NA) channels such as optical fibers. This limitation requires placing quantum emitters in nanoantennas that can direct the photons into the channels with very high efficiency. Moreover, to be able to scale such technologies to a large number of channels, the placing of the emitters should be deterministic. In this work, we present a method for directly locating single free-standing quantum emitters with high spatial accuracy at the center of highly directional bullseye metal–dielectric nanoantennas. We further employ non-blinking, high quantum yield colloidal quantum dots for on-demand single-photon emission that is uncompromised by instabilities or non-radiative exciton recombination processes. Taken together, this approach results in a record-high collection efficiency of 85% of the single photons into a low NA of 0.5, setting the stage for efficient coupling between on-chip, room temperature nanoantenna-emitter devices and a fiber or a remote free-space node without the need for additional optics.

36 MATERIALS SCIENCE↗
DOE OSTI2022

kynema-fmb [SWR-23-07]

Kynema-FMB (FKA: Kynema) is an open-source performance portable flexible multibody (FMB) dynamics solver designed for time-domain simulations. While originally tailored for wind turbine structural dynamics, the formulation and implementation are those of a general flexible-multidbody dynamics solver that can readily be applied to a wide range of systems. Kynema was designed with a narrow focus, namely to provide a lightweight, fast, accurate FMD solver for coupling to computational-fluid-dynamics (CFD) codes, especially the CFD codes in the Kynema suite, for fluid-structure-interaction (FSI) simulations. Kynema-FMB is equipped to model systems that can be represented as a collection of beams and rigid bodies that are connected through constraints. Degrees of freedom are defined in the inertial/global frame of reference and include displacements and rotations (formally as rotation matrices, but stored as quaternions). The underlying formulation is built on a Lie-group time integrator designed for index-3 differential-algebraic equations, which is second-order accurate in time (Bruls et al., 2012). Beam models are based on geometrically exact beam theory and are discretized as high-order spectral finite elements similar to those in BeamDyn (Wang et al., 2017). The governing equations for a FMD system like a wind turbine constitute a highly nonlinear system of constrained partial-differential equations. Kynema-FMB uses analytical Jacobians in the nonlinear-system solves in each time step. Linear systems use sparse storage and several third-party sparse-linear-system solvers are enabled. Ill conditioning of linear systems is mitigated with preconditioning described in Bottasso et al, 2008. Kynema-FMB is integrated with a simple open-source controller (ROSCO). There is an application programming interface (API) for coupling to geometry-resolved CFD (like that in Sharma et al., 2023) and actuator-force CFD (like that in Kuhn et al., 2025). In the latter, for actuator-line models, Kynema-FMB includes an internal blade-element solver that depends on user-provided lookup tables for coefficients of lift and drag, i.e., aerodynamic polars. Kynema-FMB is written in C++ and leverages Kokkos and Kokkos-Kernels (KokkosEcosystem) as its performance portability layer enabling simulations on both CPU and GPU systems. The repository is equipped with extensive automated testing at the unit and regression/system levels. The following describes the high-level development objectives conceived for Kynema: *Kynema will follow modern software development best practices, including test-driven development (TDD), version control, hierarchical automated testing, and continuous integration (CI) for a robust development environment. *The core data structures are memory efficient and enable vectorization and parallelization at multiple levels. *Data structures are data-oriented to exploit methods for accelerated computing including high utilization of chip resources (e.g., single instruction multiple data (SIMD) instruction sets) and parallelization using GP-GPUs. *The computational algorithms incorporate robust open-source libraries for mathematical operations, resource allocation, and data management. *The API design considers multiple stakeholder needs and ensure integration with existing and future ecosystems for data science, machine learning, and AI. *Kynema-FMB is written in modern C++ and leverages Kokkos as its performance-portability library with inspiration from the kynema stack.

Sprague, MichaelA.↗
DOE OSTI2022

Node Monitoring as a Fault Detection Countermeasure against Information Leakage within a RISC-V Microprocessor

Advanced, superscalar microprocessors (μP) are highly susceptible to wear-out failures because of their highly complex, densely packed circuit structure and extreme operational frequencies. Although many types of fault detection and mitigation strategies have been proposed, none have addressed the specific problem of detecting faults that lead to information leakage events on I/O channels of the μP. Information leakage can be defined very generally as any type of output that the executing program did not intend to produce. In this work, we restrict this definition to output that represents a security concern, and in particular, to the leakage of plaintext or encryption keys, and propose a counter-based countermeasure to detect faults that cause this type of leakage event. Fault injection (FI) experiments are carried out on two RISC-V microprocessors emulated as soft cores on a Xilinx multi-processor System-on-chip (MPSoC) FPGA. The μP designs are instrumented with a set of counters that records the number of transitions that occur on internal nodes. The transition counts are collected from all internal nodes under both fault-free and faulty conditions, and are analyzed to determine which counters provide the highest fault coverage and lowest latency for detecting leakage faults. We show that complete coverage of all leakage faults is possible using only a single counter strategically placed within the branch compare logic of the μPs.

42 ENGINEERING↗
DOE OSTI2026

Directional dependence of equilibrated TLD-400 chips in multiple radiation fields

Fielding of thermoluminescent dosimeters (TLDs) for measurement of photon radiation dose in experiments is the standard practice for γ-irradiation facilities, pulsed power x-ray facilities, and reactor facilities at Sandia National Laboratories (SNL). Due to the high-dose experimental conditions and the mixed ( 1 n, γ) fields in these facilities, SNL radiation metrologists have historically used CaF 2 :Mn TLDs (also known as TLD-400). Recent inquiries to the radiation metrology staff have raised concerns that the aluminum-equilibrated TLD-400 chips may exhibit a directionally dependent response. The metrologists were asked whether the dose measured by the chip may be impacted by the angle of incidence on the equilibrated TLD. To provide a thorough answer to this query, a set of adjoint Monte Carlo radiation transport calculations was performed for three different equilibrated TLDs as well as bare TLD chips using the Integrated Tiger Series (ITS) code. The key feature of the adjoint calculations performed in this study is that each photon escaping the modeled geometry was tallied into angular bins to provide information on both the energy and angular dependence of the equilibrated chip. After the adjoint Monte Carlo calculations were completed, the resulting energy-dependent response function for each angular bin was convolved with multiple photon energy spectra representing various radiation facilities at SNL. The radiation facilities selected for analysis span a range of photon energies from approximately 1 keV up to approximately 20 MeV. Thus, the presented results are applicable to a wide variety of radiation facilities around the world. Although the bare TLD-400 chip was expected to display the largest variation due to the photon angle of impact on the dosimeter, the dosimeter with the thinnest aluminum equilibrator (SNL thin equilibrated TLD-400) was determined to have the biggest differential between the impact angle with the maximum dose ( D max ) and the impact angle with the minimum dose ( D min ). However, the SNL normal equilibrated TLD-400 chip demonstrated a dramatic reduction in that differential between maximum and minimum dose angles. The reduction in this differential is one of the dominant factors in experimenters’ choice to field these dosimeters at SNL radiation facilities. The results from the PNNL (Hanford) energy-flattening field capsule are consistent with the previous publications. The differential dose responses due to the photon impact angle indicate that experimenters should strive to field their TLD-400 dosimeters in a consistent manner to avoid additional uncertainty in the measurements based on dosimeter orientation.

Adjoint radiation transport↗
DOE OSTI2023

A user-friendly plug-and-play cyclic olefin copolymer-based microfluidic chip for room-temperature, fixed-target serial crystallography

Over the past two decades, serial X-ray crystallography has enabled the structure determination of a wide range of proteins. With the advent of X-ray free-electron lasers (XFELs), ever-smaller crystals have yielded high-resolution diffraction and structure determination. A crucial need to continue advancement is the efficient delivery of fragile and micrometre-sized crystals to the X-ray beam intersection. This paper presents an improved design of an all-polymer microfluidic `chip' for room-temperature fixed-target serial crystallography that can be tailored to broadly meet the needs of users at either synchrotron or XFEL light sources. The chips are designed to be customized around different types of crystals and offer users a friendly, quick, convenient, ultra-low-cost and robust sample-delivery platform. Compared with the previous iteration of the chip [Gilbile et al. (2021), Lab Chip , 21 , 4831–4845], the new design eliminates cleanroom fabrication. It has a larger imaging area to volume, while maintaining crystal hydration stability for both in situ crystallization or direct crystal slurry loading. Crystals of two model proteins, lysozyme and thaumatin, were used to validate the effectiveness of the design at both synchrotron (lysozyme and thaumatin) and XFEL (lysozyme only) facilities, yielding complete data sets with resolutions of 1.42, 1.48 and 1.70 Å, respectively. Overall, the improved chip design, ease of fabrication and high modifiability create a powerful, all-around sample-delivery tool that structural biologists can quickly adopt, especially in cases of limited sample volume and small, fragile crystals.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2025

The AMACStar ASIC for the HL-LHC ATLAS ITk Strip detector: design, verification, testing, and quality assurance

For the high-luminosity upgrade to the LHC (HL-LHC), the ATLAS detector at CERN requires an all-new inner detector, the Inner Tracker (ITk). The ITk Strip subdetector is made up of silicon modules, which include three types of radiation-hard ASICs. One of these is the Autonomous Monitor and Control (AMAC). The AMAC is manufactured by Global Foundries using 130 nm CMOS8RF DM technology and is approximately 3 by 5 mm in size. This ASIC autonomously monitors the temperatures, voltages, and currents in the module components while controlling critical values in order to prevent these quantities from reaching dangerous levels. The final design, AMACStar, was verified, tested, and ensured to perform all necessary functions. A quality control procedure using an in-house probe station set-up was developed in order to ensure that every individual chip on each wafer of AMACStars required by the ITk Strip project met performance requirements. The average per wafer yield of usable AMACStars is 92.33%, exceeding the design-specific 90% yield estimated for project costing. This estimate was based on actual yields for similar designs in this process.

Analogue electronic circuits↗
DOE OSTI2026

Optical nanofiber testbeds for benchmarking membrane-waveguide photonic integrated circuit platforms toward on-chip quantum inertial sensing

Recent advances in cold atom interferometry with optical and magnetic atom guides have set the stage for quantum inertial sensors capable of operating in dynamic environments. In this work, we present three key innovations—evanescent-field (EF) atom guides, optical nanofiber testbeds, and membrane-waveguide photonic integrated circuit (PIC) platforms—to advance EF-guided atom interferometry. First, we demonstrate EF atom guides on optical nanofiber testbeds, which serve as performance benchmarks for our membrane-waveguide PIC platforms. Second, we achieve low-power (⁠ ~ 5 mW) guiding of freely moving, laser-cooled 133 Cs atoms in two-color, traveling-wave EF optical dipole traps at the novel, heat-efficient magic wavelengths of 793 and 937 nm (i.e., “793/937-nm EF atom guides”). Concurrently, we design and fabricate membrane-waveguide PIC platforms for these EF atom guides; in our prior work, we showed that these structures safely accommodate 4–6 times the required optical trap power under vacuum and enable dense cold atom generation via magneto-optical trapping in the vicinity of the optical wavguide for efficient loading. Third, we verify preserved atomic coherence via microwave fields and EF-coupled Doppler-free Raman beams; to our knowledge, this is the first report of coherence fringes driven by co-propagating EF-coupled Raman beams with only 150 nW of total optical power. By providing a direct comparison between optical nanofiber testbeds and membrane-waveguide PIC platforms, our results lay critical groundwork for the on-chip realization of EF-guided atom interferometry and the development of fully integrated, compact, lightweight, and low-power quantum accelerometers and gyroscopes.

Orozco, Adrian [Sandia National Laboratories (SNL-↗