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Analog circuit is employed to smooth change between levels of quantized voltage signal without adversely affecting its fidelity. Circuit is applicable to units requiring interface between digital and analog systems such as automated manufacturing systems or industrial robots.
This paper describes the SPICE model of a transformer-rectified-filter (TRF) circuit and the Micro-CAP (Microcomputer Circuit Analysis Program) model and their application. The models were used to develop an actual circuit with reduced input current THD. The SPICE analysis consistently predicted the THD improvements in actual circuits as various designs were attempted. In an effort to predict and verify load regulation, the incorporation of saturable inductor models significantly improved the fidelity of the TRF circuit output voltage.
GaAs-based, sub-harmonically pumped Schottky diode mixers offer a number of advantages for array implementation in a heterodyne receiver system. Since the radio frequency (RF) and local oscillator (LO) signals are far apart, system design becomes much simpler. A proprietary planar GaAs Schottky diode process was developed that results in very low parasitic anodes that have cutoff frequencies in the tens of terahertz. This technology enables robust implementation of monolithic mixer and frequency multiplier circuits well into the terahertz frequency range. Using optical and e-beam lithography, and conventional epitaxial layer design with innovative usage of GaAs membranes and metal beam leads, high-performance terahertz circuits can be designed with high fidelity. All of these mixers use metal waveguide structures for housing. Metal machined structures for RF and LO coupling hamper these mixers to be integrated in multi-pixel heterodyne array receivers for spectroscopic and imaging applications. Moreover, the recent developments of terahertz transistors on InP substrate provide an opportunity, for the first time, to have integrated amplifiers followed by Schottky diode mixers in a heterodyne receiver at these frequencies. Since the amplifiers are developed on a planar architecture to facilitate multi-pixel array implementation, it is quite important to find alternative architecture to waveguide-based mixers.
Long coherence times and high fidelity control recently achieved in scalable superconducting circuits paved the way for the growing number of experimental studies of many-qubit quantum coherent phenomena in these devices. Albeit full implementation of quantum error correction and fault tolerant quantum computation remains a challenge the near term pre-error correction devices could allow new fundamental experiments despite inevitable accumulation of errors. One such open question foundational for quantum computing is achieving the so called quantum supremacy, an experimental demonstration of a computational task that takes polynomial time on the quantum computer whereas the best classical algorithm would require exponential time and/or resources. It is possible to formulate such a task for a quantum computer consisting of less than a 100 qubits. The computational task we consider is to provide approximate samples from a non-trivial quantum distribution. This is a generalization for the case of superconducting circuits of ideas behind boson sampling protocol for quantum optics introduced by Arkhipov and Aaronson. In this presentation we discuss a proof-of-principle demonstration of such a sampling task on a 9-qubit chain of superconducting gmon qubits developed by Google. We discuss theoretical analysis of the driven evolution of the device resulting in output approximating samples from a uniform distribution in the Hilbert space, a quantum chaotic state. We analyze quantum chaotic characteristics of the output of the circuit and the time required to generate a sufficiently complex quantum distribution. We demonstrate that the classical simulation of the sampling output requires exponential resources by connecting the task of calculating the output amplitudes to the sign problem of the Quantum Monte Carlo method. We also discuss the detailed theoretical modeling required to achieve high fidelity control and calibration of the multi-qubit unitary evolution in the device. We use a novel cross-entropy statistical metric as a figure of merit to verify the output and calibrate the device controls. Finally, we demonstrate the statistics of the wave function amplitudes generated on the 9-gmon chain and verify the quantum chaotic nature of the generated quantum distribution. This verifies the implementation of the quantum supremacy protocol.
We present a method for designing quantum circuits that perform non-unitary quantum computations on n-qubit states probabilistically, and give analytic expressions for the success probability and fidelity.
Techniques for an analog-to-digital converter (ADC) using pipeline architecture includes a linearization technique for a spurious-free dynamic range (SFDR) over 80 deciBels. In some embodiments, sampling rates exceed a megahertz. According to a second approach, a switched-capacitor circuit is configured for correct operation in a high radiation environment. In one embodiment, the combination yields high fidelity ADC (>88 deciBel SFDR) while sampling at 5 megahertz sampling rates and consuming <60 milliWatts. Furthermore, even though it is manufactured in a commercial 0.25-.mu.m CMOS technology (1 .mu.m=12.sup.-6 meters), it maintains this performance in harsh radiation environments. Specifically, the stated performance is sustained through a highest tested 2 megarad(Si) total dose, and the ADC displays no latchup up to a highest tested linear energy transfer of 63 million electron Volts square centimeters per milligram at elevated temperature (131 degrees C.) and supply (2.7 Volts, versus 2.5 Volts nominal).
The DC electrical behavior of n-type 4H-SiC resistors used for realizing 500C durable integrated circuits (ICs) is studied as a function of substrate bias and temperature. Improved fidelity electrical simulation is described using SPICE NMOS model to simulate resistor substrate body bias effect that is absent from the SPICE semiconductor resistor model.
The DC electrical behavior of n-type 4H-SiC resistors used for realizing 500 C durable integrated circuits (ICs) is studied as a function of substrate bias and temperature. Improved fidelity electrical simulation is described using SPICE NMOS model to simulate resistor substrate body bias effect that is absent from the SPICE semiconductor resistor model.
The DC electrical behavior of n-type 4H-SiC resistors used for realizing 500 degrees Celsius durable integrated circuits (ICs) is studied as a function of substrate bias and temperature. Improved fidelity electrical simulation is described using SPICE NMOS model to simulate resistor substrate body bias effect that is absent from the SPICE semiconductor resistor model.
Prolonged Venus surface missions (lasting months instead of hours) have proven infeasible to date in the absence of a complete suite of electronics able to function for such durations without protection from the planet’s extreme conditions of ~460 °C, ~9.3 MPa (~ 92 Earth atmospheres) chemically reactive environment. Here we report testing data from a successful two-month (60-day) operational demonstration of two 175-transistor 4H-SiC junction field effect transistor (JFET) semiconductor integrated circuits (ICs) directly exposed (no cooling and no protective chip packaging) to a high-fidelity physical and chemical reproduction of Venus surface atmospheric conditions in a test chamber. These results extend the longest reported duration of electronics operation in Venus surface atmospheric conditions almost 3-fold and were accomplished using prototype SiC JFET chips of more than 7-fold increased complexity. The demonstrated advancement marks a significant step towards realization of electronics with sufficient complexity and durability for implementing robotic landers capable of returning months of scientific data from the surface of Venus.
Topics covered include: Stable, Thermally Conductive Fillers for Bolted Joints; Connecting to Thermocouples with Fewer Lead Wires; Zipper Connectors for Flexible Electronic Circuits; Safety Interlock for Angularly Misdirected Power Tool; Modular, Parallel Pulse-Shaping Filter Architectures; High-Fidelity Piezoelectric Audio Device; Photovoltaic Power Station with Ultracapacitors for Storage; Time Analyzer for Time Synchronization and Monitor of the Deep Space Network; Program for Computing Albedo; Integrated Software for Analyzing Designs of Launch Vehicles; Abstract-Reasoning Software for Coordinating Multiple Agents; Software Searches for Better Spacecraft-Navigation Models; Software for Partly Automated Recognition of Targets; Antistatic Polycarbonate/Copper Oxide Composite; Better VPS Fabrication of Crucibles and Furnace Cartridges; Burn-Resistant, Strong Metal-Matrix Composites; Self-Deployable Spring-Strip Booms; Explosion Welding for Hermetic Containerization; Improved Process for Fabricating Carbon Nanotube Probes; Automated Serial Sectioning for 3D Reconstruction; and Parallel Subconvolution Filtering Architectures.
The advent and widespread use of the computer-generated image (CGI) device to simulate visual cues has a mixed impact on the realism and fidelity of flight simulators. On the plus side, CGIs provide greater flexibility in scene content than terrain boards and closed circuit television based visual systems, and they have the potential for a greater field of view. However, on the minus side, CGIs introduce into the visual simulation relatively long time delays. In many CGIs, this delay is as much as 200 ms, which is comparable to the inherent delay time of the pilot. Because most GCIs use multiloop processing and smoothing algorithms and are linked to a multiloop host computer, it is seldom possible to identify a unique throughput time delay, and it is therefore difficult to quantify the performance of the closed loop pilot simulator system relative to the real world task. A method to address these issues using the critical task tester is described. Some empirical results from applying the method are presented, and a novel technique for improving the performance of GCIs is discussed.
The recognition and understanding of cardiovascular adaptation to spaceflight has experienced substantial advancement in the last several years. In-flight echocardiographic measurements of astronaut cardiac function on the Space Shuttle have documented a 15 percent reduction in both left ventricular volume index and stroke volume with a compensatory increase in heart rate to maintain cardiac output. To date, the reduced cardiac size and stroke volume have been presumed to be the consequence of the reduction in circulating fluid volume following diuresis and other physiological processes to reduce blood volume within a few days after orbital insertion. However, no specific mechanism for the reduced stroke volume has been elucidated. The following investigation proposes the use of a hydraulic model of the cardiovascular system to examine the possibility that the observed reduction in stroke volume may, in part, be related to fluid physics effects on heart function. The automated model is being prepared to fly as a GAS payload. The experimental apparatus consists of a pneumatically actuated, elliptical artificial ventricle connected to a closed-loop, hydraulic circuit with compliance and resistance elements to create physiologic pressure and flow conditions. The ventricle is instrumented with high-fidelity, acceleration-insensitive, catheter-tip pressure transducers (Millar Instruments) in the apex and base to determine the instantaneous ventricular pressures and (delta)P(sub LV) across the left ventricle (LVP(sub apex)-LVP(sub base). The ventricle is also instrumented with a flow probe and pressure transducers immediately upstream of the inflow valve and downstream of the outflow valve. The experiment will be microprocessor controlled with analog signals stored on the FM data tape recorder. By varying the circulating fluid volume, ventricular function can be determined for varying preload pressures with fixed afterload pressure. Pilot experiments on board the NASA KC-135 aircraft have demonstrated proof-of-concept and provided early support for the proposed hypothesis. A review of the pilot experiments and developmental progress on the GAS version of this experiment will be presented.
Using Modem Design Tools for Digital Avionics Development Shrinking development time and increased complexity of new avionics forces the designer to use modem tools and methods during hardware development. Engineers at the Marshall Space Flight Center have successfully upgraded their design flow and used it to develop a Mongoose V based radiation tolerant processor board for the International Space Station's Water Recovery System. The design flow, based on hardware description languages, simulation, synthesis, hardware models, and full functional software model libraries, allowed designers to fully simulate the processor board from reset, through initialization before any boards were built. The fidelity of a digital simulation is limited to the accuracy of the models used and how realistically the designer drives the circuit's inputs during simulation. By using the actual silicon during simulation, device modeling errors are reduced. Numerous design flaws were discovered early in the design phase when they could be easily fixed. The use of hardware models and actual MIPS software loaded into full functional memory models also provided checkout of the software development environment. This paper will describe the design flow used to develop the processor board and give examples of errors that were found using the tools. An overview of the processor board firmware will also be covered.
There is a need to provide a portable and cost-effective galvanic isolation between ground support equipment and flight hardware such that any unforeseen voltage differential between ground and power supplies is eliminated. An interface board was designed for use between the ground support equipment and the flight hardware that electrically isolates all input and output signals and faithfully reproduces them on each side of the interface. It utilizes highly integrated multi-channel isolating devices to minimize size and reduce assembly time. This single-board solution provides appropriate connector hardware and breakout of required flight signals to individual connectors as needed for various ground support equipment. The board utilizes multi-channel integrated circuits that contain transformer coupling, thereby allowing input and output signals to be isolated from one another while still providing high-fidelity reproduction of the signal up to 90 MHz. The board also takes in a single-voltage power supply input from the ground support equipment and in turn provides a transformer-derived isolated voltage supply to power the portion of the circuitry that is electrically connected to the flight hardware. Prior designs used expensive opto-isolated couplers that were required for each signal to isolate and were time-consuming to assemble. In addition, these earlier designs were bulky and required a 2U rack-mount enclosure. The new design is smaller than a piece of 8.5 ~11-in. (.22 ~28-mm) paper and can be easily hand-carried where needed. The flight hardware in question is based on a lineage of existing software-defined radios (SDRs) that utilize a common interface connector with many similar input-output signals present. There are currently four to five variations of this SDR, and more upcoming versions are planned based on the more recent design.
Results of the first study using the real-time, man-in-the-loop Systems Engineering Simulator (SES) for track and capture of the Space Shuttle Orbiter with the space station manipulator are presented. The objectives include evaluation of the operational coordination required between the orbiter pilot and the space station manipulator operator, evaluation of the locations and required number of closed-circuit television cameras, and evaluation of the orbiter grapple fixture clearance geometry. The SES is a premium quality real-time facility with full fidelity orbiter and space station crew workstations and cockpits.
Topics covered include: Hybrid Architecture Active Wavefront Sensing and Control; Carbon-Nanotube-Based Chemical Gas Sensor; Aerogel-Positronium Technology for the Detection of Small Quantities of Organic and/or Toxic Materials; Graphene-Based Reversible Nano-Switch/Sensor Schottky Diode; Inductive Non-Contact Position Sensor; High-Temperature Surface-Acoustic-Wave Transducer; Grid-Sphere Electrodes for Contact with Ionospheric Plasma; Enabling IP Header Compression in COTS Routers via Frame Relay on a Simplex Link; Ka-Band SiGe Receiver Front-End MMIC for Transponder Applications; Robust Optimization Design Algorithm for High-Frequency TWTs; Optimal and Local Connectivity Between Neuron and Synapse Array in the Quantum Dot/Silicon Brain; Method and Circuit for In-Situ Health Monitoring of Solar Cells in Space; BGen: A UML Behavior Network Generator Tool; Platform for Post-Processing Waveform-Based NDE; Electrochemical Hydrogen Peroxide Generator; Fabrication of Single, Vertically Aligned Carbon Nanotubes in 3D Nanoscale Architectures; Process to Create High-Fidelity Lunar Dust Simulants; Lithium-Ion Electrolytes Containing Phosphorous-Based, Flame-Retardant Additives; InGaP Heterojunction Barrier Solar Cells; Straight-Pore Microfilter with Efficient Regeneration; Determining Shear Stress Distribution in a Laminate; Self-Adjusting Liquid Injectors for Combustors; Handling Qualities Prediction of an F-16XL-Based Reduced Sonic Boom Aircraft; Tele-Robotic ATHLETE Controller for Kinematics - TRACK; Three-Wheel Brush-Wheel Sampler; Heterodyne Interferometer Angle Metrology; Aligning Astronomical Telescopes via Identification of Stars; Generation of Optical Combs in a WGM Resonator from a Bichromatic Pump; Large-Format AlGaN PIN Photodiode Arrays for UV Images; Fiber-Coupled Planar Light-Wave Circuit for Seed Laser Control in High Spectral Resolution Lidar Systems; On Calculating the Zero-Gravity Surface Figure of a Mirror; Optical Modification of Casimir Forces for Improved Function of Micro- and Nano-Scale Devices; Analysis, Simulation, and Verification of Knowledge-Based, Rule-Based, and Expert Systems; Core and Off-Core Processes in Systems Engineering; Digital Reconstruction Supporting Investigation of Mishaps; and Template Matching Approach to Signal Prediction.
A detector array charge collection model has been developed for use as an engineering tool to aid in the design of optical sensor missions for operation in the space radiation environment. This model is an enhancement of the prototype array charge collection model that was developed for the Next Generation Space Telescope (NGST) program. The primary enhancements were accounting for drift-assisted diffusion by Monte Carlo modeling techniques and implementing the modeling approaches in a windows-based code. The modeling is concerned with integrated charge collection within discrete pixels in the focal plane array (FPA), with high fidelity spatial resolution. It is applicable to all detector geometries including monolithc charge coupled devices (CCDs), Active Pixel Sensors (APS) and hybrid FPA geometries based on a detector array bump-bonded to a readout integrated circuit (ROIC).