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At least 19 records

Traveling-Wave Tube Cold-Test Circuit Optimization Using CST MICROWAVE STUDIO

The internal optimizer of CST MICROWAVE STUDIO (MWS) was used along with an application-specific Visual Basic for Applications (VBA) script to develop a method to optimize traveling-wave tube (TWT) cold-test circuit performance. The optimization procedure allows simultaneous optimization of circuit specifications including on-axis interaction impedance, bandwidth or geometric limitations. The application of Microwave Studio to TWT cold-test circuit optimization is described.

Chevalier, Christine T.↗

Visual Analytics of Performance of Quantum Computing Systems and Circuit Optimization

Driven by potential exponential speedups in business, security, and scientific scenarios, interest in quantum computing is surging. This interest feeds the development of quantum computing hardware, but several challenges arise in optimizing application performance for hardware metrics (e.g., qubit coherence and gate fidelity). In this work, we describe a visual analytics approach for analyzing the performance properties of quantum devices and quantum circuit optimization. Our approach allows users to explore spatial and temporal patterns in quantum device performance data and it computes similarities and variances in key performance metrics. Detailed analysis of the error properties characterizing individual qubits is also supported. We also describe a method for visualizing the optimization of quantum circuits. The resulting visualization tool allows researchers to design more efficient quantum algorithms and applications by increasing the interpretability of quantum computations.

Chae, Junghoon↗

Digi Island: A Serious Game for Teaching and Learning Digital Circuit Optimization

Karnaugh maps, also known as K-maps, are a tool used to optimize or simplify digital logic circuits. A K-map is a graphical display of a logic circuit. K-map optimization is essentially the process of finding a minimum number of maximal aggregations of K-map cells. with values of 1 according to a set of rules. The Digi Island is a serious game designed for aiding students to learn K-map optimization. The game takes place on an exotic island (called Digi Island) in the Pacific Ocean . The player is an adventurer to the Digi Island and will transform it into a tourist attraction by developing real estates, such as amusement parks.and hotels. The Digi Island game elegantly converts boring 1s and Os in digital circuits into usable and unusable spaces on a beautiful island and transforms K-map optimization into real estate development, an activity with which many students are familiar and also interested in. This paper discusses the design, development, and some preliminary results of the Digi Island game.

Harper, Michael↗

Discrete-State Simulated Annealing For Traveling-Wave Tube Slow-Wave Circuit Optimization

Algorithms based on the global optimization technique of simulated annealing (SA) have proven useful in designing traveling-wave tube (TWT) slow-wave circuits for high RF power efficiency. The characteristic of SA that enables it to determine a globally optimized solution is its ability to accept non-improving moves in a controlled manner. In the initial stages of the optimization, the algorithm moves freely through configuration space, accepting most of the proposed designs. This freedom of movement allows non-intuitive designs to be explored rather than restricting the optimization to local improvement upon the initial configuration. As the optimization proceeds, the rate of acceptance of non-improving moves is gradually reduced until the algorithm converges to the optimized solution. The rate at which the freedom of movement is decreased is known as the annealing or cooling schedule of the SA algorithm. The main disadvantage of SA is that there is not a rigorous theoretical foundation for determining the parameters of the cooling schedule. The choice of these parameters is highly problem dependent and the designer needs to experiment in order to determine values that will provide a good optimization in a reasonable amount of computational time. This experimentation can absorb a large amount of time especially when the algorithm is being applied to a new type of design. In order to eliminate this disadvantage, a variation of SA known as discrete-state simulated annealing (DSSA), was recently developed. DSSA provides the theoretical foundation for a generic cooling schedule which is problem independent, Results of similar quality to SA can be obtained, but without the extra computational time required to tune the cooling parameters. Two algorithm variations based on DSSA were developed and programmed into a Microsoft Excel spreadsheet graphical user interface (GUI) to the two-dimensional nonlinear multisignal helix traveling-wave amplifier analysis program TWA3. The algorithms were used to optimize the computed RF efficiency of a TWT by determining the phase velocity profile of the slow-wave circuit. The mathematical theory and computational details of the DSSA algorithms will be presented and results will be compared to those obtained with a SA algorithm.

Wilson, Jeffrey D.↗

Pareto Optimization of Analog Circuits Using Reinforcement Learning

Analog circuit optimization and design presents a unique set of challenges in the IC design process. Many applications require the designer to optimize for multiple competing objectives, which poses a crucial challenge. Motivated by these practical aspects, we propose a novel method to tackle multi-objective optimization for analog circuit design in continuous action spaces. In particular, we propose to (i) extrapolate current techniques in Multi-Objective Reinforcement Learning to continuous state and action spaces and (ii) provide for a dynamically tunable trained model to query user defined preferences in multi-objective optimization in the analog circuit design context.

99 GENERAL AND MISCELLANEOUS↗

Red-QAOA: Efficient Variational Optimization through Circuit Reduction

The Quantum Approximate Optimization Algorithm (QAOA) provides a quantum solution for combinatorial optimization problems. However, the optimal parameter searching process of QAOA is greatly affected by noise, leading to non-optimal solutions. This paper introduces a novel approach to optimize QAOA by exploiting the energy landscape concentration of similar instances via graph reduction, thus addressing the effect of noise. We formalize the notion of similar instances in QAOA and develop a Simulated Annealing-based graph reduction algorithm, called Red-QAOA, to identify the most similar subgraph for efficient parameter optimization. Red-QAOA outperforms state-of-the-art Graph Neural Network (GNN) based graph pooling techniques in performance and demonstrates effectiveness on a diverse set of real-world optimization problems encompassing 3200 graphs. Red-QAOA reduced the node counts and edge counts by 28% and 37%, respectively, while maintaining a low mean square error of 2%. These enable the identification of an optimal parameter set that is closer to the ideal true optimal solution in the presence of noise. By substantially streamlining the search for QAOA parameters, our approach sets the stage for the practical application of quantum algorithms in solving complex optimization problems.

Wang, Meng↗

QuCLEAR

SF-25-008 This software optimizes quantum circuits using a two-step process. The first step, Clifford Extraction, moves the Clifford gates to the end of the circuit and includes circuit optimizations. The second step, Clifford Absorption, then addresses these extracted gates on a classical computer. By reducing the number of gates that need to run on the quantum device, the software achieves a significantly lower gate count.

LIU, JI [Argonne National Laboratory (ANL), Argonn↗

Temporal Planning for Compilation of Quantum Approximate Optimization Algorithm Circuits

We investigate the application of temporal planners to the problem of compiling quantum circuits to newly emerging quantum hardware. While our approach is general, we focus our initial experiments on Quantum Approximate Optimization Algorithm (QAOA) circuits that have few ordering constraints and allow highly parallel plans. We report on experiments using several temporal planners to compile circuits of various sizes to a realistic hardware. This early empirical evaluation suggests that temporal planning is a viable approach to quantum circuit compilation.

planning↗

Surpassing millisecond coherence in on chip superconducting quantum memories by optimizing materials and circuit design

The performance of superconducting quantum circuits for quantum computing has advanced tremendously in recent decades; however, a comprehensive understanding of relaxation mechanisms does not yet exist. In this work, we utilize a multimode approach to characterizing energy losses in superconducting quantum circuits, with the goals of predicting device performance and improving coherence through materials, process, and circuit design optimization. Using this approach, we measure significant reductions in surface and bulk dielectric losses by employing a tantalum-based materials platform and annealed sapphire substrates. With this knowledge we predict the relaxation times of aluminum- and tantalum-based transmon qubits, and find that they are consistent with experimental results. We additionally optimize device geometry to maximize coherence within a coaxial tunnel architecture, and realize on-chip quantum memories with single-photon Ramsey times of 2.0 – 2.7 ms, limited by their energy relaxation times of 1.0 – 1.4 ms. These results demonstrate an advancement towards a more modular and compact coaxial circuit architecture for bosonic qubits with reproducibly high coherence.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Formulation of a methodology for power circuit design optimization

A methodology for optimizing power-processor designs is described which achieves optimization with respect to some power-processor characteristic deemed particularly desirable by the designer, such as weight or efficiency. Optimization theory based on Lagrange multipliers is reviewed together with nonlinear programming techniques employing penalty functions. The methodology, the task of which is to minimize an objective function subject to design constraints, is demonstrated with the aid of four examples: optimum-weight core selection for an inductor with a predetermined winding size, optimum-weight inductor design with a given loss constraint, optimum-loss inductor design with a given weight constraint, and a comparison of optimum-weight single- and two-stage input-filter designs with identical loss and other requirement constraints. Closed-form solutions for the first three examples are obtained by applying the Lagrange-multiplier method, but solutions for the last example are found numerically through the use of the sequential unconstrained minimization technique.

Yu, Y.↗

Engineering model 8-cm thruster subsystem

An Engineering Model (EM) 8 cm Ion Thruster Propulsion Subsystem was developed for operation at a thrust level 5 mN (1.1 mlb) at a specific impulse 1 sub sp = 2667 sec with a total system input power P sub in = 165 W. The system dry mass is 15 kg with a mercury-propellant-reservoir capacity of 8.75 kg permitting uninterrupted operation for about 12,500 hr. The subsystem can be started from a dormant condition in a time less than or equal to 15 min. The thruster has a design lifetime of 20,000 hr with 10,000 startup cycles. A gimbal unit is included to provide a thrust vector deflection capability of + or - 10 degrees in any direction from the zero position. The EM subsystem development program included thruster optimization, power-supply circuit optimization and flight packaging, subsystem integration, and subsystem acceptance testing including a cyclic test of the total propulsion package.

Herron, B. G.↗

A Verified Optimizer for Quantum Circuits

We present VOQC, the first verified optimizer for quantum circuits, written using the Coq proof assistant. Quantum circuits are expressed as programs in a simple, low-level language called SQIR, a small quantum intermediate representation, which is deeply embedded in Coq. Optimizations and other transformations are expressed as Coq functions, which are proved correct with respect to a semantics of SQIR programs. SQIR programs denote complex-valued matrices, as is standard in quantum computation, but we treat matrices symbolically to reason about programs that use an arbitrary number of quantum bits. SQIR’s careful design and our provided automation make it possible to write and verify a broad range of optimizations in VOQC, including full-circuit transformations from cutting-edge optimizers.

97 MATHEMATICS AND COMPUTING↗

Random coordinate descent: A simple alternative for optimizing parameterized quantum circuits

Variational quantum algorithms rely on the optimization of parameterized quantum circuits in noisy settings. The commonly used back-propagation procedure in classical machine learning is not directly applicable in this setting due to the collapse of quantum states after measurements. Thus, gradient estimations constitute a significant overhead in a gradient-based optimization of such quantum circuits. This paper introduces a random coordinate descent algorithm as a practical and easy-to-implement alternative to the full gradient descent algorithm. This algorithm only requires one partial derivative at each iteration. Motivated by the behavior of measurement noise in the practical optimization of parameterized quantum circuits, this paper presents an optimization problem setting that is amenable to analysis. Under this setting, the random coordinate descent algorithm exhibits the same level of stochastic stability as the full gradient approach, making it as resilient to noise. The complexity of the random coordinate descent method is generally no worse than that of the gradient descent and can be much better for various quantum optimization problems with anisotropic Lipschitz constants. Theoretical analysis and extensive numerical experiments validate our findings. Published by the American Physical Society 2024

Ding, Zhiyan (ORCID:000000018863403X)↗

Clifford Circuit-Based Heuristic Optimization of Fermion-To-Qubit Mappings

Simulation of interacting Fermionic Hamiltonians is one of the most promising applications of quantum computers. However, the feasibility of analyzing Fermionic systems with a quantum computer hinges on the efficiency of Fermion-to-qubit mappings that encode nonlocal Fermionic degrees of freedom in local qubit degrees of freedom. While recent studies have highlighted the importance of designing Fermion-to-qubit mappings that are tailored to specific problem Hamiltonians, the methods proposed so far either are restricted to a narrow class of mappings or they use computationally expensive and unscalable brute-force search algorithms. Here, in this work, we address this challenge by designing a heuristic numerical optimization framework for Fermion-to-qubit mappings. To this end, we first translate the Fermion-to-qubit mapping problem to a Clifford circuit optimization problem and then use simulated annealing to optimize the average Pauli weight of the problem Hamiltonian. For all Fermionic Hamiltonians we have considered, the numerically optimized mappings outperform their conventional counterparts, including ternary-tree-based mappings that are known to be optimal for single creation and annihilation operators. We find that our optimized mappings yield between 15% and 40% improvements on the average Pauli weight when the simulation Hamiltonian has an intermediate level of complexity. Most remarkably, the optimized mappings improve the average Pauli weight for 6 × 6 nearest-neighbor hopping and Hubbard models by more than 40% and 20%, respectively. Surprisingly, we also find specific interaction Hamiltonians for which the optimized mapping outperforms any ternary-tree-based mapping. Our results establish heuristic numerical optimization as an effective method for obtaining mappings tailored for specific Fermionic Hamiltonian.

Hamiltonians↗

State Dependent Optimization with Quantum Circuit Cutting

Quantum circuits can be reduced through optimization to better fit the constraints of quantum hardware. One such method, initial-state dependent optimization (ISDO), reduces gate count by leveraging knowledge of the input quantum states. Surprisingly, we found that ISDO is broadly applicable to the downstream circuits produced by circuit cutting. Circuit cutting also requires measuring upstream qubits and has some flexibility of selection observables to do reconstruction. Therefore, we propose a state-dependent optimization (SDO) framework that incorporates ISDO, our newly proposed measure-state dependent optimization (MSDO), and a biased observable selection strategy. Building on the strengths of the SDO framework and recognizing the scalability challenges of circuit cutting, we propose nonseparate circuit cutting-a more flexible approach that enables optimizing gates without fully separating them. We validate our methods on noisy simulations of QAOA, QFT, and BV circuits. Results show that our approach consistently mitigates noise and improves overall circuit performance, demonstrating its promise for enhancing quantum algorithm execution on near-term hardware.

Li, Xinpeng↗

Generalized Quantum Convolution for Multidimensional Data

The convolution operation plays a vital role in a wide range of critical algorithms across various domains, such as digital image processing, convolutional neural networks, and quantum machine learning. In existing implementations, particularly in quantum neural networks, convolution operations are usually approximated by the application of filters with data strides that are equal to the filter window sizes. One challenge with these implementations is preserving the spatial and temporal localities of the input features, specifically for data with higher dimensions. In addition, the deep circuits required to perform quantum convolution with a unity stride, especially for multidimensional data, increase the risk of violating decoherence constraints. In this work, we propose depth-optimized circuits for performing generalized multidimensional quantum convolution operations with unity stride targeting applications that process data with high dimensions, such as hyperspectral imagery and remote sensing. We experimentally evaluate and demonstrate the applicability of the proposed techniques by using real-world, high-resolution, multidimensional image data on a state-of-the-art quantum simulator from IBM Quantum.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗