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At least 19 records

A Proposed Clock Synchronization Method for the Solar System Internet

Networked communications in space are necessary to achieve scalability in terms of the number of communicating nodes but also in terms of the overall system complexity. A key component to such a system is the ability to synchronize clocks, which is the focus of this paper. The so-called Solar System Internet (SSI) will be built upon Delay Tolerant Networking (DTN), which, in analogy to the Internet Protocol (IP), can be considered a suite of protocols necessary for networking in the space domain. Therefore, our goal is to extend this suite to include a DTN clock synchronization capability, analogous to the Network Time Protocol (NTP) used in the Internet. A motivating example of a network in space is NASA’s LunaNet, a vision for a multi-hop multi-path network extending to the moon wherein not all nodes will have direct connections to an authoritative reference clock. In this paper, we propose a general clock synchronization methodology and algorithm that could be used for LunaNet as well as more elaborate time-varying networks. In recent years, DTN has benefited from modeling efforts founded on the mathematical tool of sheaves. Here we continue this work to provide an approach to clock synchronization. Due to the time-varying nature of space networks, absolute consensus is not possible. However, the sheaf Laplacian provides a practical, distributed approach to approximating consensus by allowing data to diffuse through the network. In particular, the sheaf Laplacian is readily computable, lending our approach to implementation. Our approach is well suited to handle the difficulties of space networks. For instance, differences in clock accuracy mean certain nodes are more authoritative than others; we can account for these differences through hierarchies in the network, generalizing the strata in NTP. Furthermore, just as error estimation is an integral part of NTP, we are able to give concrete error bounds for our approach. Indeed, different applications (e.g., communications schedules, pointing, navigation, distributed science) will have different requirements, hence it is necessary to maintain clocks within a given tolerance. We outline some of the necessary steps to turn our approach into a practical network protocol that could be used in DTN, and we conclude the paper with suggestions for future research.

Michael Moy↗

CMOS Clock Synchronizer

Circuit synchronizes clock and gate signals within one-quarter of clock cycle. Clock synchronizer with one-quarter-cycle skew constructed from three flip-flops, three NAND gates, and inverter. In addition gate signal to which clock synchronized, circuit requires square-wave input at twice desired clock frequency.

Kepp, R. B.↗

Atmospheric limitations to clock synchronization at microwave frequencies

Clock synchronization schemes utilizing microwave signals that pass through the Earth's atmosphere are ultimately limited by our ability to correct for the variable delay imposed by the atmosphere. The atmosphere is non-dispersive at microwave frequencies and imposes a delay of roughly 8 nanosec times the cosecant of the elevation angle. This delay is composed of two parts, the delay due to water vapor molecules (i.e., the wet delay), and the delay due to all other atmospheric constituents (i.e., the dry delay). Water vapor contributes approximately 5 to 10% of the total atmospheric delay but is highly variable, not well mixed, and difficult to estimate from surface air measurements. However, the techniques of passive remote sensing using microwave radiometry can be used to estimate the line of sight delay due to water vapor with potential accuracies of 10 to 20 picosec. The devices that are used are called water vapor radiometers and simply measure the power emitted by the water vapor molecule at the 22.2 GHz spectral line. An additional power measurement is usually included at 31.4 GHz in order to compensate for the effect of liquid water (e.g., clouds). The dry atmosphere is generally in something close to hydrostatic equilibrium and its delay contribution at zenith can be estimated quite well from a simple barometric measurement. At low elevation angles one must compensate for refractive bending and possible variations in the vertical refractivity profile. With care these effects can be estimated with accuracies on the order of 30 picosec down to elevation angles of 10 degree.

Resch, G. M.↗

Recent field test results using OMEGA transmissions for clock synchronization

The results are presented of clock synchronization experiments using OMEGA transmissions from North Dakota on 13.10 kHz and 12.85 kHz. The OMEGA transmissions were monitored during April 1974 from NASA tracking sites located at Madrid, Spain; Canary Island; and Winkfield, England. The sites are located at distances between 6600 kilometers (22,100 microseconds) to 7300 kilometers (24,400 microseconds) from North Dakota. The data shows that cycle identification of the received signals was accomplished. There are, however, discrepancies between the measured and calculated propagation delay values which have not been explained, but seem to increase with distance between the receiver and the transmitter. The data also indicates that three strategically located OMEGA transmitting stations may be adequate to provide worldwide coverage for clock synchronization to within plus or minus two (2) microseconds.

Chi, A. R.↗

Mechanical proofs of fault-tolerant clock synchronization

The following topics are covered in viewgraph form: (1) introduction to clock synchronization protocols; (2) a schematic formulation of clock synchronization; (3) the interactive convergence algorithm; (4) verification of Schneider's formulation; (5) verification of interactive convergence; (6) a hardware-oriented clock synchronization protocol; (7) verification of Infis/Moore's protocol; and (8) the EHDM specification/verification environment.

Shankar, N.↗

Relativistic effects of the rotation of the earth on remote clock synchronization

A treatment is given of relativistic clock synchronization effects due to the rotation of the earth. Unlike other approaches, the point of view of an earth fixed coordinate system is used which offers insight to many problems. An attempt is made to give the reader an intuitive grasp of the subject as well as to provide formulae for his use. Specific applications to global timekeeping, navigation, VLBI, relativistic clock experiments, and satellite clock synchronization are discussed. The question of whether atomic clocks are ideal clocks is also treated.

Reinhardt, V.↗

Byzantine-fault tolerant self-stabilizing protocol for distributed clock synchronization systems

A rapid Byzantine self-stabilizing clock synchronization protocol that self-stabilizes from any state, tolerates bursts of transient failures, and deterministically converges within a linear convergence time with respect to the self-stabilization period. Upon self-stabilization, all good clocks proceed synchronously. The Byzantine self-stabilizing clock synchronization protocol does not rely on any assumptions about the initial state of the clocks. Furthermore, there is neither a central clock nor an externally generated pulse system. The protocol converges deterministically, is scalable, and self-stabilizes in a short amount of time. The convergence time is linear with respect to the self-stabilization period.

Malekpour, Mahyar R.↗

Verification of fault-tolerant clock synchronization systems

A critical function in a fault-tolerant computer architecture is the synchronization of the redundant computing elements. The synchronization algorithm must include safeguards to ensure that failed components do not corrupt the behavior of good clocks. Reasoning about fault-tolerant clock synchronization is difficult because of the possibility of subtle interactions involving failed components. Therefore, mechanical proof systems are used to ensure that the verification of the synchronization system is correct. In 1987, Schneider presented a general proof of correctness for several fault-tolerant clock synchronization algorithms. Subsequently, Shankar verified Schneider's proof by using the mechanical proof system EHDM. This proof ensures that any system satisfying its underlying assumptions will provide Byzantine fault-tolerant clock synchronization. The utility of Shankar's mechanization of Schneider's theory for the verification of clock synchronization systems is explored. Some limitations of Shankar's mechanically verified theory were encountered. With minor modifications to the theory, a mechanically checked proof is provided that removes these limitations. The revised theory also allows for proven recovery from transient faults. Use of the revised theory is illustrated with the verification of an abstract design of a clock synchronization system.

Miner, Paul S.↗

A Byzantine-Fault Tolerant Self-Stabilizing Protocol for Distributed Clock Synchronization Systems

Embedded distributed systems have become an integral part of safety-critical computing applications, necessitating system designs that incorporate fault tolerant clock synchronization in order to achieve ultra-reliable assurance levels. Many efficient clock synchronization protocols do not, however, address Byzantine failures, and most protocols that do tolerate Byzantine failures do not self-stabilize. Of the Byzantine self-stabilizing clock synchronization algorithms that exist in the literature, they are based on either unjustifiably strong assumptions about initial synchrony of the nodes or on the existence of a common pulse at the nodes. The Byzantine self-stabilizing clock synchronization protocol presented here does not rely on any assumptions about the initial state of the clocks. Furthermore, there is neither a central clock nor an externally generated pulse system. The proposed protocol converges deterministically, is scalable, and self-stabilizes in a short amount of time. The convergence time is linear with respect to the self-stabilization period. Proofs of the correctness of the protocol as well as the results of formal verification efforts are reported.

Malekpour, Mahyar R.↗

A Byzantine-Fault Tolerant Self-Stabilizing Protocol for Distributed Clock Synchronization Systems

Embedded distributed systems have become an integral part of safety-critical computing applications, necessitating system designs that incorporate fault tolerant clock synchronization in order to achieve ultra-reliable assurance levels. Many efficient clock synchronization protocols do not, however, address Byzantine failures, and most protocols that do tolerate Byzantine failures do not self-stabilize. Of the Byzantine self-stabilizing clock synchronization algorithms that exist in the literature, they are based on either unjustifiably strong assumptions about initial synchrony of the nodes or on the existence of a common pulse at the nodes. The Byzantine self-stabilizing clock synchronization protocol presented here does not rely on any assumptions about the initial state of the clocks. Furthermore, there is neither a central clock nor an externally generated pulse system. The proposed protocol converges deterministically, is scalable, and self-stabilizes in a short amount of time. The convergence time is linear with respect to the self-stabilization period. Proofs of the correctness of the protocol as well as the results of formal verification efforts are reported.

Malekpour, Mahyar R.↗

Synchronous clock stopper for microprocessor

A synchronous clock stopper circuit for inhibiting clock pulses to a microprocessor in response to a stop request signal, and for reinstating the clock pulses in response to a start request signal thereby to conserve power consumption of the microprocessor when used in an environment of limited power. The stopping and starting of the microprocessor is synchronized, by a phase tracker, with the occurrences of a predetermined phase in the instruction cycle of the microprocessor in which the I/O data and address lines of the microprocessor are of high impedance so that a shared memory connected to the I/O lines may be accessed by other peripheral devices. The starting and stopping occur when the microprocessor initiates and completes, respectively, an instruction, as well as before and after transferring data with a memory. Also, the phase tracker transmits phase information signals over a bus to other peripheral devices which signals identify the current operational phase of the microprocessor.

Kitchin, David A.↗

Sub-nanosecond clock synchronization and precision deep space tracking

Interferometric spacecraft tracking is accomplished at the NASA Deep Space Network (DSN) by comparing the arrival time of electromagnetic spacecraft signals to ground antennas separated by baselines on the order of 8000 km. Clock synchronization errors within and between DSN stations directly impact the attainable tracking accuracy, with a 0.3 ns error in clock synchronization resulting in an 11 nrad angular position error. This level of synchronization is currently achieved by observing a quasar which is angularly close to the spacecraft just after the spacecraft observations. By determining the differential arrival times of the random quasar signal at the stations, clock synchronization and propagation delays within the atmosphere and within the DSN stations are calibrated. Recent developments in time transfer techniques may allow medium accuracy (50-100 nrad) spacecraft observations without near-simultaneous quasar-based calibrations. Solutions are presented for a global network of GPS receivers in which the formal errors in clock offset parameters are less than 0.5 ns. Comparisons of clock rate offsets derived from GPS measurements and from very long baseline interferometry and the examination of clock closure suggest that these formal errors are a realistic measure of GPS-based clock offset precision and accuracy. Incorporating GPS-based clock synchronization measurements into a spacecraft differential ranging system would allow tracking without near-simultaneous quasar observations. The impact on individual spacecraft navigation error sources due to elimination of quasar-based calibrations is presented. System implementation, including calibration of station electronic delays, is discussed.

Charles Dunn↗

A verified design of a fault-tolerant clock synchronization circuit: Preliminary investigations

Schneider demonstrates that many fault tolerant clock synchronization algorithms can be represented as refinements of a single proven correct paradigm. Shankar provides mechanical proof that Schneider's schema achieves Byzantine fault tolerant clock synchronization provided that 11 constraints are satisfied. Some of the constraints are assumptions about physical properties of the system and cannot be established formally. Proofs are given that the fault tolerant midpoint convergence function satisfies three of the constraints. A hardware design is presented, implementing the fault tolerant midpoint function, which is shown to satisfy the remaining constraints. The synchronization circuit will recover completely from transient faults provided the maximum fault assumption is not violated. The initialization protocol for the circuit also provides a recovery mechanism from total system failure caused by correlated transient faults.

Miner, Paul S.↗

Experimental validation of clock synchronization algorithms

The objective of this work is to validate mathematically derived clock synchronization theories and their associated algorithms through experiment. Two theories are considered, the Interactive Convergence Clock Synchronization Algorithm and the Midpoint Algorithm. Special clock circuitry was designed and built so that several operating conditions and failure modes (including malicious failures) could be tested. Both theories are shown to predict conservative upper bounds (i.e., measured values of clock skew were always less than the theory prediction). Insight gained during experimentation led to alternative derivations of the theories. These new theories accurately predict the behavior of the clock system. It is found that a 100 percent penalty is paid to tolerate worst-case failures. It is also shown that under optimal conditions (with minimum error and no failures) the clock skew can be as much as three clock ticks. Clock skew grows to six clock ticks when failures are present. Finally, it is concluded that one cannot rely solely on test procedures or theoretical analysis to predict worst-case conditions.

Palumbo, Daniel L.↗

Derivation and experimental verification of clock synchronization theory

The objective of this work is to validate mathematically derived clock synchronization theories and their associated algorithms through experiment. Two theories are considered, the Interactive Convergence Clock Synchronization Algorithm and the Mid-Point Algorithm. Special clock circuitry was designed and built so that several operating conditions and failure modes (including malicious failures) could be tested. Both theories are shown to predict conservative upper bounds (i.e., measured values of clock skew were always less than the theory prediction). Insight gained during experimentation led to alternative derivations of the theories. These new theories accurately predict the clock system's behavior. It is found that a 100% penalty is paid to tolerate worst case failures. It is also shown that under optimal conditions (with minimum error and no failures) the clock skew can be as much as 3 clock ticks. Clock skew grows to 6 clock ticks when failures are present. Finally, it is concluded that one cannot rely solely on test procedures or theoretical analysis to predict worst case conditions. conditions.

INTERACTIVE CONVERGENCE CLOCK↗

Clock Synchronization Characterization of the Washington DC Metropolitan Area Quantum Network (DC-QNet)

Quantum networking protocols relying on interference and precise time-of-flight measurements require high-precision clock synchronization. This study describes the design, implementation, and characterization of two optical time transfer methods in a metropolitan-scale quantum networking research testbed. With active electronic stabilization, sub-picosecond time deviation (TDEV) was achieved at integration times between 1 s and 10 5 s over 53 km of deployed fiber. Over the same integration periods, 10-picosecond level TDEV was observed using the White Rabbit-Precision Time Protocol (WR-PTP) over 128 km. Measurement methods are described to understand the sources of environmental fluctuations on clock synchronization towards the development of in-situ compensation methods. Path delay gradients, chromatic dispersion, polarization drift, and optical power variations all contributed to clock synchronization errors. The results from this study will inform future work in the development of link noise management methods essential for enabling experimental research in developing practical quantum networking protocols.

PIKTime↗