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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

A Cryogenic readout integrated circuit with analog pile-up and in-Pixel ADC for high frame rate Skipper CCD-in-CMOS Sensors

The Skipper CCD-in-CMOS Parallel Read-Out Circuit V2 (SPROCKET2) is designed to enable high frame rate readout of Skipper CCD-in-CMOS image sensors. The SPROCKET2 pixel is fabricated in a 65 nm CMOS process and occupies a 60$\mu$m $\times$ 60$\mu$m footprint. SPROCKET2 is intended to be heterogeneously integrated with a pixelated Skipper CCD-in-CMOS sensor, such that one readout pixel is connected to a multiplexed array of 16 active image sensor pixels, to match their spatial geometry. Our design benefits from the Skipper CCD-in-CMOS sensor's non-destructive readout capability to achieve exceptionally low noise through multi-sampling and averaging while optimizing for total power consumption. The pixel readout utilizes correlated double sampling to minimize 1/f noise and includes "pile-up" of ten successive samples in the analog domain before digitizing at a rate of 66.7 ksps. Measurement results of in-pixel serial SAR ADC show DNL and INL of ~0. 44 LSB and 0.58 LBS respectively. A large area array of 20,000 SPROCKET2 ADC pixels (multiplexed 1:16 to 320,000 sensor pixels) is currently under test. By reading out data over a 10 Gbps optical link, this pixel design enables a frame rate of $\sim$ 4 kfps for large sensing areas with minimal sensing deadtime. In the highest gain mode, the pixelated ADC has an input-referred resolution of 10$\mu$V with a simulated power consumption of 50$\mu$W. The pixel operates with constant current draw to minimize power-rail crosstalk.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2024

Skipper-in-CMOS: Nondestructive Readout With Subelectron Noise Performance for Pixel Detectors

The Skipper-in-CMOS image sensor integrates the nondestructive readout capability of skipper charge coupled devices (Skipper-CCDs) with the high conversion gain of a pinned photodiode (PPD) in a CMOS imaging process while taking advantage of in-pixel signal processing. This allows both single photon counting as well as high frame rate readout through highly parallel processing. The first results obtained from a ${15} \times {15}~\mu $ m2 pixel cell of a Skipper-in-CMOS sensor fabricated in Tower Semiconductor’s commercial 180-nm CMOS image sensor process are presented. Measurements confirm the expected reduction of the readout noise with the number of samples down to deep subelectron noise of $0.15\text {e}^ - $ , demonstrating the charge transfer operation from the PPD and the single photon counting operation when the sensor is exposed to light. This article also discusses new testing strategies employed for its operation and characterization.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2024

Soft X-ray quantum efficiency of a commercial CMOS imaging sensor

The demonstrated performance and cost-effectiveness of complementary metal-oxide-semiconductor (CMOS) sensors make them a potentially attractive option for low-cost space-based X-ray observatories. We have previously reported on the performance of a commercially available backside-illuminated Sony IMX290LLR-C CMOS sensor and found it to offer X-ray spectral resolutions comparable to the charged coupled devices (CCDs) aboard Suzaku and Chandra and to have a sufficient radiation hardness for use in low Earth orbit. Here, in this work, we report on the quantum efficiency (QE) of this sensor, an essential metric for modeling the sensitivity of an instrument as an X-ray detector. Using the Advanced Photon Source at Argonne National Laboratory, we measure the soft X-ray QE of this CMOS sensor to be 0.28 ± 0.02 at a photon energy of 490.5 eV. This energy was chosen for its proximity to the astrophysically important O VII triplet emission lines (~574 eV) studied by the HaloSat mission. Although not surpassing that of the back-illuminated CCDs aboard Suzaku and Chandra, this QE compares favorably to that of the front-illuminated CCDs aboard the same observatories and is competitive with that of the silicon drift detectors used aboard HaloSat, making it a strong candidate for use on future X-ray small satellite (SmallSat) missions.

47 OTHER INSTRUMENTATION↗
DOE OSTI2025

CMS HGCAL ECON-D ASIC : Impact of CMOS fabrication process tuning on performance and radiation tolerance

The CMS experiment’s High Granularity Calorimeter (HGCAL) upgrade will replace CMS’s existing endcap calorimeters in preparation for the High Luminosity LHC. To effectively use over 6 million channels of this “imaging”calorimeter, CMS has developed two novel Endcap Concentrator (ECON) ASICs to perform data compression/selection on detector. The ECON-D ASIC operates on the 750kHz data path, and the ECON-T ASIC on the 40MHz trigger path. These 65 nm CMOS ASICs are radiation tolerant to 200 Mrad and low power, operating at less than 2.5 mW/channel. The first full-functionality prototype ECONs were produced and characterized in 2021-23, and an initial engineering run was performed in 2024. ECON-D radiation testing for the engineering run revealed that the chip’s internal SRAMs produce intermittent read errors for a non-negligible fraction of chips. Further investigation indicated that the SRAM performance is highly sensitive to the exact parameters of the CMOS fabrication process. To both study this process sensitivity and mitigate SRAM performance issues, twenty ECON wafers were produced in 2025 with a range of doping concentrations designed to tune the underlying transistor threshold voltage by 0%, 5%, 10%, and 15% from nominal. This talk will present first measurements of ECON-D performance, power consumption, and radiation tolerance for these four variations of CMOS process.

Syal, Chinar [Fermilab]↗
DOE OSTI2026

CMOS-fabricated ultraviolet light modulator using low-loss alumina piezo-optomechanical photonics

Ultra-violet (UV) and near-UV wavelengths are necessary for many important optical transitions for quantum technologies and various sensing mechanisms for biological and chemical detection. However, all well-known photonic platforms have excessively high losses in the UV, which has prevented photonic integrated circuits (PICs) being used to address these and other important application spaces. Photonic waveguides using low-loss alumina cores and silicon dioxide cladding have emerged as a promising solution because of alumina’s large optical bandgap and the high quality of films enabled by atomic layer deposition. These properties allow passive, low-loss waveguide operation down to at least 266 nm using multimode widths. However, to the best of our knowledge, active alumina PICs have only been realized using thermo-optic tuning, which precludes switching speeds shorter than approximately 100 microseconds, high circuit densities, and cryogenically compatible operation. Here, we introduce a CMOS-fabricated, piezo-optomechanical PIC platform using alumina waveguides and piezoelectric aluminum nitride strain actuators. The platform allows for sub-microsecond switching times, high circuit densities, and cryogenic operation which is desired in many UV PIC applications. We demonstrate a high-performance, reconfigurable optical filter operating at wavelengths as low as 320 nm. The filter has a 6-nanosecond switching time, a loaded linewidth of 3.3 GHz, tuning rate of 28 V/linewidth, and a hold power of less than 20 nW at one linewidth detuning. This work establishes the foundations for a new class of CMOS-fabricated, rapidly reconfigurable, and low-power UV photonic circuits compatible with wavelengths as low as 225 nm.

Castillo, Zachary A. [Sandia National Laboratories↗
DOE OSTI2025

Gigahertz-frequency acousto-optic phase modulation of visible light in a CMOS-fabricated photonic circuit

Optical phase modulators operating at visible wavelengths are essential components for photonic technologies such as those for quantum control, communications, and laser ranging. However, they remain challenging to implement in scalable, integrated platforms capable of handling high optical powers. Here we present a visible-light, gigahertz-frequency acousto-optic phase modulator, fabricated on a 200-mm wafer in a volume CMOS foundry, that supports greater than 500 mW of optical power at 730 nm. The device combines a piezoelectric transducer and a photonic waveguide within a single, wavelength-scale structure that confines both a propagating optical mode and an electrically excitable breathing-mode mechanical resonance. By tuning the device’s geometry to optimize the optomechanical interaction, we achieve modulation depths up to 4.85 rad with 80 mW of applied microwave power at 2.31 GHz in a 2-mm-long device. This corresponds to resonant modulation figures of merit of V π = 1.32V and V π ⋅ L = 0.26V cm. To our knowledge, this is the lowest V π ever demonstrated in any acousto-optic phase modulator and represents a 15-fold reduction in V π and a 100-fold reduction in required microwave power relative to state-of-the-art modulators with high visible-wavelength power handling commonly employed in quantum control systems.

Freedman, Jacob M. [Univ. of Arizona, Tucson, AZ (↗
DOE OSTI2024

Characterization of a CMOS camera based film digitization platform for gated x-ray imaging diagnostics at the National Ignition Facility

Hardened gated x-ray detectors use photographic film as the data recording medium due to its low sensitivity to the high-yield neutron environments at the National Ignition Facility (NIF). The photographic film is digitized with a Photometric Data Systems (PDS) microdensitometer, which measures the film’s optical density. The PDS scanner is able to measure a dynamic range of 0–5 OD; however, raster scanning the film is time consuming and maintenance of the instrument is challenging due to legacy technology. Since film usage at NIF is expected to continue in the foreseeable future, a digitization platform that is faster and more maintainable would benefit the NIF’s current and future operations. Here, this work presents the characterization of the digital transitions (DT) atom, a CMOS camera-based digitization platform that records film data in a single image capture very quickly and has widely available user support. The preliminary results suggest that the DT atom is able to reconstruct exposures accurately enough to be a competitive alternative to the PDS Scanner.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

The Impact of Bias Row Noise to Photometric Accuracy: Case Study Based on a Scientific CMOS Detector

Abstract We tested a new model of CMOS detector manufactured by the Gpixel Inc, for potential space astronomical application. In laboratory, we obtain some bias images under the typical application environment. In these bias images, clear random row noise pattern is observed. The row noise also contains some characteristic spatial frequencies. We quantitatively estimated the impact of this feature to photometric measurements, by making simulated images. We compared different bias noise types under strict parameter control. The result shows the row noise will significantly deteriorate the photometric accuracy. It effectively increases the readout noise by a factor of 2–10. However, if it is properly removed, the image quality and photometric accuracy will be significantly improved.

Astronomy & Astrophysics↗
DOE OSTI2024

Embedded FPGA developments in 130 nm and 28 nm CMOS for machine learning in particle detector readout

Embedded field programmable gate array (eFPGA) technology allows the implementation of reconfigurable logic within the design of an application-specific integrated circuit (ASIC). This approach offers the low power and efficiency of an ASIC along with the ease of FPGA configuration, particularly beneficial for the use case of machine learning in the data pipeline of next-generation collider experiments. An open-source framework called "FABulous" was used to design eFPGAs using 130 nm and 28 nm CMOS technology nodes, which were subsequently fabricated and verified through testing. The capability of an eFPGA to act as a front-end readout chip was assessed using simulation of high energy particles passing through a silicon pixel sensor. A machine learning-based classifier, designed for reduction of sensor data at the source, was synthesized and configured onto the eFPGA. A successful proof-of-concept was demonstrated through reproduction of the expected algorithm result on the eFPGA with perfect accuracy. Finally, further development of the eFPGA technology and its application to collider detector readout is discussed.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

A 32-Channel Cryo-CMOS ASIC for SNSPD Biasing and Readout with Picosecond

Superconducting nanowire single-photon detectors (SNSPD) are a promising technology for particle detection. Although SNSPDs have demonstrated picosecond timing accuracy, scaling up large arrays has proved challenging. In this work, we introduce a 32-channel cryo-CMOS application-specific integrated circuit (ASIC) that can be tightly integrated with SNSPD arrays. The ASIC is designed to operate at a temperature of 4K and can perform up to 32 simultaneous timing measurements with a root-mean-square (RMS) accuracy of 8.0ps. The ASIC includes on-chip circuitry for externally biasing superconducting devices, low-noise amplifiers for reading superconducting devices, high-resolution time-to-digital converters (TDC) for time-tagging events, and serializers for transmitting data to room-temperature electronics. The ASIC is manufactured in a 22nm FDSOI process and occupies an area of 4.0mm x 1.0mm. The performance of the ASIC was verified using custom cryogenic device models internally developed for the 22nm SOI process. Measurement results will be presented at the conference.

Fredenburg, Jeff↗
DOE OSTI2024

CMOS photonic integrated source of broadband polarization-entangled photons

We showcase a fully on-chip CMOS-fabricated silicon photonic integrated circuit employing a bidirectionally pumped microring and polarization splitter-rotators tailored for the generation of broadband (>9 THz), high-fidelity (90–98%) polarization-entangled photons. Spanning the optical C+L-band and producing over 116 frequency-bin pairs on a 38.4-GHz-spaced grid, this source is ideal for flex-grid wavelength-multiplexed entanglement distribution in multiuser networks.

42 ENGINEERING↗
DOE OSTI2024

A 32-Channel Cryo-CMOS ASIC for SNSPD Biasing and Readout with Picosecond Timing

Superconducting nanowire single-photon detectors (SNSPD) are a promising technology for particle detection. Although SNSPDs have demonstrated picosecond timing accuracy, scaling up large arrays has proved challenging. In this work, we introduce a 32-channel cryo-CMOS application-specifc integrated circuit (ASIC) that can be tightly integrated with SNSPD arrays. The ASIC is designed to operate at a temperature of 4K and can perform up to 32 simultaneous timing measurements with a root-mean-square (RMS) accuracy of 8.0ps. The ASIC includes on-chip circuitry for externally biasing superconducting devices, low-noise amplifers for reading superconducting devices, high-resolution time-to-digital converters (TDC) for time-tagging events, and serializers for transmitting data to room-temperature electronics. The ASIC is manufactured in a 22nm FDSOI process and occupies an area of 4.0mm x 1.0mm. The performance of the ASIC was verifed using custom cryogenic device models internally developed for the 22nm SOI process. Measurement results will be presented at the conference.

Fredenburg, Jeff↗
DOE OSTI2024

High Linearity RF Circuits in CMOS Platforms (CRADA Final Report)

The goal of this CRADA was to understand high linearity silicon-on-insulator (SOI) radio frequency switches. The first direction investigated was high linearity RF mixers as these components are composed of a network of switches. During the course of the investigation, it was determined that while the SOI RF switches were effective in the application in mixers and produced state of the art performance, the use of SOI for mixers is not economically feasible because the technology only worked with advanced CMOS nodes <65nm which can have an NRE cost (from lithography masks) in excess of $\$$500,000.

42 ENGINEERING↗
DOE OSTI2024

Intelligent Pixel Detectors: Towards a Radiation Hard ASIC with On-Chip Machine Learning in 28 nm CMOS

Detectors at future high energy colliders will face enormous technical challenges. Disentangling the unprecedented numbers of particles expected in each event will require highly granular silicon pixel detectors with billions of readout channels. With event rates as high as 40 MHz, these detectors will generate petabytes of data per second. To enable discovery within strict bandwidth and latency constraints, future trackers must be capable of fast, power efficient, and radiation hard data-reduction at the source. We are developing a radiation hard readout integrated circuit (ROIC) in 28nm CMOS with on-chip machine learning (ML) for future intelligent pixel detectors. We will show track parameter predictions using a neural network within a single layer of silicon and hardware tests on the first tape-outs produced with TSMC. Preliminary results indicate that reading out featurized clusters from particles above a modest momentum threshold could enable using pixel information at 40 MHz.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2025

A sub-5 ps jitter time-to-digital converter ASIC with back-gate delay tuning in 22 nm CMOS

We present the design of a Time-to-Digital Converter (TDC) ASIC together with performance characterization results at cryogenic temperature (6-8 K), and at room temperature using emulated Low-Gain Avalanche Detector (LGAD) signals. The TDC design uses a two-step architecture with a ring-oscillator based counter and a Vernier delay line fine TDC. The TDC is implemented in an FD-SOI process, and back-gate tuning is used not only to correct threshold variation due to cryogenic operation, but also as a novel way to tune TDC delay elements with very little overhead. Using this technique, we demonstrate a design with very low power (0.5 mW) and area (0.003 mm 2 ). We present test results using the Fermilab Constant Fraction Discriminator (FCFD) ASIC to produce discriminated signals from an internal charge injection mechanism that mimics the waveform and signal amplitude of minimum ionizing particles impinging on LGAD sensors. We characterize the time precision of the full system and verify that the TDC ASIC contributes a negligible amount to the total system time precision, fully consistent with the expected jitter contribution of less than 5 ps. In conclusion, the results presented here demonstrate the utility of our TDC for applications in physics and quantum communications.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2025

Design of an 8-channel 40 GS/s 20 mW/Ch waveform sampling ASIC in 65 nm CMOS

One picosecond timing resolution is the entry point to signature based searches relying on secondary/tertiary vertices and particle identification. We describe PSEC5, an 8-channel 40 GS/s waveform-sampling ASIC in TSMC 65 nm process targetting one picosecond resolution at 20 mW power per channel. Each channel consists of four fast and one slow switched capacitor arrays (SCA), allowing for picosecond time resolution combined with a long effective buffer. Each fast SCA is 1.6 ns long and has a nominal sampling rate of 40 GS/s. The slow SCA is 204.8 ns long and samples at 5 GS/s. Recording of the analog data for each channel is triggered by a fast discriminator capable of multiple triggering during the window of the slow SCA. To achieve a large dynamic range, low leakage, and high bandwidth, the SCA sampling switches are implemented as 2.5 V nMOSFETs controlled by 1.2 V shift registers. Stored analog data are digitized by an external ADC at 10 bits or better. Specifications on operational parameters include a 4 GHz analog bandwidth and a dead time of 20 microseconds, corresponding to a 50 kHz readout rate, determined by the choice of the external ADC. PSEC5 has been submitted for fabrication.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗