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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records

Spectral Measurement Errors due to CCD Serial Pixel-to-Pixel Readout Interference in the Ocean Color Instrument of the NASA PACE Mission

The Ocean Color Instrument on NASA’s PACE mission is a hyperspectral imager with a spatial resolution of 1km x 1km and spectral resolution of 5nm in 2.5nm steps over 320-890nm. The detection system is based on two Charge-Coupled Devices (CCDs) operating in Time Delay Integration (TDI) mode to achieve high signal-to-noise ratio. The front-end optical imager is a rotating mirror-based system that images the ground-scene onto a slit with a field of view of 16km x 1km. The slit-image is re-imaged and wavelength dispersed on the CCDs. As the ground-scene moves through the slit, it moves along the CCD columns as charge is moved along with it. The accumulated charge at the end of each column is collected in a serial pixel. Each of the 16 CCD outputs read out 32 columns of the same ground scene spaced 0.625nm apart. The 32-pixel serial register is swiftly read out before the next TDI cycle. The telescope is spinning at 5.77Hz to achieve the required spatial resolution. This results in a serial pixel readout speed of 8.5MHz. Each serial read-cycle goes through a reset and video period that are each sampled to create a low-noise correlated double sample value. This only allows 59ns for the reset and video to be asserted and settled before sampling. Due to the short time period, the response of the CCD exhibits serial pixel-to-pixel readout interference as the reset and video signals do not have time to fully settle before sampling. Each serial pixel value therefore has a dependence on the value of the preceding pixel value. This leads to a spectral measurement error of up to 0.3%. We explain the operation of the detection system, the behavior of the interference and the resulting wavelength error with results from ground testing and on-orbit characterization.

Ulrik B Gliese↗

Time delay and integration array (TDI) using charge transfer device technology. Phase 2, volume 1: Technical

The 20x9 TDI array was developed to meet the LANDSAT Thematic Mapper Requirements. This array is based upon a self-aligned, transparent gate, buried channel process. The process features: (1) buried channel, four phase, overlapping gate CCD's for high transfer efficiency without fat zero; (2) self-aligned transistors to minimize clock feedthrough and parasitic capacitance; and (3) transparent tin oxide electrode for high quantum efficiency with front surface irradiation. The requirements placed on the array and the performance achieved are summarized. This data is the result of flat field measurements only, no imaging or dynamic target measurements were made during this program. Measurements were performed with two different test stands. The bench test equipment fabricated for this program operated at the 8 micro sec line time and employed simple sampling of the gated MOSFET output video signal. The second stand employed Correlated Doubled Sampling (CDS) and operated at 79.2 micro sec line time.

Source record↗

A Cryogenic readout integrated circuit with analog pile-up and in-Pixel ADC for high frame rate Skipper CCD-in-CMOS Sensors

The Skipper CCD-in-CMOS Parallel Read-Out Circuit V2 (SPROCKET2) is designed to enable high frame rate readout of Skipper CCD-in-CMOS image sensors. The SPROCKET2 pixel is fabricated in a 65 nm CMOS process and occupies a 60$\mu$m $\times$ 60$\mu$m footprint. SPROCKET2 is intended to be heterogeneously integrated with a pixelated Skipper CCD-in-CMOS sensor, such that one readout pixel is connected to a multiplexed array of 16 active image sensor pixels, to match their spatial geometry. Our design benefits from the Skipper CCD-in-CMOS sensor's non-destructive readout capability to achieve exceptionally low noise through multi-sampling and averaging while optimizing for total power consumption. The pixel readout utilizes correlated double sampling to minimize 1/f noise and includes "pile-up" of ten successive samples in the analog domain before digitizing at a rate of 66.7 ksps. Measurement results of in-pixel serial SAR ADC show DNL and INL of ~0. 44 LSB and 0.58 LBS respectively. A large area array of 20,000 SPROCKET2 ADC pixels (multiplexed 1:16 to 320,000 sensor pixels) is currently under test. By reading out data over a 10 Gbps optical link, this pixel design enables a frame rate of $\sim$ 4 kfps for large sensing areas with minimal sensing deadtime. In the highest gain mode, the pixelated ADC has an input-referred resolution of 10$\mu$V with a simulated power consumption of 50$\mu$W. The pixel operates with constant current draw to minimize power-rail crosstalk.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Optimizing Charge-coupled Device Readout Enabled by the Floating-gate Amplifier

Multiple-Amplifier Sensing (MAS) charge-coupled devices (CCDs) have recently been shown to be promising silicon detectors that meet noise sensitivity requirements for next generation Stage-5 spectroscopic surveys and potentially, future space-based imaging of extremely faint objects on missions such as the Habitable Worlds Observatory. Building upon the capability of the Skipper CCD to achieve deeply sub-electron noise floors, MAS CCDs utilize multiple floating-gate amplifiers along the serial register to increase the readout speed by a factor of the number of output nodes compared to a Skipper CCD. We introduce and experimentally demonstrate on a 16-channel prototype device new readout techniques that exploit the MAS CCD’s floating-gate amplifiers to optimize the correlated double sampling by resetting once per line instead of once per pixel. With this new mode, we find an optimal filter to subtract the noise from the signal during read out. We also take advantage of the MAS CCD’s structure to tune the read time by independently changing integration times for the signal and reference level. Together with optimal weighted averaging of the 16 outputs, these approaches enable us to reach a sub-electron noise of 0.9 e − rms pix −1 at 19 μs pix −1 for a single charge measurement per pixel—simultaneously giving a 30% faster readout time and 10% lower read noise compared to performance previously evaluated without these techniques.

Lin, Kenneth W. (ORCID:0000000189672281)↗

Optics-Free Chip-Scale Intraoperative Imaging Using NIR-Excited Upconverting Nanoparticles

Here we present an optics-free CMOS image sensor that incorporates a novel time-gated dual-photodiode pixel design to allow filter- and lens-less image acquisition of near-infrared-excited (NIR-excited) upconverting nanoparticles. Recent biomedical advances have highlighted the benefits of NIR excitation, but NIR interaction with silicon has remained a challenge, even with high-performance optical blocking filters. Using a secondary diode and a dual-photodiode design, this sensor is able to remove the 100s of mV of NIR background on pixels and bring it down to single-digit mV level, nearing its noise floor of 2.2 mV rms, not achievable with any optical filter. Non-linear effects of background cancellation using the diode pair has been mitigated using an initial one-time pixel-level curve fitting and calibration in a post-processing setting. This imager comprises a highly linear 11 fF metal-oxide-metal (MOM) capacitor and includes integrated angle-selective gratings to reject oblique light and enhance sharpness. Each pixel also includes two distinct correlated double sampling schemes, to remove low frequency flicker noise and systematic offset in the datapath. We demonstrate the performance of this imager using pulsed NIR-excited upconverting nanoparticles on standard United-States-Air-Force (USAF) resolution targets and achieve an SNR of 15 dB, while keeping NIR background below 6 mV. This 36-by-80-pixel array measures only 2.3 mm by 4.8 mm and can be thinned down to 25 µm, allowing it to become surgically compatible with intraoperative instruments and equipment, while remaining optics-free.

42 ENGINEERING↗

A CCD System for Photometry of Direct and Spectroscopic Images

A charge-coupled device (CCD) for direct imagery at the focus of a ground-based telescope and for high dispersion spectroscopy of stars is evaluated. The CCD is an RCA SID 53612 thinned, buried channel array of 512x320 30-micron square pixels that are back-illuminated and refrigerated to about -60 C in a rugged, RF-shielded vacuum housing. The double-correlated sampling (integrator) readout system, the Z80 microprocessor readout control system, and the data collection system are described. The readout noise is 120 electron-hole pairs (ehp) per pixel per readout, the thermal dark current is 50 ehp/pixel/sec, and the scale of the 12-bit analog-to-digital converter is 25 ehp/AD unit. Unique features of this system are compared to other astronomical implementations of the same model of CCD.

Frecker, J. E.↗

IRAC test report. Gallium doped silicon band 2: Read noise and dark current

A direct readout infrared detector array, a candidate for the Space Infrared Telescope Facility (SIRTF) Infrared Array Camera (IRAC), has been tested. The array has a detector surface of gallium doped silicon, bump bonded to a 58x62 pixel MOSFET multiplexer on a separate chip. Although this chip and system do not meet all the SIRTF requirements, the critically important read noise is within a factor of 3 of the requirement. Significant accomplishments of this study include: (1) development of a low noise correlated double sampling readout system with a readout noise of 127 to 164 electrons (based on the detector integrator capacitance of 0.1 pF); (2) measurement of the readout noise of the detector itself, ranging from 123 to 214 electrons with bias only (best to worst pixel), and 256 to 424 electrons with full clocking in normal operation at 5.4 K where dark current is small. Thirty percent smaller read noises are obtained at a temperature of 15K; (3) measurement of the detector response versus integration time, showing significant nonlinear behavior for large signals, well below the saturation level; and (4) development of a custom computer interface and suitable software for collection, analysis and display of data.

Lamb, Gerald↗

Analysis and Enhancement of Low-Light-Level Performance of Photodiode-Type CMOS Active Pixel Images Operated with Sub-Threshold Reset

Noise in photodiode-type CMOS active pixel sensors (APS) is primarily due to the reset (kTC) noise at the sense node, since it is difficult to implement in-pixel correlated double sampling for a 2-D array. Signal integrated on the photodiode sense node (SENSE) is calculated by measuring difference between the voltage on the column bus (COL) - before and after the reset (RST) is pulsed. Lower than kTC noise can be achieved with photodiode-type pixels by employing "softreset" technique. Soft-reset refers to resetting with both drain and gate of the n-channel reset transistor kept at the same potential, causing the sense node to be reset using sub-threshold MOSFET current. However, lowering of noise is achieved only at the expense higher image lag and low-light-level non-linearity. In this paper, we present an analysis to explain the noise behavior, show evidence of degraded performance under low-light levels, and describe new pixels that eliminate non-linearity and lag without compromising noise.

Pain, Bedabrata↗

Ionizing Radiation Effects on Hole Collection Backside-Illuminated P-Type Deep-Trench Pinned Photo-MOS Pixels under Image Acquisition

Dark current degradation, origins, and annealing behavior after x-ray irradiation are studied in a P-type, hole collecting, backside-illuminated image sensor currently being developed at STMicroelectronics and based on deep-trenched photo-MOS pixels. Different biasing conditions during irradiation, i.e. grounded or biased and sequenced, are compared. The dark current increase with total ionizing dose (TID) and the dark current annealing behavior seem to be driven by the backside interface between the P-epitaxy of the pixels and the ONO stack. Despite still being under development, this pixel architecture already exhibits both very good electro-optical performance and a better radiation hardness than pinned photodiode-based CMOS Image sensors that benefit from the same advanced CIS processing technologies. At high total dose range, the photogate challenges custom Radiation-Hardened-by-Design photodiodes by exhibiting a comparable radiation tolerance while bringing new features such as high-resolution or Correlated Double Sampling.

CMOS Image Sensor (CIS)↗

A Cryogenic Readout IC with 100 KSPS in-Pixel ADC for Skipper CCD-in-CMOS Sensors

The Skipper CCD-in-CMOS Parallel Read-Out Circuit (SPROCKET) is a mixed-signal front-end design for the readout of Skipper CCD-in-CMOS image sensors. SPROCKET is fabricated in a 65 nm CMOS process and each pixel occupies a 50$\mu$m $\times$ 50$\mu$m footprint. SPROCKET is intended to be heterogeneously integrated with a Skipper-in-CMOS sensor array, such that one readout pixel is connected to a multiplexed array of nine Skipper-in-CMOS pixels to enable massively parallel readout. The front-end includes a variable gain preamplifier, a correlated double sampling circuit, and a 10-bit serial successive approximation register (SAR) ADC. The circuit achieves a sample rate of 100 ksps with 0.48 $\mathrm{e^-_{rms}}$ equivalent noise at the input to the ADC. SPROCKET achieves a maximum dynamic range of 9,000 $e^-$ at the lowest gain setting (or 900 $e^-$ at the lowest noise setting). The circuit operates at 100 Kelvin with a power consumption of 40 $\mu W$ per pixel. A SPROCKET test chip was submitted in September 2022, and test results will be presented at the conference.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

A Sub-electron-noise Skipper-CCD Readout ASIC with Improved Channel-to-channel Isolation and an Integrated Cryogenic Voltage Reference

The MIDNA application specific integrated circuits (ASICs) are a series of skipper-CCD readout chips fabricated in a 65 nm low-power CMOS process that implement a correlated double sampling signal processing chain based on dual-slope integrators. They are capable of working from room to cryogenic temperatures, down to 84 K. The present iteration of the ASIC has been fabricated including several design updates and the addition of an on-chip voltage reference, resulting in improved performance. This work presents the main vulnerabilities solved, the changes carried out, and the resulting performance benefits. Measurements with a skipper-CCD and the ASIC at 140 K showed that the single-electron resolution can be reached by averaging the measured charge in the analog domain using the analog pile-up technique with a readout noise as low as 0.11 erms of equivalent charge for 1200 samples. The channel-to-channel crosstalk was also characterized showing values better than -62 dB.

Alcalde Bessia, Fabricio↗

A Sub-electron-noise Skipper-CCD Readout ASIC with Improved Channel-to-channel Isolation and an Integrated Cryogenic Voltage Reference

The MIDNA application specific integrated circuits (ASICs) are a series of skipper-CCD readout chips fabricated in a 65 nm low-power CMOS process that implement a correlated double sampling signal processing chain based on dual-slope integrators. They are capable of working from room to cryogenic temperatures, down to 84 K. The present iteration of the ASIC has been fabricated including several design updates and the addition of an on-chip voltage reference, resulting in improved performance. This work presents the main vulnerabilities solved, the changes carried out, and the resulting performance benefits. Measurements with a skipper-CCD and the ASIC at 140 K showed that the single-electron resolution can be reached by averaging the measured charge in the analog domain using the analog pile-up technique with a readout noise as low as 0.11 erms of equivalent charge for 1200 samples. The channel-to-channel crosstalk was also characterized showing values better than -62 dB.

Alcalde Bessia, Fabricio↗

A Sub-Electron-Noise Multi-Channel Cryogenic Skipper-CCD Readout ASIC

The MIDNA application specific integrated circuit (ASIC) is a skipper-CCD readout chip fabricated in a 65 nm LP-CMOS process that is capable of working at cryogenic temperatures. The chip integrates four front-end channels that process the skipper-CCD signal and performs differential averaging using a dual slope integration (DSI) circuit. Each readout channel contains a pre-amplifier, a DC restorer, and a dual-slope integrator with chopping capability. The integrator chopping is a key system design element in order to mitigate the effect of low-frequency noise produced by the integrator itself, and it is not often required with standard CCDs. Each channel consumes 4.5 mW of power, occupies 0.156 mm${^2}$ area and has an input referred noise of 2.7${\mu\nu}_{rms}$. It is demonstrated experimentally to achieve sub-electron noise when coupled with a skipper-CCD by means of averaging samples of each pixel. Here, sub-electron noise is shown in three different acquisition approaches. The signal range is 6000 electrons. The readout system achieves 0.2${e^{-}}$ RMS by averaging 1000 samples with MIDNA both at room temperature and at 180 Kelvin.

1/f noise↗

A back-illuminated megapixel CMOS image sensor

In this paper, we present the test and characterization results for a back-illuminated megapixel CMOS imager. The imager pixel consists of a standard junction photodiode coupled to a three transistor-per-pixel switched source-follower readout [1]. The imager also consists of integrated timing and control and bias generation circuits, and provides analog output. The analog column-scan circuits were implemented in such a way that the imager could be configured to run in off-chip correlated double-sampling (CDS) mode. The imager was originally designed for normal front-illuminated operation, and was fabricated in a commercially available 0.5 pn triple-metal CMOS-imager compatible process. For backside illumination, the imager was thinned by etching away the substrate was etched away in a post-fabrication processing step.

Complementary Metal Oxide Semiconductor imager (CM↗

Electronic Still Camera

A handheld, programmable, digital camera is disclosed that supports a variety of sensors and has program control over the system components to provide versatility. The camera uses a high performance design which produces near film quality images from an electronic system. The optical system of the camera incorporates a conventional camera body that was slightly modified, thus permitting the use of conventional camera accessories, such as telephoto lenses, wide-angle lenses, auto-focusing circuitry, auto-exposure circuitry, flash units, and the like. An image sensor, such as a charge coupled device ('CCD') collects the photons that pass through the camera aperture when the shutter is opened, and produces an analog electrical signal indicative of the image. The analog image signal is read out of the CCD and is processed by preamplifier circuitry, a correlated double sampler, and a sample and hold circuit before it is converted to a digital signal. The analog-to-digital converter has an accuracy of eight bits to insure accuracy during the conversion. Two types of data ports are included for two different data transfer needs. One data port comprises a general purpose industrial standard port and the other a high speed/high performance application specific port. The system uses removable hard disks as its permanent storage media. The hard disk receives the digital image signal from the memory buffer and correlates the image signal with other sensed parameters, such as longitudinal or other information. When the storage capacity of the hard disk has been filled, the disk can be replaced with a new disk.

Holland, S. Douglas↗

A radiation-hard, low-background multiplexer design for spacecraft imager applications

A possible multiplexer design for the focal plane for the Cassini Visible and Infrared Mapping Spectrometer (VIMS) is reviewed. The instrument's requirements for the multiplexed array are summarized. The VIMS instrument has a modest radiation-hardness requirement due to the trajectory and planetary environments in which the instrument will be required to operate. The total ionizing dose hardness requirement is a few tens of kilorads. A thin-gate oxide of a few hundred angstroms thickness is to be used. Field hardness is to be achieved by guard bands or hardened dielectric isolation. The design is argued to meet the low-noise and radiation-hardness required for imaging at Saturn. The design is versatile enough to provide double-correlated and double-uncorrelated sampling, which is accomplished in the signal processing electronics outside the focal plane.

Staller, Craig↗

CCD correlated quadruple sampling processor

A correlated quadruple sampling processor for improved signal-to-noise ratio in the output of a charge-coupled device (CCD) is comprised of: switching means for momentarily clamping a CCD signal line at a first reference level A before a CCD data pulse and then obtaining a first data sample B with respect to the reference A during a CCD data pulse, and storing the positive sample B-A; switching means for momentarily clamping the CCD signal line a second time at the level C during the presence of the CCD data pulse and then obtaining a second data sample D with respect to the reference level C after the CCD data pulse, and storing the negative sample D-C; and means for obtaining the difference between the stored samples +(B-A) and -(D-C), thus increasing the net signal amplitude by a factor of about 2 while the noise would be increased by only a factor of square root of 2 since there will be no correlation in the noise between the double samples +(B-A) and -(D-C) effectively added.

Gaalema, S. D.↗

Forecasting Coronal Mass Ejections from Magnetograms

We report further results from our ongoing assessment of magnetogram-based measures of active-region nonpotentiality (magnetic shear and twist) and size as predictors of coronal mass ejections (CMEs). From a set of 36 vector magnetograms of bipolar active regions (Falconer, Moore, & Gary 2004, ApJ, submitted), we have found that (1) each of our 5 measures of active-region nonpotentiality has a 75-80% success rate in predicting whether an active region will produce a CME within 2 days after the magnetogram, (2) the correlation of each of these measures with CME production in this window is statistically significant (confidence level greater than 95%), (3) our measure of active-region size has a 65% success rate in predicting CMEs in this window, but (4) the correlation between active-region size and CME productivity is not statistically significant (confidence level approximately 80%). As part of the work under our pending 2003 LWS TR&T proposal, we will double our sample to approximately 70 active regions in order to demonstrate a statistically significant correlation between active-region size and CME productivity, and to determine whether this correlation is a byproduct of any Sun-produced correlation between magnetic twist and size of active regions. Since the 2002 LWS Science Workshop, we have found a measure of active-region nonpotentiality (the length of strong-gradient neutral line) that can be measured from a line-of-sight magnetogram, and we have generalized this measure and the corresponding measure from a vector magnetogram (the length of strong-shear neutral line) so that they can be applied to multiple-bipole complex active regions as well as to bipolar active regions. Preliminary results will be presented from application of these two generalized measures to our sample of bipolar active regions and to a new sample of multiple-bipole active regions.

Falconer, D. A.↗