SEARCH · Search NASA

Results for “digital signal processing”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

SourceResearch connectionFrom yearThrough year

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 19 records

All sources NASA NTRS DOE OSTI

DOE OSTI2025

Toward Mixed Analog-Digital Quantum Signal Processing: Quantum AD/DA Conversion and the Fourier Transform

Signal processing stands as a pillar of classical computation and modern information technology, applicable to both analog and digital signals. Recently, advancements in quantum information science have suggested that quantum signal processing (QSP) can enable more powerful signal processing capabilities. However, the developments in QSP have primarily leveraged digital quantum resources, such as discrete-variable (DV) systems like qubits, rather than analog quantum resources, such as continuous-variable (CV) systems like quantum oscillators. Consequently, there remains a gap in understanding how signal processing can be performed on hybrid CV-DV quantum computers. Here we address this gap by developing a new paradigm of mixed analog-digital QSP. We demonstrate the utility of this paradigm by showcasing how it naturally enables analog-digital conversion of quantum signals—specifically, the transfer of states between DV and CV quantum systems. We then show that such quantum analog-digital conversion enables new implementations of quantum algorithms on CV-DV hardware. This is exemplified by realizing the quantum Fourier transform of a state encoded on qubits via the free-evolution of a quantum oscillator, albeit with a runtime exponential in the number of qubits due to information theoretic arguments. Collectively, this work marks a significant step forward in hybrid CV-DV quantum computation, providing a foundation for scalable analog-digital signal processing on quantum processors.

42 ENGINEERING↗

DOE OSTI2024

Waveform resampling with LMN method

In this article, resampling is a common technique applied in digital signal processing. Based on the Fast Fourier Transformation (FFT), we apply an optimization called here the LMN method to achieve fast and robust re-sampling. In addition to performance comparisons with some other popular methods, we illustrate the effectiveness of this LMN method in a particle physics experiment: re-sampling of waveforms from Liquid Argon Time Projection Chambers.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

DOE OSTI2025

Nonlinear analog processing with anisotropic nonlinear films

Digital signal processing is the cornerstone of several modern-day technologies, yet in multiple applications it faces critical bottlenecks related to memory and speed constraints. Thanks to recent advances in metasurface design and fabrication, light-based analog computing has emerged as a viable option to partially replace or augment digital approaches. Several light-based analog computing functionalities have been demonstrated using patterned flat optical elements, with great opportunities for integration in compact nanophotonic systems. So far, however, the available operations have been restricted to the linear regime, limiting the impact of this technology to a compactification of Fourier optics systems. In this paper, we introduce nonlinear operations to the field of metasurface-based analog optical processing, demonstrating that nonlinear optical phenomena, combined with nonlocality in flat optics, can be leveraged to synthesize kernels beyond linear Fourier optics, paving the way to a broad range of new opportunities. As a practical demonstration, we report the experimental synthesis of a class of nonlinear operations that can be used to realize broadband, polarization-selective analog-domain edge detection.

analog image processing↗

DOE OSTI2025

Surface Trap Dynamics and Gamma‐Ray Detection Enhancement in Passivated FAPbBr 3 Perovskite Crystals

Perovskite‐based direct radiation detectors offer a compelling platform for room‐temperature gamma spectroscopy due to their high sensitivity, tunable optoelectronic properties, and compatibility with solution processing. While prior studies on formamidinium lead tribromide (FAPbBr 3 ) have shown that surface passivation mitigates deep trap state impact on the charge collection efficiency (CCE), the influence of surface‐based shallow traps on time‐resolved detector response remains largely unexplored. In this article, a digital signal processing (DSP) method is applied to analyze waveform rising edge dynamics in FAPbBr 3 single‐crystal detectors, identifying prompt and delayed charge collection components. Using the second derivative of the collected charge signal, the onset of shallow trap reemission is isolated, occurring 1.1 µs after carrier generation. Surface passivation suppressed deep trap states, shifting carrier occupancy toward shallower traps and extending the temporal window of delayed charge collection. This delayed contribution correlates with measurable changes in the temporal and amplitude distributions of detector events. By leveraging time‐domain filtering informed by these dynamics, a selective enhancement in signal quality and gamma peak‐to‐Compton ratio (PCR) is achieved, while preserving over 90% of photoelectric events. An improvement in the PCR to 1.80, from the original 1.09, is enabled by focusing on high collection efficiency events corresponding to reemitted carriers in the 1.1 to 3 µs range after the generation event. These results demonstrate a pathway for leveraging shallow trap dynamics to enhance spectral fidelity in time‐resolved perovskite detectors.

36 MATERIALS SCIENCE↗

DOE OSTI2025

A virtual Frisch-grid geometry-based CZT gamma detector for in-field radioisotope identification

Here, we present a Virtual Frisch-Grid geometry-based CZT gamma detector developed for identifying different radioisotopes over an energy range from a few keV up to 2 MeV, and useful for efficient characterization of CZT crystals. The detector is built with a 3 x 3 matrix of CZT crystals, each measuring approximately 6 mm x 6 mm x 15 mm. The charge generated within the sensor’s active volume is read out via an anode connected directly to the AVG3_Dev integrated circuit. A current signal induced by charge drift is collected on side pads of the crystals, enabling reconstruction of a 3D interaction position. This paper discusses the design, development, and performance of the standalone, mobile detector system, which integrates the AVG3_Dev readout IC developed at Brookhaven National Laboratory, a high-speed FPGA-based with per-channel digital signal processing, and embedded system capabilities. The device is compact, battery-powered, and supports wireless data streaming, making it suitable for field operations for radioisotope identification.

47 OTHER INSTRUMENTATION↗

DOE OSTI2026

High-bandwidth frequency domain multiplexed readout of transition-edge sensors for neutrinoless double beta decay searches

The next-generation of cryogenic neutrinoless double-beta decay experiments require increasingly fast readout in order to improve background discrimination. These experiments, operated as cryogenic calorimeters at ∼ 10 mK, are usually read out by high-impedance neutron transmutation doped (NTD) thermistors, which provide good energy resolution, but are limited by ∼ 1 ms response times. Superconducting detectors, such as transition-edge sensors (TESs) with a time resolution of ∼ 100 μs, offer superior timing performance over NTD semiconductor bolometers. To make this technology viable for an application to a thousand or more channels, multiplexed readout is necessary in order to minimize the thermal load and radioactive contamination induced by the readout. Frequency-domain multiplexing readout (fMUX) for TESs, previously developed at Berkeley Lab and McGill University, is currently in use for mm-wave telescopes with detector sampling rates in the order of 100 Hz. We demonstrate a new readout system, based on the McGill/Berkeley digital fMux readout, to satisfy the higher bandwidth and noise requirements of the next generation of TES-instrumented cryogenic calorimeters. Each multiplexing readout module comprises 10 superconducting resonators in the 1–5 MHz range and a DC superconducting quantum interference device (DC-SQUID), interfaced to high-speed field programmable gate array (FPGA)-based electronics for digital signal processing and low-latency SQUID feedback. The new readout samples detectors at 156 kHz, three orders of magnitude faster than its cosmology-oriented predecessor, and demonstrates a stable feedback bandwidth of 3 kHz in a real TES-based system.

47 OTHER INSTRUMENTATION↗

DOE OSTI2024

Mixed domain coherent link with electrically reconfigurable IMDD and coherent modes for O-band data center applications

We report the first O-band link with electrically reconfigurable intensity-modulation direct-detection (IMDD) and coherent operation using custom silicon photonic chips packaged with commercial electronic chips. Transmission below the KP4-FEC threshold is shown using commercial 53 Gbaud PAM4 digital signal processing (DSP) for 16QAM (200 Gbps/ λ ) and PAM4 (100 Gbps/ λ ). Efficient operation of the packaged full link at 12 and 11.2 pJ/bit is achieved for the PAM4 and 16QAM modes, respectively.

Misak, Stephen (ORCID:0000000154973084)↗

DOE OSTI2025

Update on PIP-II beam pattern generator upgrade

The beam pattern generator enables the transfer of beam pulses from the PIP-II linac to the Booster ring, the two RF systems being non-harmonically related. It is synchronized to the timing system to provide beam arrival information to the downstream accelerator subsystems. The design is being upgraded with COTS components and is being developed with a collaboration with SLAC.The pattern generation, digital signal processing and the user interface to an external EPICS server are integrated onto the ARM processor of the SOCFPGA. The progress of the system development is described.

Varghese, P. [Fermilab]↗

DOE OSTI2026

Low power on-chip data transmission for wafer-scale monolithic active pixel sensors

Here, this paper details the implementation of the digital pulse shaping subsystem within the Backbone Transmission Line Encoding (BTLE) driver, a low-power, long-distance on-chip data transmission solution designed in a 65 nm CMOS process. Digital pulse shaping is critical for minimizing inter-symbol interference (ISI) caused by bandwidth limitations of on-chip interconnects, especially in wafer-scale monolithic active pixel sensors (MAPS). A duobinary encoder coupled with a parallelized polyphase finite impulse response (FIR) filter is used for efficient shaping of the transmitted signal spectrum. This reconfigurable architecture achieves reliable 160 Mb/s data transfer over a 10 cm on-chip link, as validated by simulations demonstrating low power consumption (FoM 37.3 fJ/bit/mm of transmission line length) and effective ISI mitigation.

47 OTHER INSTRUMENTATION↗

DOE OSTI2026

Large-scale real-time signal processing in physics experiments: the ALICE TPC FPGA pipeline

For LHC Run 3, the ALICE Time Projection Chamber was upgraded to operate in continuous readout mode. Interaction rates of up to 50 kHz in Pb-Pb collisions require real-time processing of more than 3 TB s -1 of raw detector data. This requirement is met by a custom FPGA-based processing pipeline that performs the complete front-end data treatment fully in-stream, including common-mode correction, pedestal subtraction, ion-tail filtering, zero suppression, and dense data packing. A central element of the design is a highly parallel common-mode correction algorithm operating directly on the streaming data. It robustly identifies signal-free readout channels on a time-bin basis and applies pad-dependent scaling to compensate for local variations in capacitive coupling in the GEM readout. In combination with pedestal subtraction and ion-tail filtering, this enables accurate baseline restoration under extreme high-occupancy conditions, preventing signal loss while efficiently suppressing noise prior to zero suppression. The pipeline operates continuously at the full detector bandwidth and reduces the raw input rate of approximately 3 TB s -1 to about 900 GBps for Pb-Pb collisions at the target interaction rate. Overall, it represents a large-scale FPGA-based real-time signal-processing implementation for high-energy physics detector readout.

Digital signal processing (DSP)↗

DOE OSTI2025

BCARS Simulated Phantom Dataset for Evaluation of Processing Pipelines

Broadband coherent anti-Stokes Raman scattering (BCARS) microscopy is a powerful label-free biological imaging technique, but the raw signal requires careful processing. The vibrationally resonant (Raman) fingerprint signal is usually small compared with instrumental noise sources and the nonresonant background (NRB) inherent in the BCARS signal. Fortunately, the NRB exhibits a systematic phase relationship with the coherent Raman response, acting as a heterodyne amplifier for the weak fingerprint signal. Due to this heterodyne effect, the Raman response can be recovered quantitatively and invariantly across different instruments, provided the NRB shape is known. Even with heterodyne amplification, the amplitudes of fingerprint signal components are often comparable to system noise. Singular value decomposition (SVD), which utilizes spatial information, is often employed for additional noise filtering. Consequently, finding optimal processing parameters to properly distinguish the NRB and Raman responses and suppress noise in the complex BCARS signal requires a reference system that realistically represents the spectral and spatial properties of BCARS signals obtained from biological samples. We present a digital tissue phantom that meets these criteria as a tool for testing candidate signal processing pipelines. The digital phantom is generated with simulated hyperspectral Raman images having system-specific noise and background characteristics. Here, we analyze phantom datasets with differing background and signal-to-noise conditions to evaluate their impact on the performance of multiple signal processing pipelines. Specifically, we investigate the application of a Butterworth filter-based routine to directly estimate the NRB from the BCARS signal. Additionally, we evaluate a Lorentzian wavelet transform as an alternative to the Hilbert transform for extracting the Raman spectrum from the BCARS signal. While we demonstrate this phantom for BCARS, it can be used for any spectroscopic Raman imaging approach.

Dixon, Jessica Z. [Georgia Institute of Technology↗

DOE OSTI2026

Fermilab PIP-II machine protection system digitized data noise elimination scheme and its FPGA implementation

In Fermilab's PIP-II machine protection system, beam loss signals from various detectors are digitized at 125 MS/s. Noise from both high-frequency sources and low-frequency 60 Hz AC power equipment can contaminate the data. To suppress noise across these ranges—especially 60 Hz and its harmonics, which overlap with beam loss signal frequencies—advanced digital processing beyond standard filtering is required. Several real-time functional blocks were simulated and tested on an FPGA: (1) a dual time-constant discharging integrator filter, (2) a de-ripple baseline extraction and storage block, and (3) a fast-recovery discharging integrator. The nonlinear IIR integrator filter removes high-frequency noise and feeds into the baseline extractor. Upon detecting abrupt beam loss, it switches to a longer time constant to prevent baseline distortion. The de-ripple block calculates a valid baseline by averaging over multiple 60 Hz periods, storing results in a 4096-word FPGA RAM. This baseline is subtracted from raw data before integration by the fast-recovery block, which resets quickly after use. All blocks achieved expected performance and were successfully implemented on a low-cost FPGA.

Wu, Jinyuan [Fermilab]↗

DOE OSTI2025

Fermilab PIP II Machine Protection System Digitized Data Noise Elimination Scheme and Its FPGA Implementation

In Fermilab's PIP-II machine protection system, beam loss signals from various detectors are digitized at 125 MS/s. Noise from both high-frequency sources and low-frequency 60 Hz AC power equipment can con-taminate the data. To suppress noise across these ranges especially 60 Hz and its harmonics, which overlap with beam loss signal frequencies advanced digital processing beyond standard filtering is re-quired. Several real-time functional blocks were simu-lated and tested on an FPGA: (1) a dual time-constant discharging integrator filter, (2) a de-ripple baseline extraction and storage block, and (3) a fast-recovery discharging integrator. The nonlinear IIR integrator filter removes high-frequency noise and feeds into the baseline extractor. Upon detecting abrupt beam loss, it switches to a longer time constant to prevent baseline distortion. The de-ripple block calculates a valid base-line by averaging over multiple 60 Hz periods, storing results in a 4096-word FPGA RAM. This baseline is subtracted from raw data before integration by the fast-recovery block, which resets quickly after use. All blocks achieved expected performance.

Wu, Jinyuan [Fermilab] (ORCID:0000000344329521)↗

DOE OSTI2025

Development of BPM Electronics for PIP-II at Fermilab

This paper presents the uTCA4.0-based BPM electronics for PIP-II, featuring four 250 MSPS ADCs and a Xilinx UltraScale+ MPSoC FPGA with 10 GbE uplink. Design elements include signal conditioning, clock, and thermal management. The FPGA performs signal processing, time tagging, digital down-conversion, and phase drift compensation. Position and phase resolution, and thermal stability is validated through dedicated testing.

Liu, Shengli [Fermilab] (ORCID:0009000128436936)↗

DOE OSTI2025

Development of BPM electronics for PIP-II at Fermilab

Liu, Shengli [Fermilab] (ORCID:0009000128436936)↗

DOE OSTI2026

Fermilab PIP II machine protection system digitized data noise elimination scheme and its FPGA implementation

In Fermilab's PIP-II machine protection system, beam loss signals from various detectors are digitized at 125 MS/s. Noise from both high-frequency sources and low-frequency 60 Hz AC power equipment can contaminate the data. To suppress noise across these ranges especially 60 Hz and its harmonics, which overlap with beam loss signal frequencies advanced digital processing beyond standard filtering is required. Several real-time functional blocks were simulated and tested on an FPGA: (1) a dual time-constant discharging integrator filter, (2) a de-ripple baseline extraction and storage block, and (3) a fast-recovery discharging integrator. The nonlinear IIR integrator filter removes high-frequency noise and feeds into the baseline extractor. Upon detecting abrupt beam loss, it switches to a longer time constant to prevent baseline distortion. The de-ripple block calculates a valid baseline by averaging over multiple 60 Hz periods, storing results in a 4096-word FPGA RAM. This baseline is subtracted from raw data before integration by the fast-recovery block, which resets quickly after use. All blocks achieved expected performance.

Wu, J. [Fermilab] (ORCID:0000000344329521)↗

DOE OSTI2025

Upgrade to Fixed and Translating Scintillation-based Loss Detector System in the Fermilab Drift Tube Linac

The closed-off structure of the Fermilab Drift Tube Linac precludes a robust array of instrumentation from directly monitoring the H- beam that is accelerated from 750 keV to 116 MeV. To improve beam tuning and operational assessment of Drift Tube Linac performance, scintillator-based loss monitors were previously installed along the exterior of the first two accelerating cavities to assess low energy beam losses. Here we present a recent upgrade to the loss monitor system, including significant improvements in analog signal processing to address baseline-interfering noise; digitization of the signals to enable regular operational use and tuning; and a new remote operation upgrade of the translating loss monitor with precise positioning of the loss monitor along its nine-foot track. Data from the fixed and translating detectors collected under varying beam conditions validate the utility of the upgrade.

Chen, E. V. [Fermilab]↗

DOE OSTI2025

Upgrade to Fixed and Translating Scintillation-Based Loss Detector System in the Fermilab Drift Tube Linac

The closed-off structure of the Fermilab Drift Tube Linac precludes a robust array of instrumentation from directly monitoring the H- beam that is accelerated from 750 keV to 116 MeV. To improve beam tuning and op-erational assessment of Drift Tube Linac performance, scintillator-based loss monitors were previously installed along the exterior of the first two accelerating cavities to assess low energy beam losses. Here we present a recent upgrade to the loss monitor system, including significant improvements in analog signal processing to address baseline-interfering noise; digitization of the signals to enable regular operational use and tuning; and a new remote operation upgrade of the translating loss monitor with precise positioning of the loss monitor along its nine-foot track. Data from the fixed and translating de-tectors collected under varying beam conditions validate the utility of the upgrade.

Chen, Erin V. [Fermilab] (ORCID:0000000215467899)↗