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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records

High-voltage push to mate electrical interconnect

A high-voltage self-aligning push to mate electrical interconnect device is provided. The electrical interconnect device includes a housing with a mating end and a receiving end. The interconnect also includes an insulator bushing configured to be affixed to the receiving end of the housing. The interconnect also includes a center pin disposed within the housing. The center pin extends from the mating end of the housing to the receiving end of the housing. The interconnect also includes a connector socket disposed within the insulator bushing and which is in electrical communication with the center pin. The interconnect also includes an alignment sleeve including a chamfered mating funnel defining a void configured to accept and surround the housing and at least a portion of insulator bushing.

Martinez, David K.↗

Electrical interconnect structure using metal bridges to interconnect die

A multichip module comprises a carrier, a plurality of chips, an electrical insulating layer, and an electrical interconnect structure. The carrier includes a bottom wall and four side walls defining an internal cavity. The chips are positioned in the internal cavity, with each chip including a plurality of bond pads. The electrical insulating layer is formed from electrically insulating material and is positioned on an upper surface of the carrier and the chips. The electrical interconnect structure includes a plurality of interconnect traces, with each interconnect trace formed from electrically conductive material and electrically connected to a first bond pad on a first chip and a second bond pad on a second chip. Each interconnect trace includes a bridge having a segment that is spaced apart from, and positioned above, the electrical insulating layer.

Young, Barbara Diane↗

Supporting the Nation's Electric Interconnections through Integration of Water into their Long-Term Transmission Planning.

Water is a critical resource in the production of electric power. The purpose of this plan is to extend support to the nation's three electric interconnections toward integrating water issues into their long-range transmission planning. This continued support is at the request of the interconnections. The proposed program leverages prior support as well as that of other similarly focused efforts funded across the Department of Energy (DOE). The effort will utilize a project team lead by Sandia National Laboratories and supported by Argonne National Laboratory, National Renewable Energy Laboratory, and Pacific Northwest National Laboratory. The activities recorded here are meant to provide a menu of potential projects that could be implemented as available resources permit.

24 POWER TRANSMISSION AND DISTRIBUTION↗

The Highly Robust Electrical Interconnects and Ultrasensitive Biosensors Based on Embedded Carbon Nanotube Arrays

We report on our recent breakthroughs in two different applications using well-aligned carbon nanotube (CNT) arrays on Si chips, including (1) a novel processing solution for highly robust electrical interconnects in integrated circuit manufacturing, and (2) the development of ultrasensitive electrochemical DNA sensors. Both of them rely on the invention of a bottom-up fabrication scheme which includes six steps, including: (a) lithographic patterning, (b) depositing bottom conducting contacts, (c) depositing metal catalysts, (d) CNT growth by plasma enhanced chemical vapor deposition (PECVD), (e) dielectric gap-filling, and (f) chemical mechanical polishing (CMP). Such processes produce a stable planarized surface with only the open end of CNTs exposed, whch can be further processed or modified for different applications. By depositing patterned top contacts, the CNT can serve as vertical interconnects between the two conducting layers. This method is fundamentally different fiom current damascene processes and avoids problems associated with etching and filling of high aspect ratio holes at nanoscales. In addition, multiwalled CNTs (MWCNTs) are highly robust and can carry a current density of 10(exp 9) A/square centimeters without degradation. It has great potential to help extending the current Si technology. The embedded MWCNT array without the top contact layer can be also used as a nanoelectrode array in electrochemical biosensors. The cell time-constant and sensitivity can be dramatically improved. By functionalizing the tube ends with specific oligonucleotide probes, specific DNA targets can be detected with electrochemical methods down to subattomoles.

Li, Jun↗

Forming electrical interconnections through semiconductor wafers

An information processing system based on CMOS/SOS technology is being developed by NASA to process digital image data collected by satellites. An array of holes is laser drilled in a semiconductor wafer, and a conductor is formed in the holes to fabricate electrical interconnections through the wafers. Six techniques are used to form conductors in the silicon-on-sapphire (SOS) wafers, including capillary wetting, wedge extrusion, wire intersection, electroless plating, electroforming, double-sided sputtering and through-hole electroplating. The respective strengths and weaknesses of these techniques are discussed and compared, with double-sided sputtering and the through-hole plating method achieving best results. In addition, hollow conductors provided by the technique are available for solder refill, providing a natural way of forming an electrically connected stack of SOS wafers.

Anthony, T. R.↗

Zee electrical interconnect

An interconnect, having some length, that reliably connects two conductors separated by the length of the interconnect when the connection is made but in which one length if unstressed would change relative to the other in operation. The interconnect comprises a base element an intermediate element and a top element. Each element is rectangular and formed of a conducting material and has opposed ends. The elements are arranged in a generally Z-shape with the base element having one end adapted to be connected to one conductor. The top element has one end adapted to be connected to another conductor and the intermediate element has its ends disposed against the other end of the base and the top element. Brazes mechanically and electrically interconnect the intermediate element to the base and the top elements proximate the corresponding ends of the elements. When the respective ends of the base and the top elements are connected to the conductors, an electrical connection is formed therebetween, and when the conductors are relatively moved or the interconnect elements change length the elements accommodate the changes and the associated compression and tension forces in such a way that the interconnect does not mechanically fatigue.

Rust, Thomas M.↗

Modeling the U.S. Western Electric Interconnection to Understand the Consequences of Hydrometeorological Extremes and Options for Risk Mitigation

Electricity grid operators around the world face a dual challenge; withstanding increasingly severe weather and the longer term impacts of climate change, while simultaneously decarbonizing. Extreme weather events such as heat waves and droughts are rising in both severity and frequency, which is threatening the reliability of electricity grids through increased demand, generation capacity losses, and equipment failures. Consequently, incorporating hydrometeorological stressors into computational power systems analysis is becoming an even more critical tool in long term planning and short term operations. However, there is a general lack of open-source customizable grid simulation software capable of exhaustively stress testing the grid under hydrometeorological uncertainty, and/or examining potential risk mitigation pathways. A related, persistent challenge for power system modelers is striking an appropriate balance between model fidelity (e.g. spatial scale and time resolution) and computational tractability (wall clock run-time). In this study, we are proposing a solution to this problem with open-source software that allows users to seamlessly customize the scale and track the accuracy of grid operations models. Our approach allows users to search over numerous model parameters (network topology, mathematical formulation, economic hurdle rates, and transmission line scaling) to identify model instantiations that accommodate experimental design. Further, we use this approach to demonstrate the importance of including extreme weather events in model validation and model selection. Focusing on the occurrence of heatwaves and droughts in the U.S. Western Interconnection, we examine role of extreme events in balancing tradeoffs between model fidelity and run-time at the model design stage.

Economics↗

Radio frequency tuning using a multichip module electrical interconnect structure

A method for tuning a resonant frequency of wireless communication circuitry on a multichip module including a plurality of chips includes applying an electrical insulator to an upper surface of the multichip module; creating a plurality of openings in the electrical insulator, each opening being positioned at a successive one of the bond pads to be electrically connected to create a plurality of exposed bond pads; applying metal to each exposed bond pad to form a successive one of a plurality of interconnect bases; removing a portion of the layer of photoresist to create a plurality of bridge supports, each bridge support positioned between a successive pair of interconnect bases; applying metal to each bridge support and associated interconnect bases to form a successive one of the interconnect traces; removing the bridge supports; and disconnecting one or more of the interconnect traces as necessary to obtain a target resonant frequency.

Young, Barbara Diane↗

Understanding the Capabilities and Limitations of the Controls and Operations of High Voltage Direct Current (HVdc) Converters in Interconnected Electric Power Systems

This project will seek to build a fundamental understanding, and capability, to model and simulate the controls and operations of high voltage direct current (HVdc) converter stations in an electromagnetic simulation environment. While HVdc stations have been operated in the United States for over 50 years, these are typically simple two terminal point-to-point systems. Recently multi-terminal systems have begun to be deployed. The challenge with these new multi-terminal systems is that they often use different control schemes on the different terminals. The interactions of existing and new controls, and the fact that HVdc systems are rates in the 1,000’s of MWs means that small control instabilities can have dramatic impacts to bulk power systems. Despite these challenges, the operational capabilities of HVdc make them an attractive option for the transfer of the large amounts of renewable electricity that will be necessary for decarbonization of the nation’s electrical infrastructure and other sectors.

42 ENGINEERING↗

Electrical interconnect

An interconnect includes a first set of connector pads, a second set of connector pads, and a continuous central portion. A first plurality of legs extends at a first angle from the continuous central portion. Each leg of the first plurality of legs is connected to a connector pad of a first set of connector pads. A second plurality of legs extends at a second angle from the continuous central portion. Each leg of the second plurality of legs is connected to a connector pad of the second set of connector pads. Gaps are defined between legs. The gaps enable movement of the first set of connector pads relative to the second set of connector pads.

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Method for forming an electrical interconnect

A method including forming an interconnect in a metal member. The interconnect includes multiple repeating, nested V-shaped structures forming a continuous central portion. A vertex of each of the multiple repeating, nested V-shaped structures adjoins a next vertex of a next V-shaped structure of the multiple repeating, nested V-shaped structures. The method further includes separating the interconnect from the metal member.

42 ENGINEERING↗

System and method for obfuscation of electronic circuits

A computer-implemented method of generating randomized electrical interconnects for an electronic circuit comprises steps of receiving a netlist of nodes of electronic components to be connected, each connection of nodes forming an electrical interconnect; determining a list of one or more path directions for each electrical interconnect; determining a plurality of path direction distances for each electrical interconnect; generating a plurality of segments for each electrical interconnect, each segment having one path direction and a length which are selected at random; calculating a sum of the lengths of all of the segments in each path direction each time a segment is generated for each electrical interconnect; removing one path direction from the list of path directions when a first condition is met; and stopping the generating a plurality of segments for each electrical interconnect when a second condition is met.

Trujillo, Joshua↗

System and method for obfuscation of electronic circuits

A computer-implemented method of generating randomized electrical interconnects for an electronic circuit comprises steps of receiving a netlist of nodes of electronic components to be connected, each connection between the nodes forming an electrical interconnect; determining a list of one or more path directions for each electrical interconnect; determining a plurality of path direction distances for each electrical interconnect; generating a plurality of segments for each electrical interconnect, each segment having one path direction and a length which are selected at random; calculating a sum of the lengths of all of the segments in each path direction each time a segment is generated for each electrical interconnect; removing one path direction from the list of path directions when a first condition is met; and stopping the generating a plurality of segments for each electrical interconnect when a second condition is met.

Trujillo, Joshua↗

System and method for obfuscation of electronic circuits

A computer-implemented method of generating randomized electrical interconnects for an electronic circuit comprises steps of receiving a netlist of nodes of electronic components to be connected, each connection between the nodes forming an electrical interconnect; determining a list of one or more path directions for each electrical interconnect; determining a plurality of path direction distances for each electrical interconnect; generating a plurality of segments for each electrical interconnect, each segment having one path direction and a length which are selected at random; calculating a sum of the lengths of all segments of the plurality of segments in each path direction each time a segment is generated for each electrical interconnect; removing one path direction from the list of path directions when a first condition is met; and stopping the generating a plurality of segments for each electrical interconnect when a second condition is met.

Trujillo, Joshua↗

Photovoltaic sub-cell interconnects

Photovoltaic sub-cell interconnect systems and methods are provided. In one embodiment, a photovoltaic device comprises a thin film stack of layers deposited upon a substrate, wherein the thin film stack layers are subdivided into a plurality of sub-cells interconnected in series by a plurality of electrical interconnection structures; and wherein the plurality of electrical interconnection structures each comprise no more than two scribes that penetrate into the thin film stack layers.

14 SOLAR ENERGY↗

Packaging Technology Designed, Fabricated, and Assembled for High-Temperature SiC Microsystems

A series of ceramic substrates and thick-film metalization-based prototype microsystem packages designed for silicon carbide (SiC) high-temperature microsystems have been developed for operation in 500 C harsh environments. These prototype packages were designed, fabricated, and assembled at the NASA Glenn Research Center. Both the electrical interconnection system and the die-attach scheme for this packaging system have been tested extensively at high temperatures. Printed circuit boards used to interconnect these chip-level packages and passive components also are being fabricated and tested. NASA space and aeronautical missions need harsh-environment, especially high-temperature, operable microsystems for probing the inner solar planets and for in situ monitoring and control of next-generation aeronautical engines. Various SiC high-temperature-operable microelectromechanical system (MEMS) sensors, actuators, and electronics have been demonstrated at temperatures as high as 600 C, but most of these devices were demonstrated only in the laboratory environment partially because systematic packaging technology for supporting these devices at temperatures of 500 C and beyond was not available. Thus, the development of a systematic high-temperature packaging technology is essential for both in situ testing and the commercialization of high-temperature SiC MEMS. Researchers at Glenn developed new prototype packages for high-temperature microsystems using ceramic substrates (aluminum nitride and 96- and 90-wt% aluminum oxides) and gold (Au) thick-film metalization. Packaging components, which include a thick-film metalization-based wirebond interconnection system and a low-electrical-resistance SiC die-attachment scheme, have been tested at temperatures up to 500 C. The interconnection system composed of Au thick-film printed wire and 1-mil Au wire bond was tested in 500 C oxidizing air with and without 50-mA direct current for over 5000 hr. The Au thick-film metalization-based wirebond electrical interconnection system was also tested in an extremely dynamic thermal environment to assess thermal reliability. The I-V curve1 of a SiC high-temperature diode was measured in oxidizing air at 500 C for 1000 hr to electrically test the Au thick-film material-based die-attach assembly.

Chen, Liang-Yu↗

Policy and Cost Allocation Considerations for Large Electric Load Interconnections: Emerging Policy Trends in Rate Structures, Interconnection, and Cost Impacts on Other System Users

Load growth in the United States is rapidly increasing: load from data centers alone has tripled over the past decade, and this growth is forecasted to continue accelerating. These and other large electric loads (LELs) promise economic benefits at the state and local level, but their deployment has also led to increasing concerns about grid impacts and potential cost shifts onto other ratepayers. Legislators, regulators, and other stakeholders are increasingly proposing and enacting policies in effort to balance these and other considerations. This white paper reviews state-level legislation, selected utility rate cases, and relevant federal orders in an effort to describe and categorize relevant trends in policies related to LEL cost allocation, interconnection, and deployment. Policy categories identified through this review include tax incentives, rate actions, and requirements related to interconnection, permitting, and reporting. By offering a taxonomy of policies, this white paper aims to offer a resource to policymakers and other stakeholders navigating this transformative moment for the grid.

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