Electronic Parts Evaluation Activities
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The NASA Electronic Parts and Packaging (NEPP) Program - NASA Items of Interest
This presentation provides a background summary of the NEPP Program, its origins and operating principles followed by examples of issues and opportunities that NEPP is currently pursuing. These examples include Electrostatic Discharge protection procedures that are not being properly applied, one reason for which is the confusion caused by the numerous, different standards covering this topic. Updates are provided for key activities in radiation hardness assurance, and the evaluation of automotive grade electronic parts for use in space applications. Some recent examples of part problems experienced by NASA are briefly described and the latest trending of incidences of counterfeit electronic parts is shown graphically. Finally some forward actions are identified and the time, place and typical topics is provided for the next NEPP Electronic Technology Workshop (ETW).
Electrical Electronic and Electromechanical (EEE)↗
Ion-implanted laser annealed silicon solar cells
Development of low cost solar cells fabrication technology is being sponsored by NASA JPL as part of the Low Cost Solar Array Project (LSA). In conformance to Project requirements ion implantation and laser annealing were evaluated as junction formation techniques offering low cost-high throughput potential. Properties of cells fabricated utilizing this technology were analyzed by electrical, transmission electron microscopy, Rutherford backscattering and secondary ion mass spectrometry techniques. Tests indicated the laser annealed substrates to be damage free and electrically active. Similar analysis of ion implanted furnace annealed substrates revealed the presence of residual defects in the form of dislocation lines and loops with substantial impurity redistribution evident for some anneal temperature/time regimes. Fabricated laser annealed cells exhibited improved spectral response and conversion efficiency in comparison to furnace annealed cells. An economic projection for LSA indicates a potential for considerable savings from laser annealing technology.
Katzeff, J. S.↗
Evaluation methodology guidance for stack packages
This report provides evaluation methodology guidance based on previous National Aeronautics and Space Administration (NASA) reports and literature surveys for 3D stack packages and assemblies. Two aspects of technology are covered: the package itself (guidance for functional packages) and package assembly manufacturing and reliability. This work was funded by the NASA Electronic Parts and Packaging (NEPP) Program. The objectives of this NEPP project are to: Perform a literature survey of 3D stack technology; perform a literature survey on the evaluation methodology for 3D package and assembly; combine the two aspects to provide evaluation methodology for both aspects with consideration of interactions between package and assembly; generate guidance on the evaluation methodology for 3D stack package integrity prior to and after assembly; provide recommendations on future experimental activities. The qualification and evaluation methodology guidelines will facilitate NASA projects in effectively evaluating the reliability of very dense and newly available high-density 3D stack packages, allowing more processing power in a smaller board footprint and lower system weight.
Gerke, David↗
Past, Present and Future Trends for NASA's EEE Parts Program
The foundation of NASA's Electrical, Electronic and Electromechanical (EEE) parts program is standardization. Standardization helps to reduce the number of unknown variables present as a project or program progresses; unknown variables equate to unknown risk. NASA spacecraft are usually 'one-offs' or at least part of a very short run, and every new part that is used represents a risk that has to be understood and mitigated as necessary. This equates directly to time and cost. Standardization of component parts is used to provide a foundation of known, dependable, qualified parts upon which a safe, reliable system can be built. In addition, the evaluation and selection of parts for the standard parts list unifies the activity under one group of experts rather than having engineers on each project overlapping and duplicating efforts. Thus, the project support engineers are able to concentrate on understanding and mitigating the risks for the non standard parts required to meet specific requirements of their project. Rapid technology change is producing conditions that make any form of parts-based standardization increasingly difficult, particularly the use of Commercial Off The Shelf (COTS) parts and assemblies. There are many complications to COTS-based standardization. COTS parts change rapidly and unpredictably, often have different characteristics fiom manufacturer to manufacturer, frequently are only available through distribution, have no universal specification and have variable and unpredictable radiation characteristics. This presentation will discuss some potential approaches to COTS parts standardization. Further into the future, in three to five years perhaps, the use of COTS boards and boxes will be extensive and standardization at these levels of assembly will be necessary. In five to ten years, most major spacecraft functions will probably be performed by COTS boards. How will this be achieved? What role will the parts engineer play, if any? This presentation will borrow from the lessons of the past to suggest some scenarios for the future.
Sampson, Michael J.↗
NASA Johnson Space Center Usability Testing and Analysis Facility (UTAF) Overview
The Usability Testing and Analysis Facility (UTAF) is part of the Space Human Factors Laboratory at the NASA Johnson Space Center in Houston, Texas. The facility provides support to the Office of Biological and Physical Research, the Space Shuttle Program, the International Space Station Program, and other NASA organizations. In addition, there are ongoing collaborative research efforts with external businesses and universities. The UTAF provides human factors analysis, evaluation, and usability testing of crew interfaces for space applications. This includes computer displays and controls, workstation systems, and work environments. The UTAF has a unique mix of capabilities, with a staff experienced in both cognitive human factors and ergonomics. The current areas of focus are: human factors applications in emergency medical care and informatics; control and display technologies for electronic procedures and instructions; voice recognition in noisy environments; crew restraint design for unique microgravity workstations; and refinement of human factors processes. This presentation will provide an overview of ongoing activities, and will address how the projects will evolve to meet new space initiatives.
Whitmore, M.↗
NASA Johnson Space Center Usability Testing and Analysis Facility (WAF) Overview
The Usability Testing and Analysis Facility (UTAF) is part of the Space Human Factors Laboratory at the NASA Johnson Space Center in Houston, Texas. The facility provides support to the Office of Biological and Physical Research, the Space Shuttle Program, the International Space Station Program, and other NASA organizations. In addition, there are ongoing collaborative research efforts with external businesses and universities. The UTAF provides human factors analysis, evaluation, and usability testing of crew interfaces for space applications. This includes computer displays and controls, workstation systems, and work environments. The UTAF has a unique mix of capabilities, with a staff experienced in both cognitive human factors and ergonomics. The current areas of focus are: human factors applications in emergency medical care and informatics; control and display technologies for electronic procedures and instructions; voice recognition in noisy environments; crew restraint design for unique microgravity workstations; and refinement of human factors processes. This presentation will provide an overview of ongoing activities, and will address how the projects will evolve to meet new space initiatives.
Whitmore, M.↗
Electronics for Extreme Environments
Most of the NASA missions involve extreme environments comprising radiation and low or high temperatures. Current practice of providing friendly ambient operating environment to electronics costs considerable power and mass (for shielding). Immediate missions such as the Europa orbiter and lander and Mars landers require the electronics to perform reliably in extreme conditions during the most critical part of the mission. Some other missions planned in the future also involve substantial surface activity in terms of measurements, sample collection, penetration through ice and crust and the analysis of samples. Thus it is extremely critical to develop electronics that could reliably operate under extreme space environments. Silicon On Insulator (SOI) technology is an extremely attractive candidate for NASA's future low power and high speed electronic systems because it offers increased transconductance, decreased sub-threshold slope, reduced short channel effects, elimination of kink effect, enhanced low field mobility, and immunity from radiation induced latch-up. A common belief that semiconductor devices function better at low temperatures is generally true for bulk devices but it does not hold true for deep sub-micron SOI CMOS devices with microscopic device features of 0.25 micrometers and smaller. Various temperature sensitive device parameters and device characteristics have recently been reported in the literature. Behavior of state of the art technology devices under such conditions needs to be evaluated in order to determine possible modifications in the device design for better performance and survivability under extreme environments. Here, we present a unique approach of developing electronics for extreme environments to benefit future NASA missions as described above. This will also benefit other long transit/life time missions such as the solar sail and planetary outposts in which electronics is out open in the unshielded space at the ambient space temperatures and always exposed to radiation. Additional information is contained in the original extended abstract.
Patel, J. U.↗
NASA Johnson Space Center Usability Testing and Analysis facility (UTAF) Overview
The Usability Testing and Analysis Facility (UTAF) is part of the Space Human Factors Laboratory at the NASA Johnson Space Center in Houston, Texas. The facility performs research for NASA's HumanSystems Integration Program, under the HumanSystems Research and Technology Division. Specifically, the UTAF provides human factors support for space vehicles, including the International Space Station, the Space Shuttle, and the forthcoming Crew Exploration Vehicle. In addition, there are ongoing collaborative research efforts with external corporations and universities. The UTAF provides human factors analysis, evaluation, and usability testing of crew interfaces for space applications. This includes computer displays and controls, workstation systems, and work environments. The UTAF has a unique mix of capabilities, with a staff experienced in both cognitive human factors and ergonomics. The current areas of focus are: human factors applications in emergency medical care and informatics; control and display technologies for electronic procedures and instructions; voice recognition in noisy environments; crew restraint design for unique microgravity workstations; and refinement of human factors processes and requirements. This presentation will provide an overview of ongoing activities, and will address how the UTAF projects will evolve to meet new space initiatives.
Whitmore, Mihriban↗
Assessment of SOI Devices and Circuits at Extreme Temperatures
Electronics designed for use in future NASA space exploration missions are expected to encounter extreme temperatures and wide thermal swings. Such missions include planetary surface exploration, bases, rovers, landers, orbiters, and satellites. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of mission. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical devices, circuits, and systems suitable for applications in deep space exploration missions and aerospace environment. Silicon-On-Insulator (SOI) technology has been under active consideration in the electronics industry for many years due to the advantages that it can provide in integrated circuit (IC) chips and computer processors. Faster switching, less power, radiationtolerance, reduced leakage, and high temp-erature capability are some of the benefits that are offered by using SOI-based devices. A few SOI circuits are available commercially. However, there is a noticeable interest in SOI technology for different applications. Very little data, however, exist on the performance of such circuits under cryogenic temperatures. In this work, the performance of SOI integrated circuits, evaluated under low temperature and thermal cycling, are reported. In particular, three examples of SOI circuits that have been tested for operation at low at temperatures are given. These circuits are SOI operational amplifiers, timers and power MOSFET drivers. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these circuits for use in space exploration missions at cryogenic temperatures. The findings are useful to mission planners and circuit designers so that proper selection of electronic parts can be made, and risk assessment can be established for such circuits for use in space missions.
Elbuluk, Malik↗
Contractors Road Heavy Equipment Area SWMU 055 Corrective Measures Implementation Progress Report Kennedy Space Center, Florida
This Corrective Measures Implementation (CMI) Progress Report documents: (i) activities conducted as part of supplemental assessment activities completed from June 2009 through November 2014; (ii) Engineering Evaluation (EE) Advanced Data Packages (ADPs); and (iii) recommendations for future activities related to corrective measures at the Site. Applicable meeting minutes are provided as Appendix A. The following EE ADPs for CRHE are included with this CMI Progress Report: center dot Supplemental Site Characterization ADP (Step 1 EE) (Appendix B) center dot Site Characterization ADP (Step 1 EE) for Hot Spot 1 (HS1) (Appendix C) center dot Remedial Alternatives Evaluation (Step 2 EE) ADP for HS1 (Appendix D) center dot Interim Measures Work Plan (Step 3 EE) ADP for HS1 (Appendix E) center dot Site Characterization ADP (Step 1 EE) ADP for Hot Spot 2 (HS2), High Concentration Plume (HCP), and Low Concentration Plume (LCP) (Appendix F) A summary of direct-push technology (DPT) and groundwater monitoring well sampling results are provided in Appendices G and H, respectively. The Interim Land Use Control Implementation Plan (LUCIP) is provided as Appendix I. Monitoring well completion reports, other applicable field forms, survey data, and analytical laboratory reports are provided as Appendices J through M, respectively, in the electronic copy of this document. Selected Site photographs are provided in Appendix N. The interim groundwater monitoring plan and document revision log are included as Appendices O and P, respectively. KSC Electronic Data Deliverable (KEDD) files are provided on the attached compact disk.
Johnson, Jill W.↗
Embedded passives emulator FY2003 interim report
The National Aeronautics and Space Administration Electronic Parts and Packaging (NEPP) Program has been evaluating state-of-the-art Embedded Passive Technology for the printed circuit board (PCB) industry for the past several years and has conducted its own testing on embedded passive coupons (resistors and capacitors). This document is a progress report of the work performed through fiscal year 2008 by NASA and the Navy to convert an existing PWB (printed wiring board) design to a design that incorporates embedded passive components. The work is being performed through a memorandum of understanding (MOU) between the NEPP Program (NASA) and the Naval Surface Warfare Center (NSWC) Crane Emerging Critical Interconnect Technology (ECIT) Program. NSWC Crane’s ECIT Program has funding to convert two PCB designs from the military and aerospace industry to a PCB design with embedded passives. ECIT will provide a design team that will take a well characterized design and convert it to an embedded design. They will also provide electrical modeling and layout expertise as well as build the PWB in their facility in Indiana. NEPP, through the Jet Propulsion Laboratory (JPL), will assemble any passives deemed not suitable for embedding and the active components and electrically test the new design to the existing (non-embedded) design
Gerke, David↗
Charge-Control Unit for Testing Lithium-Ion Cells
A charge-control unit was developed as part of a program to validate Li-ion cells packaged together in batteries for aerospace use. The lithium-ion cell charge-control unit will be useful to anyone who performs testing of battery cells for aerospace and non-aerospace uses and to anyone who manufacturers battery test equipment. This technology reduces the quantity of costly power supplies and independent channels that are needed for test programs in which multiple cells are tested. Battery test equipment manufacturers can integrate the technology into their battery test equipment as a method to manage charging of multiple cells in series. The unit manages a complex scheme that is required for charging Li-ion cells electrically connected in series. The unit makes it possible to evaluate cells together as a pack using a single primary test channel, while also making it possible to charge each cell individually. Hence, inherent cell-to-cell variations in a series string of cells can be addressed, and yet the cost of testing is reduced substantially below the cost of testing each cell as a separate entity. The unit consists of electronic circuits and thermal-management devices housed in a common package. It also includes isolated annunciators to signal when the cells are being actively bypassed. These annunciators can be used by external charge managers or can be connected in series to signal that all cells have reached maximum charge. The charge-control circuitry for each cell amounts to regulator circuitry and is powered by that cell, eliminating the need for an external power source or controller. A 110-VAC source of electricity is required to power the thermal-management portion of the unit. A small direct-current source can be used to supply power for an annunciator signal, if desired.
Reid, Concha M.↗
Passive Dust Mitigation Technologies Being Developed for Demonstration Under Patch Plate Materials Compatibility Analysis Task
With the Artemis program, we are planning longer stays on the surface, with more activities that have the potential to put the astronauts and equipment in contact with greater quantities of lunar dust. The success of these missions will depend on our understanding of material interactions with lunar dust and the development of ways to mitigate dust effects in cases where exposure to dust will lead to failure of components, unacceptable loss of power or thermal control, unacceptable loss of visibility, or health issues. Passive dust mitigation by coating or surface alteration is one method that is being developed and demonstrated under the Space Technology Mission Directorate’s Game Changing Technology, Dust Mitigation Program as part of the Patch Plate Materials Compatibility Assessment Task. The goal of the task is to alter the surfaces of materials in order to passively reduce the adhesion of dust, demonstrate their performance in relevant ground-based tests using lunar simulants, and prepare them for demonstration through experiment on the lunar surface. Optically transparent, sputter deposited, work function matching coatings are being developed to reduce adhesion of dust to windows, lenses and display panels by matching the minimum energy to remove an electron from the surface to that of lunar dust in order to reduce adhesion due to charge transfer. Low surface energy coatings and surfaces for thermal control are also being developed to reduce the bonding of dust with the surface enabling it to be removed more easily. Conductive coatings with the ability to shed dust more easily are being developed for use with the active Electrodynamic Dust Shield technology to help reduce the power needed to remove dust from the surface. Passive dust mitigation surfaces for metals such as aluminum, stainless steel, and titanium are being developed that reduce the area of dust contact with the surfaces through topographical modification using laser ablation patterning to impart hierarchical topographies with nanometer to micrometer length scales in a single step. Topographically modified polymeric materials, both those with extensive space heritage and those with lower technology readiness levels, are also being evaluated. Space suit fabric surfaces that can reduce dust penetration into and through the fabric are also being investigated as well as pristine and topographically modified ceramic materials that exhibit high wear resilience. An overview of the passive dust mitigation surfaces and coatings being developed under this task, ground testing being conducted using lunar simulants, characterization techniques, and materials preparation for flight sample delivery for integration into the Alpha Space Regolith Adherence Characterization experiment going to the lunar surface on a Commercial Lunar Payload Services (CLPS) lander in 2023 will be discussed.
Lunar dust, passive mitigation, lunar simulant, co↗
Test Cases for Flutter of the Benchmark Models Rectangular Wings on the Pitch and Plunge Apparatus
The supercritical airfoil was chosen as a relatively modem airfoil for comparison. The BOO12 model was tested first. Three different types of flutter instability boundaries were encountered, a classical flutter boundary, a transonic stall flutter boundary at angle of attack, and a plunge instability near M = 0.9 and for zero angle of attack. This test was made in air and was Transonic Dynamics Tunnel (TDT) Test 468. The BSCW model (for Benchmark SuperCritical Wing) was tested next as TDT Test 470. It was tested using both with air and a heavy gas, R-12, as a test medium. The effect of a transition strip on flutter was evaluated in air. The B64AOlO model was subsequently tested as TDT Test 493. Some further analysis of the experimental data for the BOO12 wing is presented. Transonic calculations using the parameters for the BOO12 wing in a two-dimensional typical section flutter analysis are given. These data are supplemented with data from the Benchmark Active Controls Technology model (BACT) given and in the next chapter of this document. The BACT model was of the same planform and airfoil as the BOO12 model, but with spoilers and a trailing edge control. It was tested in the heavy gas R-12, and was instrumented mostly at the 60 per cent span. The flutter data obtained on PAPA and the static aerodynamic test cases from BACT serve as additional data for the BOO12 model. All three types of flutter are included in the BACT Test Cases. In this report several test cases are selected to illustrate trends for a variety of different conditions with emphasis on transonic flutter. Cases are selected for classical and stall flutter for the BSCW model, for classical and plunge for the B64AOlO model, and for classical flutter for the BOO12 model. Test Cases are also presented for BSCW for static angles of attack. Only the mean pressures and the real and imaginary parts of the first harmonic of the pressures are included in the data for the test cases, but digitized time histories have been archived. The data for the test cases are available as separate electronic files. An overview of the model and tests is given, the standard formulary for these data is listed, and some sample results are presented.
Robert M Bennett↗
Rapid Bayesian High Entropy Alloy Designs Fabricated via Wire Arc Additive Manufacturing
Purpose: This project seeks to demonstrate a new high-throughput (rapid) alloy design technique applied to creating new high entropy alloys (HEAs) for extreme environments. High entropy alloys shift the design paradigm from being focused on a single principal element (e.g. nickel-based alloys) to target alloys that include high atomic fractions (X >10%) of multiple elements. These HEA materials can exhibit sluggish diffusion and enhanced corrosion resistance, ideal for potential applications in advanced ultra supercritical (A-USC) steam cycles for power generation. Scope: The addition of multiple elements in high atomic fractions creates an enormous design space that cannot easily be investigated by traditional material design strategies such as designed of experiments (DOE). This project utilizes a Bayesian machine learning algorithm that has been modified to work with calculation of phase diagrams (CALPHAD) software. This Bayesian algorithm reduces manual inputs and increase the likelihood of achieving an optimal solution. Compositional inputs to this algorithm will be assessed using existing material property models for high temperature strength and corrosion resistance. The target for alloy performance will be a 15% (~100 ⁰C) increase in allowable service temperature beyond heat-resistant stainless steels while maintaining or improving alloy cost and corrosion resistance. Haynes 230 was selected as a baseline, which is 57 wt% Ni with 22 wt% Cr 14 wt% W, and 2 wt% Mo as solid solution strengtheners. In addition to rapid design via Bayesian machine learning, the alloys were rapidly fabricated using a multi-wire arc additive manufacturing (mWAAM) technique which allows for precise control of alloy composition and assessing of alloy design “windows” to study composition effects. Build speeds for wire-arc additive processes are among the highest for additive technologies enabling rapid and reliable sample fabrication when compared to conventional methods such as arc button melting. The mWAAM samples will be rapidly characterized via instrumented indentation for room temperature modulus and strength and for elevated temperature strength via hot hardness tests. After being screened with hardness testing, potential alloys will be further evaluated with conventional microscopy techniques including scanning electron microscopy (SEM) and transmission electron microscopy (TEM) to assess agreement with modeling results. The most promising compositions will also be evaluated by printing full sized tensile specimens for mechanical behavior tests at elevated temperatures. Results: Bayesian machine learning of a single performance function was initially used to optimize five performance metrics: 1) single phase stability, 2) yield strength, 3) creep resistance (low diffusion coefficient), 4) freezing range (weldability), and 5) material cost. The single performance function was suboptimal as assumptions had to be made about the results while formulating the optimization. A goal-oriented Bayesian optimization strategy (Hanaoka, 2021) was implemented with CALPHAD for use with the five metrics above. This multi-objective Bayesian optimization (MOBO) enabled the design of NiCrCoFe alloys with V and W additions. A base composition of NiCoCr was selected as Ni provides a stable FCC matrix, Cr aids corrosion/oxidation resistance, and Co is a solid-solutions strengthener that also improves creep by increasing the activation energy. Fe helps reduce diffusion coefficients and cost. Finally, V and W were selected for their reasonable solubility and high atomic misfit to aid in solid solution strengthening. Cracking of the mWAAM specimens was an early issue, and the Easton solidification cracking model (Easton et al., 2014a) was selected for addition to the MOBO function. High performing alloys fabricated by mWAAM included Ni 28 Cr 25 Co 26 Fe 15 V 8 and Ni 62 Cr 18 Co 1 Fe 3 W 15 . It was observed that even after adapting the mWAAM process for W, the W did not fully dissolve. To fully evaluate the Ni 62 Cr 18 Co 1 Fe 3 W 15 composition, a cored wire (80-20 NiCr sheath/powder core) was manufactured and printed via WAAM, and HIP’ing was utilized to homogenize and densify the printed alloy. The V and W alloys produced met metrics 1 (solid solution), 4 (solidification cracking), and 5 (cost). However, an unmodeled mechanism of thermal stress cracking was identified in the WAAM produced materials, perhaps exacerbated by the lack of grain boundary strengthening elements (B, C). Conclusions & Recommendations: A high-throughput (rapid) alloy design technique was applied to designing and manufacturing new high entropy alloys (HEAs) for extreme environments utilizing MOBO and mWAAM. The developed process was rapid and effective in addressing the mechanisms included in the model. The lack of grain boundary strengthening element additions (e.g., B, C) was a simplification that likely produced thermal stress cracking that turned into a large part of the investigation. Additions on the order of 0.005 wt% B and 0.05 wt% C likely would have minimized thermal stress grain boundary cracking. Overall, the high throughput design strategy is promising for rapid design of metrics-driven alloys for advanced ultra supercritical (A-USC) steam cycles for power generation. The MOBO and mWAAM process could be commercialized to accelerate metrics-driven alloy design. In addition, the cored-wire process utilized for scale-up is a promising high-volume process for WAAM alloy development and scale-up.
36 MATERIALS SCIENCE↗
From Lunar Regolith to Fabricated Parts: Technology Developments and the Utilization of Moon Dirt
The U.S. Space Exploration Policy has as a cornerstone the establishment of an outpost on the moon. This lunar outpost wil1 eventually provide the necessary planning, technology development, testbed, and training for manned missions in the future beyond the Moon. As part of the overall activity, the National Aeronautics and Space Administration (NASA) is investigating how the in situ resources can be utilized to improve mission success by reducing up-mass, improving safety, reducing risk, and bringing down costs for the overall mission. Marshall Space Flight Center (MSFC), along with other NASA centers, is supporting this endeavor by exploring how lunar regolith can be mined for uses such as construction, life support, propulsion, power, and fabrication. An infrastructure capable of fabrication and nondestructive evaluation will be needed to support habitat structure development and maintenance, tools and mechanical parts fabrication, as well as repair and replacement of space-mission hardware such as life-support items, vehicle components, and crew systems, This infrastructure will utilize the technologies being developed under the In Situ Fabrication and Repair (ISFR) element, which is working in conjunction with the technologies being developed under the In Situ Resources Utilization (ISRU) element, to live off the land. The ISFR Element supports the Space Exploration Initiative by reducing downtime due to failed components; decreasing risk to crew by recovering quickly from degraded operation of equipment; improving system functionality with advanced geometry capabilities; and enhancing mission safety by reducing assembly part counts of original designs where possible. This paper addresses the need and plan for understanding the properties of the lunar regolith to determine the applicability of using this material in a fabrication process. This effort includes the development of high fidelity simulants that will be used in fabrication processes on the ground to drive down risk and increase the Technology Readiness Level (TRL) prior to implementing this capability on the moon. Also discussed in this paper is the on-going research using Electron Beam Melting (EBM) technology as a possible solution to manufacturing parts and spares on the Moon's surface.
McLemore, C. A.↗
Assessment of SOI AND Gate, Type CHT-7408, for Operation in Extreme Temperature Environments
Electronic parts based on silicon-on-insulator (SOI) technology are finding widespread applications due to their ability to operate in harsh environments and the benefits they offer as compared to their silicon counterparts. Due to their construction, they are tailored for high temperature operation and show good tolerance to radiation events. In addition, their inherent design lessens the formation of parasitic junctions, thereby reducing leakage currents, decreasing power consumption, and enhancing speed. These devices are typically rated in temperature capability from -55 C to about +225 C, and their characteristics over this temperature range are documented in data sheets. Since electronics in some of NASA space exploration missions are required to operate under extreme temperature conditions, both cold and hot, their characteristic behavior within the full temperature spectrum must be determined to establish suitability for use in space applications. The effects of extreme temperature exposure on the performance of a new commercial-off-the-shelf (COTS) SOI AND gate device were evaluated in this work. The high temperature, quad 2-inputs AND gate device, which was recently introduced by CISSOID, is fabricated using a CMOS SOI process. Some of the specifications of the CHT-7408 chip are listed in a table. By supplying a constant DC voltage to one gate input and a 10 kHz square wave into the other associated gate input, the chip was evaluated in terms of output response, output rise (t(sub r)) and fall times (tf), and propagation delays (using a 50% level between input and output during low to high (tPLH) and high to low (tPHL) transitions). The supply current of the gate circuit was also obtained. These parameters were recorded at various test temperatures between -195 C and +250 C using a Sun Systems environmental chamber programmed at a temperature rate of change of 10 C/min. In addition, the effects of thermal cycling on this chip were determined by exposing it to a total of 12 cycles between -195 C and +250 C. Following the cycling activity, measurements were performed again at the test temperatures of -195 C, +21 C, and +250 C.
Patterson, Richard↗