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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
NASA NTRS1980

Design of a massively parallel processor

The massively parallel processor (MPP) system is designed to process satellite imagery at high rates. A large number (16,384) of processing elements (PE's) are configured in a square array. For optimum performance on operands of arbitrary length, processing is performed in a bit-serial manner. On 8-bit integer data, addition can occur at 6553 million operations per second (MOPS) and multiplication at 1861 MOPS. On 32-bit floating-point data, addition can occur at 430 MOPS and multiplication at 216 MOPS.

Batcher, K. E.↗
NASA NTRS1984

Floating-point function generation routines for 16-bit microcomputers

Several computer subroutines have been developed that interpolate three types of nonanalytic functions: univariate, bivariate, and map. The routines use data in floating-point form. However, because they are written for use on a 16-bit Intel 8086 system with an 8087 mathematical coprocessor, they execute as fast as routines using data in scaled integer form. Although all of the routines are written in assembly language, they have been implemented in a modular fashion so as to facilitate their use with high-level languages.

Mackin, M. A.↗
NASA NTRS1993

Spaceborne Imaging Radar-C instrument

The Spaceborne Imaging Radar-C is the next radar in the series of spaceborne radar experiments, which began with Seasat and continued with SIR-A and SIR-B. The SIR-C instrument has been designed to obtain simultaneous multifrequency and simultaneous multipolarization radar images from a low earth orbit. It is a multiparameter imaging radar that will be flown during at least two different seasons. The instrument operates in the squint alignment mode, the extended aperture mode, the scansar mode, and the interferometry mode. The instrument uses engineering techniques such as beam nulling for echo tracking, pulse repetition frequency hopping for Doppler centroid tracking, generating the frequency step chirp for radar parameter flexibility, block floating-point quantizing for data rate compression, and elevation beamwidth broadening for increasing the swath illumination.

Huneycutt, Bryan L.↗
NASA NTRS1989

Fortran Program for X-Ray Photoelectron Spectroscopy Data Reformatting

A FORTRAN program has been written for use on an IBM PC/XT or AT or compatible microcomputer (personal computer, PC) that converts a column of ASCII-format numbers into a binary-format file suitable for interactive analysis on a Digital Equipment Corporation (DEC) computer running the VGS-5000 Enhanced Data Processing (EDP) software package. The incompatible floating-point number representations of the two computers were compared, and a subroutine was created to correctly store floating-point numbers on the IBM PC, which can be directly read by the DEC computer. Any file transfer protocol having provision for binary data can be used to transmit the resulting file from the PC to the DEC machine. The data file header required by the EDP programs for an x ray photoelectron spectrum is also written to the file. The user is prompted for the relevant experimental parameters, which are then properly coded into the format used internally by all of the VGS-5000 series EDP packages.

Abel, Phillip B.↗
NASA NTRS1973

New hardware realizations of nonrecursive digital filters.

Analysis of the bit-level operations involved in the convolution realizing a nonrecursive digital filter leads to hardware designs of digital filters based on the operation of counting. Two distinct designs are outlined: the first one is capable of very high speed but is rather expensive; the second is quite slow but has the advantages of low cost and high flexibility. The basic designs considered utilize fixed-point representation for the data and filter coefficients. Variants allowing floating-point representation of the coefficients are also described.

Zohar, S.↗
NASA NTRS1995

Software For Tie-Point Registration Of SAR Data

SAR-REG software package registers synthetic-aperture-radar (SAR) image data to common reference frame based on manual tie-pointing. Image data can be in binary, integer, floating-point, or AIRSAR compressed format. For example, with map of soil characteristics, vegetation map, digital elevation map, or SPOT multispectral image, as long as user can generate binary image to be used by tie-pointing routine and data are available in one of the previously mentioned formats. Written in FORTRAN 77.

Rignot, Eric↗
NASA NTRS1986

Adaptive Quantizer for Burst Synthetic-Aperture Radar

Adaptive quantizer for burst-mode synthetic-aperture radar reduces data rate of return signal. Device, called block floating-point quantizer (BFPQ) basically analog-to-digital converter that covers wide dynamic range and discards appropriate lower order bits. BFPQ is, in effect, digital approximator with automatic gain control. Moves floatingpoint marker binary representation of signal data in accordance with perceived dynamic range. Available step sizes thus limited to multiples of underlying smallest quantization step (represented by lowest order bit). Retains only first K most significant bits of signal; (L,K) BFPQ is one that does K-bit quantization of signal originally quantized to L bits. Quantization error simply difference between actual signal level and its binary approximation. Other potential applications for BFPQ include speech compression and picture data compression.

Joo, T. H.↗
NASA NTRS1984

A real-time, portable, microcomputer-based jet engine simulator

Modern piloted flight simulators require detailed models of many aircraft components, such as the airframe, propulsion system, flight deck controls and instrumentation, as well as motion drive and visual display systems. The amount of computing power necessary to implement these systems can exceed that offered by dedicated mainframe computers. One approach to this problem is through the use of distributed computing, where parts of the simulation are assigned to computing subsystems, such as microcomputers. One such subsystem, such as microcomputers. One such subsystem, a real-time, portable, microcomputer-based jet engine simulator, is described in this paper. The simulator will be used at the NASA Ames Vertical Motion Simulator facility to perform calculations previously done on the facility's mainframe computer. The mainframe will continue to do all other system calculations and will interface to the engine simulator through analog I/0. The engine simulator hardware includes a 16-bit microcomputer and floating-point coprocessor. There is an 8 channel analog input board and an 8 channel analog output board. A model of a small turboshaft engine/control is coded in floating-point FORTRAN. The FORTRAN code and a data monitoring program run under the control of an assembly language real-time executive. The monitoring program allows the user to isplay and/or modify simulator variables on-line through a data terminal. A dual disk drive system is used for mass storage of programs and data. The CP/M-86 operating system provides file management and overall system control. The frame time for the simulator is 30 milliseconds, which includes all analog I/0 operations.

Blech, R. A.↗
NASA NTRS1982

Implementation of the DAST ARW II control laws using an 8086 microprocessor and an 8087 floating-point coprocessor

A 5 MHZ single-board microprocessor system which incorporates an 8086 CPU and an 8087 Numeric Data Processor is used to implement the control laws for the NASA Drones for Aerodynamic and Structural Testing, Aeroelastic Research Wing II. The control laws program was executed in 7.02 msec, with initialization consuming 2.65 msec and the control law loop 4.38 msec. The software emulator execution times for these two tasks were 36.67 and 61.18, respectively, for a total of 97.68 msec. The space, weight and cost reductions achieved in the present, aircraft control application of this combination of a 16-bit microprocessor with an 80-bit floating point coprocessor may be obtainable in other real time control applications.

Kelly, G. L.↗
NASA NTRS1994

Algorithm For Integer Cosine Transforms

Algorithm computes coefficients of integer cosine transforms, containing only integer coefficients approximately proportional to floating-point coefficients of discrete cosine transforms. Used in compression of image data in blocks of N x N pixels, discrete cosine transforms involve large amounts of computation, typically amounting to 80 percent of computational load in data-compression scheme. In constructing integer approximations, competing requirements are to obtain data-compression and data-decompression performances comparable to those of corresponding descrete cosine transforms while taking advantage of simplicity afforded by integer arithmetic to reduce complexity and amount of computation.

Pollara, Fabrizio↗
NASA NTRS1985

Predictability of the earth's polar motion

The results of a numerical experiment on the predictability of terrestrial polar motion using a Bureau International de l'Heure data set from 1967-83 are presented. A floating point predictor was defined by decomposing polar motion into secular motion and annual and Chandler wobbles. The secular term was linear and the others periodic, the former due to atmospheric mass transport and the latter to Eulerian nutation. A least squares estimator was employed with the data base to obtain constants for the model, which is given the name 'floating-point'. A fixed-period predictor was also devised and, in comparison with the floating point predictor in 6 yr estimates of the annual wobble period, failed after a given length of time. It is suggested that the failure is due to atmospheric motions.

Fong, B.↗
NASA NTRS1988

A parallel Householder tridiagonalization stratagem using scattered square decomposition

The parallel stratagem in this paper uses scattered square decomposition, introduced by Fox (1985), for its data assignment and then exploits parallelism in the solution steps of the sequential Householder tridiagonalization algorithm. One may condense a real symmetric full matrix A of order n into a tridiagonal form by the stratagem in concurrent machines where N(=D-squared) processors are used. Expressions for efficiency and speedup are given for the evaluation of the stratagem. An alternative stratagem which requires less data transmission but more computations is also discussed. The results shown that the Householder method of tridiagonalization may be implemented on a concurrent machine efficiently by scattered square decomposition provided that the number of matrix elements contained in each processor is much larger than the number of processors of the concurrent machine, and the ratio of the time to transmit one data item from one processor to any other processor to the time to perform a floating-point arithmetic operation is small enough.

Chang, H. Y.↗
NASA NTRS1977

An array processing system for lunar geochemical and geophysical data

A computerized array processing system has been developed to reduce, analyze, display, and correlate a large number of orbital and earth-based geochemical, geophysical, and geological measurements of the moon on a global scale. The system supports the activities of a consortium of about 30 lunar scientists involved in data synthesis studies. The system was modeled after standard digital image-processing techniques but differs in that processing is performed with floating point precision rather than integer precision. Because of flexibility in floating-point image processing, a series of techniques that are impossible or cumbersome in conventional integer processing were developed to perform optimum interpolation and smoothing of data. Recently color maps of about 25 lunar geophysical and geochemical variables have been generated.

Eliason, E. M.↗
NASA NTRS1988

Implementing direct, spatially isolated problems on transputer networks

Parametric studies were performed on transputer networks of up to 40 processors to determine how to implement and maximize the performance of the solution of problems where no processor-to-processor data transfer is required for the problem solution (spatially isolated). Two types of problems are investigated a computationally intensive problem where the solution required the transmission of 160 bytes of data through the parallel network, and a communication intensive example that required the transmission of 3 Mbytes of data through the network. This data consists of solutions being sent back to the host processor and not intermediate results for another processor to work on. Studies were performed on both integer and floating-point transputers. The latter features an on-chip floating-point math unit and offers approximately an order of magnitude performance increase over the integer transputer on real valued computations. The results indicate that a minimum amount of work is required on each node per communication to achieve high network speedups (efficiencies). The floating-point processor requires approximately an order of magnitude more work per communication than the integer processor because of the floating-point unit's increased computing capacity.

Ellis, Graham K.↗
NASA NTRS1991

Integer cosine transform for image compression

This article describes a recently introduced transform algorithm called the integer cosine transform (ICT), which is used in transform-based data compression schemes. The ICT algorithm requires only integer operations on small integers and at the same time gives a rate-distortion performance comparable to that offered by the floating-point discrete cosine transform (DCT). The article addresses the issue of implementation complexity, which is of prime concern for source coding applications of interest in deep-space communications. Complexity reduction in the transform stage of the compression scheme is particularly relevant, since this stage accounts for most (typically over 80 percent) of the computational load.

Cheung, K.-M.↗
NASA NTRS1988

Preliminary results from the NASA/JPL multifrequency, multipolarization synthetic aperture radar

A brief description is given of the three-frequency polarimetric synthetic-aperture radar built and tested at the Jet Propulsion Laboratory. The radar has the capability to simultaneously acquire fully polarimetric data at P-, L-, and C-bands from a DC-8 airborne platform. The radar has an instantaneous data rate of approximately 2.1 Gb/s and has selectable record rates between 80-240 Mb/s. The system has a wide dynamic range featuring 8-b analog-to-digital converters and full digital floating-point processing. The processing is accomplished offline on a minicomputer system assisted by an array processor. Sample images are presented.

Held, Daniel N.↗
NASA NTRS1987

Performance of FORTRAN floating-point operations on the Flex/32 multicomputer

A series of experiments has been run to examine the floating-point performance of FORTRAN programs on the Flex/32 (Trademark) computer. The experiments are described, and the timing results are presented. The time required to execute a floating-point operation is found to vary considerbaly depending on a number of factors. One factor of particular interest from an algorithm design standpoint is the difference in speed between common memory accesses and local memory accesses. Common memory accesses were found to be slower, and guidelines are given for determinig when it may be cost effective to copy data from common to local memory.

Crockett, Thomas W.↗
NASA NTRS1985

MIMD computing in the USA - 1984

It is often said that the 1980s are becoming the decade of multiinstruction stream or MIMD computers, while the 1970s could be described as the decade of the SIMD (single instruction stream multiple data stream) computers. The availability of microprocessors and VLSI facilities has led to the proposal and construction of novel computer architectures based on linking many hundreds or even thousands of microprocessors, or specially designed VLSI chips. Some of the larger manufacturers offer computers with a small number of CPUs. Because of the variety of the new developments, it was decided to conduct a survey of proposed and existing MIMD computers in the U.S., taking into account a simple classification of the different devices. Particular attention is given to computers which are designed for numerical work with floating-point numbers and the solution of large problems in physics, chemistry, and engineering.

Hockney, R. W.↗