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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

A Survey on the Design, Detection, and Prevention of Pre-Silicon Hardware Trojans

The complexity of the semiconductor design lifecycle and globalized manufacturing process creates concern over the threat of deliberate malicious alterations, or hardware Trojans, being inserted into microelectronic designs. This has resulted in a significant corpus of hardware Trojan research including Trojan design and benchmarking efforts and development of corresponding metrics and detection and prevention techniques, over the last two decades. In this survey, we first highlight efforts in Trojan design and benchmarking, followed by a cataloging of seminal and recent works in Trojan detection and prevention and their accompanied metrics. Given the volume of literature in this field, this survey considers only pre-silicon techniques. We make this distinction between pre- and post-silicon to properly scope and provide appropriate context into the capabilities of existing hardware Trojan literature. Each major section (design, prevention, and detection) is accompanied by insights, and common pitfalls, which we highlight can be addressed by future research.

42 ENGINEERING↗
DOE OSTI2024

PRISTINE: An Emulation Platform for PCB-Level Hardware Trojans

Printed circuit Boards (PCBs) are becoming increasingly vulnerable to malicious design alteration, also known as Trojan attacks, due to a distributed business model that often involves various untrusted parties. Such attacks can be mounted at various stages in the PCB life cycle. The relative ease of alteration of PCB hardware even after fabrication (due to physical access to surface-mounted critical components and traces) makes them attractive for an adversary to manipulate their functional/physical behavior for malicious intent. There is a growing need to explore viable Trojan attacks in a PCB, analyze their functional and physical characteristics (e.g., impact on power or delay), and study the effectiveness of countermeasures against these attacks. While simulation-based approaches for PCB Trojan insertion are effective at creating a large population of possible Trojans, they fail to provide functional feasibility analysis with a realistic workload for a trigger circuit. Also, they cannot estimate a Trojan’s side-channel footprint due to the unavailability of physical models of diverse PCB components. To address these deficiencies, in this paper, we present PRISTINE, a PCB-level emulation system for any integrity or physical tampering issues, specifically, hardware Trojan insertion. The need for building such an emulation platform to resolve PCB trust issues in the supply chain is also surveyed and discussed. Both custom Hardware Hacking (HaHa) boards and multiple commercial PCBs are then used to test the ability of the proposed system to emulate various hardware Trojans specially designed to exploit board-specific hardware characteristics. Experimental results on emulated board-level Trojans show that a wide range of Trojans can be successfully activated, thus enabling the expected payload effects on both types of boards to be studied and quantified. The resulting data are further analyzed to create PCB-level Trojan benchmarks. In particular, a comparative evaluation of the experimental results is used to propose a risk level metric that quantifies the probability of detection and degree of payload impact of each Trojan on a given commercial PCB.

47 OTHER INSTRUMENTATION↗
NASA NTRS1988

Memory protection

Accidental overwriting of files or of memory regions belonging to other programs, browsing of personal files by superusers, Trojan horses, and viruses are examples of breakdowns in workstations and personal computers that would be significantly reduced by memory protection. Memory protection is the capability of an operating system and supporting hardware to delimit segments of memory, to control whether segments can be read from or written into, and to confine accesses of a program to its segments alone. The absence of memory protection in many operating systems today is the result of a bias toward a narrow definition of performance as maximum instruction-execution rate. A broader definition, including the time to get the job done, makes clear that cost of recovery from memory interference errors reduces expected performance. The mechanisms of memory protection are well understood, powerful, efficient, and elegant. They add to performance in the broad sense without reducing instruction execution rate.

Denning, Peter J.↗
NASA NTRS2025

The Lucy Spacecraft

The Lucy spacecraft is developed from a combination of heritage components used on other NASA deep space missions, combined with a set of newly developed hardware specific to Lucy’s mission, most critically the solar arrays. These components are configured into a spacecraft capable of launching on the least expensive Atlas launch vehicle, deploying into a power-safe configuration, executing the high-precision Trojan asteroid encounters, and surviving the 12-year mission timeline.

planetary↗
NASA NTRS1988

Computer viruses

The worm, Trojan horse, bacterium, and virus are destructive programs that attack information stored in a computer's memory. Virus programs, which propagate by incorporating copies of themselves into other programs, are a growing menace in the late-1980s world of unprotected, networked workstations and personal computers. Limited immunity is offered by memory protection hardware, digitally authenticated object programs,and antibody programs that kill specific viruses. Additional immunity can be gained from the practice of digital hygiene, primarily the refusal to use software from untrusted sources. Full immunity requires attention in a social dimension, the accountability of programmers.

Denning, Peter J.↗
NASA NTRSDate not supplied

Use of Mechanical Heat Switch to Speed up TVAC Transitions on Flight Hardware Below 200K

Spaceflight hardware that operates at temperatures well below room temperature usually require being well isolated from their warmer environment in order to manage thermal parasitics adequately. This is especially true for spaceflight systems that rely on passive cooling such as a radiator. During ground testing, this design configuration can be problematic for TVAC cycling between operational temperature extremes, since the hardware temperatures may move extremely slowly and lengthen the duration of an already expensive and heavily staffed system-level TVAC campaign. One of the challenges of using an external means of speeding up temperature transitions is that a TVAC campaign usually also requires the simulation of flight-like environments to validate the design, and introducing a test feature to speed up transitions can disrupt the system such that flight-like environments are not achievable. Such an approach was used for the L’Ralph instrument level TVAC test. L’Ralph is a passively cooled instrument on the Lucy mission with planned flyby’s of the Trojan asteroids around 5.5 AU. The optics and visible detector are cooled below 190K, and the IR detector is cooled below 110K. During instrument TVAC qualification testing, a mechanical motor-controlled heat switch uses clamping pressure via a vise-grip mechanism to achieve faster temperature transitions by increasing the conduction to a cold sink. The heat switch system then disengages and employs zero-Q controls to achieve flight-like thermal environments for thermal balance plateaus. Results from stand-alone testing of the heat switch are discussed, including correlated on/off ratios and the expected conductance across its operational temperature range. Test data from an instrument level TVAC that successfully utilized the heat switch are also shown.

Daniel G Bae↗