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Results for “hardware reverse engineering”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2013

Non-Destructive State Machine Reverse Engineering

Most of the integrated circuits (ICs) that are in electronic systems today are based on state machines. We are taking advantage of this to develop a hardware reverse engineering method that discovers the IC’s underlying state machine, rather than its transistors and gates. While there are other methods for destructively reverse engineering ICs or for non-destructively characterizing ICs, our method offers a fast and accurate analysis while remaining non-destructive. To do this, we present an intelligent brute-force method of exploring the logic of the IC using only the input and outputs designed into the IC - the I/O pins. From this exploration, we can apply a folding algorithm to discover the designed state machine.

counterfeit↗
NASA NTRSDate not supplied

3D Scanning Laboratory

The 3D Scanning Lab uses a number of technologies to capture 3D surface data. Those technologies are structured light scanning, discrete point measurement photogrammetry and Light Detecting and Ranging(LIDAR). Structured light is a non-contact optical technique used to capture as built surface geometries quickly and accurately. LIDAR is a laser scanning technique used to capture 3D surfaces. And photogrammetry uses a certified DSLR camera to measure discrete registered and non-registered points in 3D space. MSFC’s 3D Scanning Team uses 3D scanning to provide hardware inspections, reverse engineered CAD models, manufacturing/process development and digital assemblies. The inspection process compares the captured data to CAD, providing a color plot detailing the deviations of the scan data to the CAD model. Dimensional measurements and GD&T can also be interrogated. Inspection can provide scan-to-scan data comparisons which is ideal for assessing tested hardware, e.g. comparing data captured before and after hardware testing. Reverse engineering is used to develop CAD models from scan data. This is useful for heritage hardware studies, developing building or structural models and inputs for simulation studies and design efforts. The lab uses the 3D surface scan data to drive manufacturing/machining processes, termed match machining. This technique has been used to modify nozzles, injectors, additive manufactured parts, composite barrel sections, etc. Parts of an assembly can be scanned and assembled in a virtual environment providing an accurate 3D representation of the assembled hardware in its as-scanned state. This can provide detailed information of internal components that would otherwise not be accessible.

Advanced Manufacturing↗
DOE OSTI2022

Hardware functional obfuscation with ferroelectric active interconnects

Existing circuit camouflaging techniques to prevent reverse engineering increase circuit-complexity with significant area, energy, and delay penalty. In this paper, we propose an efficient hardware encryption technique with minimal complexity and overheads based on ferroelectric field-effect transistor (FeFET) active interconnects. By utilizing the threshold voltage programmability of the FeFETs, run-time reconfigurable inverter-buffer logic, utilizing two FeFETs and an inverter, is enabled. Judicious placement of the proposed logic makes it act as a hardware encryption key and enable encoding and decoding of the functional output without affecting the critical path timing delay. Additionally, a peripheral programming scheme for reconfigurable logic by reusing the existing scan chain logic is proposed, obviating the need for specialized programming logic and circuitry for keybit distribution. Our analysis shows an average encryption probability of 97.43% with an increase of 2.24%/ 3.67% delay for the most critical path/ sum of 100 critical paths delay for ISCAS85 benchmarks.

42 ENGINEERING↗
DOE OSTI2022

RanCompute: Computational Security in Embedded Devices via Random Input and Output Encodings

An embedded device in an insecure environment is subject to additional security risk through capture and reverse-engineering by a capable adversary. If this device contains a microchip performing sensitive computations, capture of the chip may leak functionality to an adversary. In this paper we propose a novel method in which we randomly encode the input operands and the outputs of a computation, thus not revealing the arithmetic operations being performed. The operations are sequenced in a graph representing the overall application. Once the initialization values are overwritten and lost, the results of these computations are indecipherable by the device performing the calculations as well as by any adversary. The result is transmitted back to a secure server which has stored the initialization values and so can decode the results which appear random to the adversary.

Embedded computing↗
NASA NTRS2009

"Glitch Logic" and Applications to Computing and Information Security

This paper introduces a new method of information processing in digital systems, and discusses its potential benefits to computing and information security. The new method exploits glitches caused by delays in logic circuits for carrying and processing information. Glitch processing is hidden to conventional logic analyses and undetectable by traditional reverse engineering techniques. It enables the creation of new logic design methods that allow for an additional controllable "glitch logic" processing layer embedded into a conventional synchronous digital circuits as a hidden/covert information flow channel. The combination of synchronous logic with specific glitch logic design acting as an additional computing channel reduces the number of equivalent logic designs resulting from synthesis, thus implicitly reducing the possibility of modification and/or tampering with the design. The hidden information channel produced by the glitch logic can be used: 1) for covert computing/communication, 2) to prevent reverse engineering, tampering, and alteration of design, and 3) to act as a channel for information infiltration/exfiltration and propagation of viruses/spyware/Trojan horses.

hardware vulnerabilities↗
NASA NTRS1991

Investigation and modification of a commercially available tactile sensor suited for robotic applications

Active (dynamic) tactile sensing was explored using a commercially available tactile array sensor. This task requires the redesign of the sensor interface and a full understanding of the old sensor hardware implementation. There were different stages to this research; the first stage involved the reverse engineering of the old tactile sensor. The second stage had to do with the exploration of the characteristics and behavior of the tactile sensor pad. The next stage dealt with the redesign of the sensor interface using the knowledge gained from the previous two stages. Finally, in the last stage, software to control the tactile sensor was developed to aid in the data acquisition process.

Creus, Carolina↗
NASA NTRS2009

Distributed Control Architecture for Gas Turbine Engine

The transformation of engine control systems from centralized to distributed architecture is both necessary and enabling for future aeropropulsion applications. The continued growth of adaptive control applications and the trend to smaller, light weight cores is a counter influence on the weight and volume of control system hardware. A distributed engine control system using high temperature electronics and open systems communications will reverse the growing trend of control system weight ratio to total engine weight and also be a major factor in decreasing overall cost of ownership for aeropropulsion systems. The implementation of distributed engine control is not without significant challenges. There are the needs for high temperature electronics, development of simple, robust communications, and power supply for the on-board electronics.

Dennis Culley↗
NASA NTRS2013

Reverse Engineering Crosswind Limits - A New Flight Test Technique?

During modification of a Gulfstream III test bed aircraft for an experimental flap project, all roll spoiler hardware had to be removed to accommodate the test article. In addition to evaluating the effects on performance and flying qualities resulting from the modification, the test team had to determine crosswind limits for an airplane previously certified with roll spoilers. Predictions for the modified aircraft indicated the maximum amount of steady state sideslip available during the approach and landing phase would be limited by aileron authority rather than by rudder. Operating out of a location that tends to be very windy, an arbitrary and conservative wind limit would have either been overly restrictive or potentially unsafe if chosen poorly. When determining a crosswind limit, how much reserve roll authority was necessary? Would the aircraft, as configured, have suitable handling qualities for long-term use as a flying test bed? To answer these questions, the test team combined two typical flight test techniques into a new maneuver called the sideslip-to-bank maneuver, and was able to gather flying qualities data, evaluate aircraft response and measure trends for various crosswind scenarios. This paper will describe the research conducted, the maneuver, flight conditions, predictions, and results from this in-flight evaluation of crosswind capability.

sideslip↗
NASA NTRS2011

Planetary Suit Hip Bearing Model for Predicting Design vs. Performance

Designing a planetary suit is very complex and often requires difficult trade-offs between performance, cost, mass, and system complexity. In order to verifying that new suit designs meet requirements, full prototypes must eventually be built and tested with human subjects. Using computer models early in the design phase of new hardware development can be advantageous, allowing virtual prototyping to take place. Having easily modifiable models of the suit hard sections may reduce the time it takes to make changes to the hardware designs and then to understand their impact on suit and human performance. A virtual design environment gives designers the ability to think outside the box and exhaust design possibilities before building and testing physical prototypes with human subjects. Reductions in prototyping and testing may eventually reduce development costs. This study is an attempt to develop computer models of the hard components of the suit with known physical characteristics, supplemented with human subject performance data. Objectives: The primary objective was to develop an articulating solid model of the Mark III hip bearings to be used for evaluating suit design performance of the hip joint. Methods: Solid models of a planetary prototype (Mark III) suit s hip bearings and brief section were reverse-engineered from the prototype. The performance of the models was then compared by evaluating the mobility performance differences between the nominal hardware configuration and hardware modifications. This was accomplished by gathering data from specific suited tasks. Subjects performed maximum flexion and abduction tasks while in a nominal suit bearing configuration and in three off-nominal configurations. Performance data for the hip were recorded using state-of-the-art motion capture technology. Results: The results demonstrate that solid models of planetary suit hard segments for use as a performance design tool is feasible. From a general trend perspective, the suited performance trends were comparable between the model and the suited subjects. With the three off-nominal bearing configurations compared to the nominal bearing configurations, human subjects showed decreases in hip flexion of 64%, 6%, and 13% and in hip abduction of 59%, 2%, and 20%. Likewise the solid model showed decreases in hip flexion of 58%, 1%, and 25% and in hip abduction of 56%, 0%, and 30%, under the same condition changes from the nominal configuration. Differences seen between the model predictions and the human subject performance data could be attributed to the model lacking dynamic elements and performing kinematic analysis only, the level of fit of the subjects with the suit, the levels of the subject s suit experience.

Cowley, Matthew S.↗
DOE OSTI2026

Assessing Energy Infrastructure Devices for Vulnerabilities

Industrial control systems prove to be vital to the health and security of the nation in our critical infrastructure. Critical infrastructure includes the most foundational systems to support modern civilization which includes water and wastewater systems, communications, and the electricity we use to name a few sectors. However, these devices' overall composition remains largely unknown and are untested from a cyber security perspective. As part of the Cyber Testing for Resilient Industrial Control Systems (CyTRICS) program, I analyzed one such energy infrastructure device to better understand how it functions, what hardware and software components are present within it, and assess it for security vulnerabilities. To achieve this, I reverse engineered binary files using Ghidra to understand system functionality and learned more about how to collaborate with other researchers on a shared Ghidra project. I learned more about how web sockets function and how to interact with them through Python to test if they are secure or not. This work led me to assess possible vulnerabilities in this device and provide a better understanding of its composition and function, which are essential to INL's mission of securing our nation's energy infrastructure.

99 - GENERAL AND MISCELLANEOUS↗
DOE OSTI2022

Memory forensic analysis of a programmable logic controller in industrial control systems

In industrial control systems (ICS), programmable logic controllers (PLCs) are used to automate physical processes such as nuclear plants and power grid stations, and are often subject to cyber attacks. As in conventional IT domain, the memory analysis of the PLCs can help answer important forensic questions about the attack, such as the presence of malicious firmware, injection of modified control logic (the program running on the PLC), and manipulation of I/O devices (e.g., sensors and actuators). Unlike conventional IT domain, PLCs have heterogeneous hardware architecture, proprietary firmware and control software, making it challenging to employ a unified framework for their memory forensics. For merely extracting artifacts of forensic importance, reverse-engineering the firmware is a tedious task, and the effort needs to be repeated for every PLC model. As a community, a step-wise approach to tackle this challenge is to analyze the memory of specific PLCs, and subsequently find a generic framework applicable to all PLCs. Our work is a step forward in this direction. By following a methodology that focuses on the functional layer of PLCs instead of reverse engineering the firmware, we analyze the digital forensic artifacts available in a common PLC, Allen-Bradley ControlLogix 1756-L61. Before diving into the memory dump, we analyze the PLC control software to create a list of important artifacts that are sure to exist in the PLC memory dump. The approach employs a setup where PLC control software RSLogix-5000 is connected to the PLC, and the memory dump can be obtained as and when needed. We create test cases that sequentially highlight each category of artifacts, followed by an examination of the resultant impact on memory. After attaining the listed artifacts, we employ conventional string and known data searches to extract interesting information present in this PLC's memory. The memory analysis profile, presented as a Python library and shared with the community, can help a forensic investigator to readily extract forensic artifacts from the same model's controller. The adopted approach may help researchers in creating memory profile of other PLCs, and ultimately formulating a generic PLC memory analysis framework.

Rais, Muhammad Haris↗
DOE OSTI2024

Ultrasound Interim cyber-physical research evaluation

Recent events have presented Medical Practitioners with concerns about safety and privacy implications associated with GE’s VScan MIot Ultrasound Device. Concerns relate to the devices potential risk to broadcast location data that can pose serious risks to device users and patients. This report was commission in collaboration with Augusta University to determine if device concerns pose real threat to operators and patients. In effort to ensure all potential threat vectors are targeted, the initial step was to analyze the supply chain. Here the devices are CT scanned to look for any hardware anomalies that could present threat vectors to users of these devices. (See SRNL-STI-2024-00225 for detailed analysis). No anomalies were found associated with the hardware utilized within the GE VScan Air.

42 ENGINEERING↗
NASA NTRSDate not supplied

XV-15 Tilt Rotor Research Aircraft Photogrammetry and Metrology Measurement

A new measurement capability was created by combining photogrammetry and metrology techniques to accurately measure one half of the XV-15 Tilt Rotor Research Aircraft at the Smithsonian’s Udvar-Hazy museum. The challenges imposed by the fuselage and surrounding environment at Udvar-Hazy were overcome by careful application of photogrammetry and metrology techniques. Data analyses and processing included the use of multiple reverse engineering programs to accurately generate a complete 3-dimensional water-tight geometry of the aircraft and rotor blade. This paper describes the photogrammetry and metrology measurement systems, technology and hardware set-up, data analysis and processing methods, future work, and lessons learned. In addition, selected measurement results of the fuselage and rotor blade are presented.

XV-15↗
NASA NTRS1975

DC-9 Flight Demonstration Program with Refanned JT8D Engines: Performance and Analysis - Volume 3

The JT8D-109 engine has a sea level static, standard day bare engine takeoff thrust of 73,840 N. At sea level standard day conditions the additional thrust of the JT8D-109 results in 2,040 kg additional takeoff gross weight capability for a given field length. Range loss of the DC-9 Refan airplane for long range cruise was determined. The Refan airplane demonstrated stall, static longitudinal stability, longitudinal control, longitudinal trim, minimum control speeds, and directional control characteristics similar to the DC-9-30 production airplane and complied with airworthiness requirements. Cruise, climb, and thrust reverser performance were evaluated. Structural and dynamic ground test, flight test and analytical results substantiate Refan Program requirements that the nacelle, thrust reverser hardware, and the airplane structural modifications are flightworthy and certifiable and that the airplane meets flutter speed margins. Estimated unit cost of a DC-9 Refan retrofit program is 1.338 million in mid-1975 dollars with about an equal split in cost between airframe and engine.

Source record↗
NASA NTRS1982

Stable polyurethane coatings for electronic circuits. NASA tech briefs, fall 1982, volume 7, no. 1

One of the most severe deficiencies of polyurethanes as engineering materials for electrical applications has been their sensitivity to combined humidity and temperature environments. Gross failure by reversion of urethane connector potting materials has occurred under these conditions. This has resulted in both scrapping of expensive hardware and reduction in reliability in other instances. A basic objective of this study has been to gain a more complete understanding of the mechanisms and interactions of moisture in urethane systems to guide the development of reversion resistant materials for connector potting and conformal coating applications in high humidity environments. Basic polymer studies of molecular weight and distribution, polymer structure, and functionality were carried out to define those areas responsible for hydrolytic instability and to define polymer structural feature conducive to optimum hydrolytic stability.

Source record↗