Results for “hardware tampering”

NASA NTRS2014

Development and Testing of an ISRU Soil Mechanics Vacuum Test Facility

For extraterrestrial missions, earth based testing in relevant environments is key to successful hardware development. This is true for both early component level development and system level integration. For In-Situ Resource Utilization (ISRU) on the moon, hardware must interface with the surface material, or regolith, in a vacuum environment. A relevant test environment will therefore involve a vacuum chamber with a controlled, properly conditioned bed of lunar regolith simulant. However, in earth-based granular media, such as lunar regolith simulant, gases trapped within the material pore structures and water adsorbed to all particle surfaces will release when exposed to vacuum. Early vacuum testing has shown that this gas release can occur violently, which loosens and weakens the simulant, altering the consolidation state. A mid-size chamber (3.66 m tall, 1.5 m inner diameter) at the NASA Glenn Research Center has been modified to create a soil mechanics test facility. A 0.64 m deep by 0.914 m square metric ton bed of lunar simulant was placed under vacuum using a variety of pumping techniques. Both GRC-3 and LHT-3M simulant types were used. Data obtained from an electric cone penetrometer can be used to determine strength properties at vacuum including: cohesion, friction angle, bulk density and shear modulus. Simulant disruptions, caused by off-gassing, affected the strength properties, but could be mitigated by reducing pump rate. No disruptions were observed at pressures below 2.5 Torr, regardless of the pump rate. The slow off-gassing of the soil at low pressure lead to long test times; a full week to reach 10(exp -5) Torr. Robotic soil manipulation would enable multiple ISRU hardware test within the same vacuum cycle. The feasibility of a robotically controlled auger and tamper was explored at vacuum conditions.

lunar regolith↗

NASA NTRS2009

"Glitch Logic" and Applications to Computing and Information Security

This paper introduces a new method of information processing in digital systems, and discusses its potential benefits to computing and information security. The new method exploits glitches caused by delays in logic circuits for carrying and processing information. Glitch processing is hidden to conventional logic analyses and undetectable by traditional reverse engineering techniques. It enables the creation of new logic design methods that allow for an additional controllable "glitch logic" processing layer embedded into a conventional synchronous digital circuits as a hidden/covert information flow channel. The combination of synchronous logic with specific glitch logic design acting as an additional computing channel reduces the number of equivalent logic designs resulting from synthesis, thus implicitly reducing the possibility of modification and/or tampering with the design. The hidden information channel produced by the glitch logic can be used: 1) for covert computing/communication, 2) to prevent reverse engineering, tampering, and alteration of design, and 3) to act as a channel for information infiltration/exfiltration and propagation of viruses/spyware/Trojan horses.

hardware vulnerabilities↗