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At least 19 records

Entangling quantum logic gates in neutral atoms via the microwave-driven spin-flip blockade

The Rydberg dipole blockade has emerged as the standard mechanism to induce entanglement between neutral-atom qubits. In these protocols, laser fields that couple qubit states to Rydberg states are modulated to implement entangling gates. Here, in this study, we present an alternative protocol to implement entangling gates via Rydberg dressing and a microwave-field-driven spin-flip blockade. We consider the specific example of qubits encoded in the clock states of cesium. An auxiliary hyperfine state is optically dressed so that it acquires partial Rydberg character. It thus acts as a proxy Rydberg state, with a nonlinear light shift that plays the role of blockade strength. A microwave-frequency field coupling a qubit state to this dressed auxiliary state can be modulated to implement entangling gates. Logic gate protocols designed for the optical regime can be imported to this microwave regime, for which experimental control methods are more robust. We show that unlike the strong dipole-blockade regime usually employed in Rydberg experiments, going to a moderate-spin-flip-blockade regime results in faster gates and smaller Rydberg decay. We study various regimes of operations that can yield high-fidelity two-qubit entangling gates and characterize their analytical behavior. In addition to the inherent robustness of microwave control, we can design these gates to be more robust to laser amplitude and frequency noises at the cost of a small increase in Rydberg decay.

74 ATOMIC AND MOLECULAR PHYSICS↗

Systems for mechanical logic based on additively manufacturable micro-mechanical logic gates

The present disclosure is directed to various mechanical logic gates. In one example a mechanical logic NOT gate system is formed which has a first pair of bi-stable buckling structures each being operatively connected at a first connection point thereof to one another, and also to a first rigid structure at second connection points, the first rigid structure being held stationary. A second pair of bi-stable buckling flexures is each operatively connected at first connection points thereof to each other and at second connection points thereof to a second rigid structure being held stationary. An output element is coupled a first one of each of the first and second pairs of bi-stable buckling structures. An input element is coupled to a second one of each of the first and second pairs of bi-stable buckling structures. The output element moves from a logic 1 position to a logic 0 position in response to movement of the input element from a logic 0 position to a logic 1 positions, respectively.

42 ENGINEERING↗

Rapid Inference of Logic Gate Neural Networks for Anomaly Detection in High Energy Physics

The increasing data rates and complexity of detectors at the Large Hadron Collider (LHC) necessitate fast and efficient machine learning models, particularly for rapid selection of what data to store, known as triggering. Building on recent work in differentiable logic gates, we present a public implementation of a Convolutional Differentiable Logic Gate Neural Network (CLGN). We apply this to detecting anomalies at the Level-1 Trigger at CMS using public data from the CICADA project. We demonstrate that the CLGN achieves physics performance on par with or superior to conventional quantized neural networks. We also synthesize an LGN for a Field-Programmable Gate Array (FPGA) and show highly promising FPGA characteristics, notably zero Digital Signal Processor (DSP) resource usage. This work highlights the potential of logic gate networks for high-speed, on-detector inference in High Energy Physics and beyond.

FOS: Physical sciences↗

Magnetoelectric XNOR logic gate device

A magneto-electric (ME) XNOR logic gate device includes a conducting device; and a ME-FET coupled to the conducting device. The ME-FET can be formed of a split gate; a first gate terminal coupled to a first portion of the split gate for receiving a first input signal; a second gate terminal coupled to a second portion of the split gate for receiving a second input signal; a source terminal coupled to a ground line; and a drain terminal coupled to the conducting device.

Gaul, Nishtha Sharma↗

Logical gates embedding in artificial spin ice

The realization and study of arrays of interacting magnetic nanoislands, such as artificial spin ices, have reached mature levels of control that allow design and demonstration of exotic, collective behaviors not seen in natural materials. Advances in the direct manipulation of their local, binary moments also suggest a use as nanopatterned, interacting memory media, for computation within a magnetic memory. Recent experimental work has demonstrated the possibility of building logic gates from clusters of interacting magnetic domains, and yet the possibility of large scale integration of such gates can prove problematic even at the theoretical level. Here we introduce theoretically complete sets of logical gates, in principle realizable in an experiment, and we study the feasibility of their integration into tree-like circuits. By evaluating the fidelity control parameter between their collective behavior and their expected logic functionality we determine conditions for integration. Also, we test our numerical results against the presence of disorder in the couplings, showing that the design gate structure is robust to small coupling perturbations, and thus possibly to small imperfections in the fabrication of the islands.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Cross-Cap Defects and Fault-Tolerant Logical Gates in the Surface Code and the Honeycomb Floquet Code

We consider the Z 2 toric code, surface code, and Floquet code defined on a nonorientable surface, which can be considered as families of codes extending Shor’s nine-qubit code. We investigate the fault-tolerant logical gates of the Z 2 toric code in this setup, which corresponds to e ↔ m exchanging symmetry of the underlying Z 2 gauge theory. We find that nonorientable geometry provides a new way for the emergent symmetry to act on the code space, and discover the new realization of the fault-tolerant Hadamard gate of the two-dimensional surface code with a single cross cap connecting the vertices nonlocally along a slit, dubbed a nonorientable surface code. This Hadamard gate can be realized by a constant-depth local unitary circuit modulo nonlocality caused by a cross cap. Via folding, the nonorientable surface code can be turned into a bilayer local quantum code, where the folded cross cap is equivalent to a bilayer twist terminated on a gapped boundary and the logical Hadamard only contains local gates with intralayer couplings when being away from the cross cap, as opposed to the interlayer couplings on each site needed in the case of the folded surface code. We further obtain the complete logical Clifford gate set for a stack of nonorientable surface codes and similarly for codes defined on Klein-bottle geometries. We then construct the honeycomb Floquet code in the presence of a single cross cap, and find that the period of the sequential Pauli measurements acts as a H Z logical gate on the single logical qubit, where the cross cap enriches the dynamics compared with the orientable case. We find that the dynamics of the honeycomb Floquet code is precisely described by a condensation operator of the Z 2 gauge theory, and illustrate the exotic dynamics of our code in terms of a condensation operator supported at a nonorientable surface. Published by the American Physical Society 2024

Physics↗

Tunable quantum logic gate on photonic qubits with a ladder emitter

We describe how a ladder emitter can implement a tunable quantum logic gate on photonic qubits encoded in the frequency basis. The ground-to-first excited state of the ladder emitter interacts with the control photon, and the first-to-second excited state transition interacts with the target photon. By controlling the relative detuning between the target photon and the first-to-second excited state transition of the ladder emitter, we enable any controlled-phase operation from 0 to π. We derive analytical formulas for the performance of the gate through the S-matrix formalism as well as describe the mechanism intuitively. This gate is deterministic, does not utilize any active control, and needs only a single ladder emitter, enabling low-footprint and more efficient decomposition of quantum circuits, especially the quantum Fourier transform. We suggest multiple potential systems for physical realization of our proposal, such as lanthanide ions embedded in Purcell-enhanced cavities. We expect these results to motivate further interest in photonic quantum information processing with designer emitters.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Braiding Majorana fermions and creating quantum logic gates with vortices on a periodic pinning structure

We show how vortices that support Majorana fermions when placed on a periodic pinning array can be used for vortex exchange and independent braiding by performing a series of specific moves with a probe tip. Using these braiding operations, we demonstrate realizations of a Hadamard and a CNOT gate. We specifically consider the first matching field at which there is one vortex per pinning site, and we show that there are two basic dynamic operations, move and exchange, from which basic braiding operations can be constructed in order to create specific logic gates. The periodic pinning array permits both control of the world lines of the vortices and freedom for vortex manipulation using a set of specific moves of the probe during which the probe tip strength and height remain unchanged. We measure the robustness of the different moves against thermal effects and show that the three different operations produce distinct force signatures on the moving tip.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Direct pulse-level compilation of arbitrary quantum logic gates on superconducting qutrits

Advanced simulations and calculations on quantum computers require high-fidelity implementations of quantum operations. The universal gateset approach builds complex unitaries from a small set of primitive gates, often resulting in a long gate sequence, which is typically a leading factor in the total accumulated error. Compiling a complex unitary for processors with higher-dimensional logical elements, such as qutrits, exacerbates the accumulated error per unitary, since an even longer gate sequence is required. Optimal control methods promise time- and resource-efficient compact gate sequences and, therefore, higher fidelity. These methods generate pulses that can directly implement any complex unitary on a quantum device. In this work, we demonstrate that any arbitrary qubit and qutrit gate can be realized with high fidelity, which can significantly reduce the length of a gate sequence. We generate and test pulses for a large set of randomly selected arbitrary unitaries on several quantum processing units (QPUs): the Lawrence Livermore National Laboratory Quantum Device and Integration Testbed’s (QuDIT’s) standard QPU and three of Rigetti’s QPUs: Ankaa-2, Ankaa-9Q-1, and Aspen-M-3. On the QuDIT platform’s standard QPU, the average fidelity of random qutrit gates is 97.9 ± 0.5% measured with conventional QPT and 98.8 ± 0.6% from QPT with gate folding. Rigetti’s Ankaa-2 achieves random qubit gates with an average fidelity of 98.4 ± 0.5% (conventional QPT) and 99.7 ± 0.1% (QPT with gate folding). On Ankaa-9Q-1 and Aspen-M-3, the average fidelities with conventional qubit QPT measurements were higher than 99% (see Appendix). Here we show that optimal control gates are robust to drift for at least 3 h and that the same calibration parameters can be used for all implemented gates. Our work promises that the calibration overheads for optimal control gates can be made small enough to enable efficient quantum circuits based on this technique.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Quantum logic gate synthesis as a Markov decision process

Reinforcement learning has witnessed recent applications to a variety of tasks in quantum programming. The underlying assumption is that those tasks could be modeled as Markov decision processes (MDPs). Here, we investigate the feasibility of this assumption by exploring its consequences for single-qubit quantum state preparation and gate compilation. By forming discrete MDPs, we solve for the optimal policy exactly through policy iteration. We find optimal paths that correspond to the shortest possible sequence of gates to prepare a state or compile a gate, up to some target accuracy. Our method works in both the absence and presence of noise and compares favorably to other quantum compilation methods, such as the Ross–Selinger algorithm. This work provides theoretical insight into why reinforcement learning may be successfully used to find optimally short gate sequences in quantum programming.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

System and method for micromechanical logical and gate

The present disclosure relates to a mechanical AND-gate logic system that may make use of a first and second lever arms, a first pivot linkage coupling the lever arms, an output member, and a second pivot linkage coupling the second lever arm to the output member. The first lever arm has first and second spaced apart ends for independently receiving separate logic level 1 or logic level 0 input signals thereon, and an output end spaced apart from the first and second input ends. The output end is disposed generally equidistant from the first and second spaced apart ends. The second lever arm has an input end and an output end and can move in both pivoting and translating movements. The first pivot linkage couples the output end of the first lever arm to the input end of the second lever arm such that both the input end and the output end of the second lever arm are able to either pivot and or to translate. The second lever arm is only able to translate and apply a logic 1 level input signal to the output member, to thus generate a logic 1 level output signal, when a logic level 1 input signal is applied simultaneously to both of the first and second input ends of the first lever arm.

Panas, Robert Matthew↗

Randomization of dangling nodes in a digital circuit design to mitigate hardware trojans

Described herein are various technologies pertaining to randomizing logic associated with dangling nodes in a digital circuit design. A dangling node is an input to or output from a logic gate in the digital circuit design that is identified as not impacting a desired output of the digital circuit design. Randomizing the logic associated with a dangling node can include deleting a logic gate, adding a logic gate, replacing a logic gate with another logic gate, etc. Randomizing the logic associated with the dangling node prevents hardware trojans that may have been inserted into the circuit design from being implemented in a circuit that is generated based upon the design.

97 MATHEMATICS AND COMPUTING↗