Search NASA⌕ Search

SEARCH · Search NASA

Results for “low voltage”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 19 records
All sourcesNASA NTRSDOE OSTI
NASA NTRS2013

Low Voltage Low Light Imager and Photodetector

Highly efficient, low energy, low light level imagers and photodetectors are provided. In particular, a novel class of Della-Doped Electron Bombarded Array (DDEBA) photodetectors that will reduce the size, mass, power, complexity, and cost of conventional imaging systems while improving performance by using a thinned imager that is capable of detecting low-energy electrons, has high gain, and is of low noise.

Nikzad, Shouleh↗
NASA NTRS1975

Study to define low voltage and low temperature operating limits of the Pioneer 10/11 Meteoroid Detection Equipment (MDE) system

The Pioneer 10/11 meteoroid detection equipment (MDE) pressure cells were tested at liquid nitrogen (LN2) and liquid helium (LHe) temperatures with the excitation voltage controlled as a parameter. The cells failed by firing because of pressurizing gas condensation as the temperature was lowered from LN2 to LHe temperature and when raised from LHe temperature. A study was conducted to determine cell pressure as a function of temperature, and cell failure was estimated as a function of temperature and excitation voltage. The electronic system was also studied, and a profile of primary spacecraft voltage (nominally 28 Vdc) and temperature corresponding to electronic system failure was determined experimentally.

Parker, C. D.↗
DOE OSTI2022

Power supply circuit with multiple stages for converting high voltage to low voltage and power train having the same

A power supply circuit for converting a first voltage to a second voltage where the first voltage is greater than the second voltage, and a power train having the same, are provided. The power supply circuit may have multiple stages and each stage of the power supply circuit may include a first circuit block configured to provide a start-up power to a second circuit block; a second circuit block configured to generate a Pulse-Width-Modulation (PWM) signal that controls a pulse duration of a transistor; a third circuit block configured to activate or deactivate the transistor based on the PWM signal; a fourth circuit block configured to reset a magnetic flux in a transformer to a zero state when the transistor is deactivated; and a fifth circuit block configured to maintain an output of a stage below a predetermined value by adjusting a voltage across the transformer.

Singh, Brij N.↗
NASA NTRS2014

The Significance of Breakdown Voltages for Quality Assurance of Low-Voltage BME Ceramic Capacitors

Application of thin dielectric, base metal electrode (BME) ceramic capacitors for high-reliability applications requires development of testing procedures that can assure high quality and reliability of the parts. In this work, distributions of breakdown voltages (VBR) in variety of low-voltage BME multilayer ceramic capacitors (MLCCs) have been measured and analyzed. It has been shown that analysis of the distributions can indicate the proportion of defective parts in the lot and significance of the defects. Variations of the distributions after solder dip testing allow for an assessment of the robustness of capacitors to soldering-related stresses. The drawbacks of the existing screening and qualification methods to reveal defects in high-value, low-voltage MLCCs and the importance of VBR measurements are discussed. Analysis has shown that due to a larger concentration of oxygen vacancies, defect-related degradation of the insulation resistance (IR) and failures are more likely in BME compared to the precious metal electrode (PME) capacitors.

reliability↗
DOE OSTI2023

Automatic voltage regulation application for PV inverters in low-voltage distribution grids – A digital twin approach

This paper proposes a hierarchical coordinated control strategy for PV inverters to keep voltages in low-voltage (LV) distribution grids within specified limits. The top layer of the proposed architecture consists of the designed automatic voltage regulation (AVR) application, which has access to voltage measurements and grid parameters from the LV distribution grid, both current and historical. The AVR application solves a constrained optimization problem, which provides a set of local control set-points that bring the voltage across the grid within bounds. The middle layer consists of a local Volt/VAR controller, which is adjusted by the AVR app, while the bottom layer is the inner-loop controller of the PV inverter. The proposed method not only improves the voltage quality in the grid but also manages the reactive power outputs of PV inverters efficiently. Further, a digital twin of the cyber-physical system has also been employed that interacts with the control system to ensure its appropriate operation. The effectiveness of the proposed methodology is demonstrated on a representative low-voltage feeder located in Denmark.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2023

Voltage Support With PV Inverters in Low-Voltage Distribution Networks: An Overview

Large solar photovoltaic (PV) penetration using inverters in low voltage (LV) distribution networks may pose several challenges, such as reverse power flow and voltage rise situations. These challenges will eventually force grid operators to carry out grid reinforcement to ensure continued safe and reliable operations. However, smart inverters with reactive power control capability enable PV systems to support voltage quality in the distribution network better. Here, this paper gives an overview of the current state-of-the-art control strategies for handling voltage problems through PV inverters and other devices. In addition, the (control) technical issues of PV systems integrated into the LV distribution network are considered from a control point of view. By comparing the control issues of PV integration into the grid, the paper aims to help distribution system operators to expand the volume of PV generation in the distribution system in an efficient and safe manner. Additionally, it will help control engineers and researchers select proper control strategies for PV systems as well as other distributed renewable sources.

42 ENGINEERING↗
NASA NTRS2006

Low voltage to high voltage level shifter and related methods

A shifter circuit comprises a high and low voltage buffer stages and an output buffer stage. The high voltage buffer stage comprises multiple transistors arranged in a transistor stack having a plurality of intermediate nodes connecting individual transistors along the stack. The transistor stack is connected between a voltage level being shifted to and an input voltage. An inverter of this stage comprises multiple inputs and an output. Inverter inputs are connected to a respective intermediate node of the transistor stack. The low voltage buffer stage has an input connected to the input voltage and an output, and is operably connected to the high voltage buffer stage. The low voltage buffer stage is connected between a voltage level being shifted away from and a lower voltage. The output buffer stage is driven by the outputs of the high voltage buffer stage inverter and the low voltage buffer stage.

Mentze, Erik J.↗
DOE OSTI2022

Masked fault detection for reliable low voltage cache operation

Systems, apparatuses, and methods for implementing masked fault detection for reliable low voltage cache operation are disclosed. A processor includes a cache that can operate at a relatively low voltage level to conserve power. However, at low voltage levels, the cache is more likely to suffer from bit errors. To mitigate the bit errors occurring in cache lines at low voltage levels, the cache employs a strategy to uncover masked faults during runtime accesses to data by actual software applications. For example, on the first read of a given cache line, the data of the given cache line is inverted and written back to the same data array entry. Also, the error correction bits are regenerated for the inverted data. On a second read of the given cache line, if the fault population of the given cache line changes, then the given cache line's error protection level is updated.

Ganapathy, Shrikanth↗
DOE OSTI2025

Sensitivity-based voltage constraints for optimal power flow in low-voltage distribution feeders

The optimal power flow (OPF) problem for distribution systems can include network details down to the low-voltage (LV) points of interconnection of individual customers. This paper addresses the implementation of voltage magnitude constraints, and sets forth a practicable approach for capturing the effects on voltage from the switching behavior of loads (e.g., heat pumps, air conditioners, water heaters, or pool pumps) and from the variability of renewable generation (e.g., rooftop solar). The proposed method adjusts the OPF voltage constraints based on forecasts of load and generation upper and lower bounds, in conjunction with sensitivity factors derived from the power flow equations. An illustrative OPF formulation is also provided, which incorporates transformer models that include core loss. We demonstrate that accurate modeling of these LV network components is critical to avoid voltage violations at customer points of interconnection. Furthermore, the ideas are validated through numerical case studies on a realistic distribution feeder.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2021

Report on High Energy Arcing Fault Experiments: Experimental Results from Low-Voltage Switchgear Enclosures

This report documents an experimental program designed to investigate High Energy Arcing Fault (HEAF) phenomena for low-voltage metal enclosed switchgear containing aluminum conductors. This report covers full-scale laboratory experiments using representative nuclear power plant (NPP) three-phase electrical equipment. Electrical, thermal, and pressure data were recorded for each experiment and documented in this report. This report covers experiments performed on two low-voltage switchgear units with each unit consisting of two vertical sections. The data collected supports characterization of the low-voltage HEAF hazard and these results will be used to support potential improvements in fire probabilistic risk assessment (PRA) methods. The experiments were performed at KEMA Labs located in Chalfont, Pennsylvania. The experimental design, setup, and execution were completed by staff from the NRC, the National Institute of Standards and Technology (NIST), Sandia National Laboratories (SNL) and KEMA. In addition, representatives from the Electric Power Research Institute (EPRI) observed some of the experimental setup and execution. The HEAF experiments were performed between August 26 and Augsut 29, 2019 on nearidentical Westinghouse Type DS low-voltage metal-enclosed indoor switchgear. The threephase arcing fault was initiated on the aluminum main bus or in select cases on the copper bus stabs near the breaker. These experiments used either nominal 480 volts AC or 600 volts AC. Durations of the experiments ranged from approximately 0.4 s to 8.3 s with fault currents ranging from approximately 9.2 kA to 19.3 kA. Real-time electrical operating conditions, including voltage, current and frequency, were measured during the experiments. Heat fluxes and incident energies were measured with plate thermometers, radiometers, and slug calorimeters at various locations around the electrical enclosures. Environmental measurements of breakdown, conductivity and electromagnetics were also taken. The experiments were documented with normal and high-speed videography, infrared imaging and photography. The results, while limited, indicated the difficulty in maintaining and sustaining low-voltage arcs on aluminum components of sufficient duration and at a single point as observed operating experience.

22 GENERAL STUDIES OF NUCLEAR REACTORS↗
NASA NTRS1987

Low voltage scanning electron microscopy of interplanetary dust particles

The resolution of available low-voltage SEM (LVSEM) models used in the characterization of interplanetary dust particles (IDPs) is limited by a number of factors including energy spread in the electron source, beam brightness, scanning electron detector geometry, and various lens aberrations. This paper describes an improved model of LVSEM which offers an increased resolution at low voltage. The improvements include a cold cathode FE source which has an extremely low inherent energy spread and high brightness, a second condenser lens to converge the beam and maintain an optimum aperture half-angle, and a detector optimized for low-voltage scanning-electron collection. To reduce lens aberrations, the specimen is immersed in the objective lens field. The features of several IDP samples observed using the images obtained with this LVSEM model are described.

Blake, D. F.↗
NASA NTRS1998

Buried Oxide Densification for Low Power, Low Voltage CMOS Applications

Special technology and circuit architecture are of growing interest for implementation of circuits which operate at low supply voltages and consume low power levels without sacrificing performance[1]. Use of thin buried oxide SOI substrates is a primary approach to simultaneously achieve these goals. A significant aspect regarding SIMOX SOI for low voltage, low power applications is the reliability and performance of the thin buried oxide. In addition, when subjected to high total dose irradiation, the silicon islands within the BOX layer of SIMOX can store charges and significantly effect the back channel threshold voltages of devices. Thus, elimination of the islands within the buried oxide (BOX) layer is preferred in order to prevent leakage through these conductive islands and charge build-up within the buried oxide layer. A differential (2-step) ramp rate as applied to full and 100 nm BOX SIMOX was previously reported to play a significant role in the stoichiometry and island formation within the buried layer[2]. This paper focus is on the properties of a thin (120nm) buried oxide as a function of the anneal ramp rate and the temperature of anneal. In this research, we have found an improvement in the buried oxide stoichiometry with the use of a slower, singular ramp rate for specified thin buried oxides, with slower ramp rates and higher temperatures of anneal suggested for reducing the presence of Si islands within the BOX layer.

Allen, L. P.↗
DOE OSTI2024

Synchrophasor-Based Zonal Current Differential Protection for Secondary Low Voltage Networks

This report describes an approach to utilizing phasor measurement unit (PMU) data from multiple Intelligent Electronics Devices (IEDs) in a low-voltage network to produce a differential scheme for protecting the medium-voltage feeder and low-voltage network transformers. The proposed protection scheme is designed and prototyped on a real-time automation controller. Its performance is evaluated using real-time controller hardware-in-the-loop simulation. Lab testing results indicate that the proposed protection scheme allows significant distributed energy resources (DER) backfeed and enables selective and fast protection of medium voltage feeders.

42 ENGINEERING↗