Search NASA⌕ Search

SEARCH · Search NASA

Results for “metal oxide semiconductor field effect transistor (MOSFET)”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 19 records

Study of Carrier Mobilities in 4H-SiC MOSFETS Using Hall Analysis

The channel conduction in 4H-SiC metal–oxide–semiconductor field effect transistors (MOSFETs) are highly impacted by charge trapping and scattering at the interface. Even though nitridation reduces the interface trap density, scattering still plays a crucial role in increasing the channel resistance in these transistors. In this work, the dominant scattering mechanisms are distinguished for inversion layer electrons and holes using temperature and body-bias-dependent Hall measurements on nitrided lateral 4H-SiC MOSFETs. The effect of the transverse electric field (E eƒƒ ) on carrier mobility is analyzed under strong inversion condition where surface roughness scattering becomes prevalent. Power law dependencies of the electron and hole Hall mobility for surface roughness scattering are determined to be E$^{-1.8}_{eƒƒ}$ and E$^{-2.4}_{eƒƒ}$, respectively, analogous to those of silicon MOSFETs. Moreover, for n-channel MOSFETs, the effect of phonon scattering is observed at zero body bias, whereas in p-channel MOSFETs, it is observed only under negative body biases. Along with the identification of regimes governed by different scattering mechanisms, these results highlight the importance of the selection of substrate doping and of E eƒƒ in controlling the value of channel mobility in 4H-SiC MOSFETs.

36 MATERIALS SCIENCE↗

A Multi-Metrics In Situ Aging Detector for SiC Power MOSFET Modules with Full Driver-Integration Capability

In this paper, the concept and prototype of an aging detector for silicon carbide (SiC) power metal oxide semiconductor field effect transistor (MOSFET) are proposed and described. It leverages the resonant peak values of gate-source voltage at different instants during the switching transients to decode the change of multiple aging indicators, such as the increases of on-state resistance and threshold voltage. Modeling-based analysis is conducted to support the idea. The detector can be fully integrated into gate drivers without any additional connection to the power stage and is functional during normal power stage operation. A prototype unit was built, and preliminary tests were conducted to validate the idea and the practicality of the detector.

aging↗

Nondestructive microstructural investigation of defects in 4H-SiC epilayers using a multiscale luminescence analysis approach

The development of metal oxide semiconductor field effect transistors (MOSFETs) utilizing epitaxially grown 4H-SiC has accelerated in recent years due to their favorable properties, including a high breakdown field, high saturated electron drift velocity, and good thermal conductivity. However, extended defects in epitaxial 4H-SiC can affect both device yields and operational lifetime. In this work, we demonstrate the importance of a multiscale luminescence characterization approach to studying nondestructively extended defects in epitaxial 4H-SiC semiconducting materials. Multiscale luminescence analysis reveals different aspects of excess charge carrier recombination behavior based on the scale of a particular measurement. Combining measurements of the same extended defect area at different scales tells us more about the essential nature of that defect and its microstructure. Here, we use photoluminescence imaging and cathodoluminescence spectrum imaging to investigate the recombination behavior of several different types of extended defects, including stacking faults, inclusions, and basal plane dislocations. A detailed understanding of the optoelectronic properties of extended defects in epitaxial SiC helps elucidate the microstructure of extended defects and can provide pathways to mitigate detrimental changes during device operation related to their evolution, such as the recombination enhanced dislocation glide effect that affects SiC-based MOSFETs.

3C-inclusion↗

Quench protection for high-temperature superconductor cables using active control of current distribution

Superconducting magnets of future fusion reactors are expected to rely on composite high-temperature superconductor (HTS) cable conductors. In presently used HTS cables, current sharing between components is limited due to poorly defined contact resistances between superconducting tapes or by design. The interplay between contact and termination resistances is the defining factor for power dissipation in these cables and ultimately defines their safe operational margins. However, the current distribution between components along the composite conductor and inside its terminations is a priori unknown, and presently, no means are available to actively tune current flow distribution in real-time to improve margins of quench protection. Also, the lack of ability to electrically probe individual components makes it impossible to identify conductor damage locations within the cable. In this work, we address both problems by introducing active current control of current distribution between components using cryogenically operated metal-oxide-semiconductor-field-effect transistors (MOSFETs). We demonstrate through simulation and experiments how real-time current controls can help to drastically reduce heat dissipation in a developing hot spot in a two-conductor model system and help identify critical current degradation of individual cable components. Finally, prospects of other potential uses of MOSFET devices for improved voltage detection, AC loss-driven active quench protection, and remnant magnetization reduction in HTS magnets are also discussed.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Rapid Prototyping Techniques for Organic Direct-Bonded-Copper Power Modules

Organic Direct-Bonded-Copper (ODBC) is a novel packaging technology for power modules which allows higher flexibility in layout design. In this work, a set of rapid prototyping techniques are developed for ODBC modules based on a polyimide dielectric material. These techniques enable fast and low-cost fabrication of modules with 3-Dimensional (3D) layout features. An example half-bridge (HB) silicon carbide (SiC) metal oxide semiconductor field effect transistor (MOSFET) module is designed and prototyped using the proposed techniques aiming at ultra-low power loop inductance. Finite element analysis (FEA)-circuit co-simulations results and experimental results validate an approximately 0.71nH power loop inductance for the example module design.

36 MATERIALS SCIENCE↗

A Smart Silicon Carbide Power Module With Pulse Width Modulation Over Wi-Fi and Wireless Power Transfer-Enabled Gate Driver, Featuring Onboard State of Health Estimator and High-Voltage Scaling Capabilities

A wide range of utility applications require controllable switches with features such as high-voltage blocking and high-current carrying capacity, especially at high pulse width modulation (PWM) frequency. Low- and medium-voltage utility applications such as motor drives and flexible AC transmission systems as well as solid state transformers could also benefit from a low-cost high-voltage switching module. Wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) metal oxide semiconductor field effect transistors (MOSFETs) are considered to be the present and next-generation device choices, although they have limitations. For relatively high-voltage applications with demanding thermal management, SiC is still the only choice, and GaN dominates the low-voltage regime. This manuscript proposes a new half-bridge power MOSFET module that is suitable for conventional H-bridge of multilevel configurations used in high-voltage applications. Constructed from bare SiC dies, this half-bridge module takes advantage of (1) optimized MOSFET placement inside the module, (2) customized heat exchanger, manifold, and cooling, (3) integrated gate driver module with pulse width modulation (PWM) over wi-fi to eliminate the need for low-voltage signals, (4) wireless power transfer (WPT)-enabled gate driver and other ancillary circuits, (5) and the option to incorporate an onboard state-of-health (SOH) estimator module. The entire architecture has been designed and built at the National Renewable Energy Laboratory (NREL) in Golden, CO.

Ga2O3 devices↗

Compact Solid-State High-Voltage Switch

Researchers at Sandia have developed a semiconductor-based high-voltage switch, with experimental results showing potential for enhanced radiation hardness, for use in multiple power conversion applications. Gallium nitride (GaN) metal-oxide semiconductor field effect transistors (MOSFETs) were modeled using commercial and Sandia CHARON simulation software to understand their performance and for future prediction of device operation in radiation environments.

42 ENGINEERING↗

Electrically Detected Magnetic Resonance Study of High-Field Stress Induced Si/SiO 2 Interface Defects.

It is widely accepted that the breakdown of Si0 2 gate dielectrics is caused by the buildup of stress-induced defects over time. Although several physical mechanisms have been proposed for the generation of these defects, very little direct experimental evidence as to the chemical and physical identity of these defects has been generated in the literature thus far. Here, we present electrically detected magnetic resonance (EDMR) measurements obtained via spin-dependent recombination currents at the interface of high-field stressed Si/Si0 2 metal-oxide-semiconductor field effect transistors (MOSFETs).

36 MATERIALS SCIENCE↗

Computational Fermi Level Engineering and Doping-Type Conversion of Ga2O3 Via Three-Step Processing

Ga2O3 is being actively explored for power electronics, deep-ultraviolet optoelectronics, and other applications due to its ultra-wide bandgap and low projected fabrication cost of large-size and high-quality crystals. N-type doping of Ga2O3 can be achieved and tuned, but p-type doping faces fundamental obstacles due to deep character of acceptor levels and polaron transport of resulting holes. However, successful engineering of Ga2O3 based devices requires critical control of doping density, Fermi level position, and free carrier concentration, providing opportunities for predictive process simulation. We use first-principles defect theory and defect equilibrium calculations to simulate a 3-step growth-annealing-quench protocol for hydrogen assisted Mg doping in Ga2O3, taking into account the hydrogen-oxygen-water gas phase equilibrium. We predict type conversion to a net p-type regime following O-rich annealing after growth under reducing conditions in the presence of H2. This process is similar to the Mg acceptor activation by H removal in GaN. We show that there is an optimal temperature that maximizes the net acceptor density during the equilibrium annealing step for a given Mg doping level. Quenching of non-equilibrium annealed samples then results in a Fermi level EF below mid-gap down to about EV +1.5 eV, creating a significant number of uncompensated neutral MgGa0 acceptors. The resulting free hole concentration in quenched samples is very low (109 – 1012 cm-3) due to deep energy level of these Mg acceptors, but this type converted Ga2O3 material can create a significant built-in field in a p-n junction with an adjoining n-type material. Additionally, the electron concentration is greatly suppressed in such acceptor-doped Ga2O3, which could enable the use as a current blocking layer to fabricate normally-off (enhancement-mode) vertical Ga2O3 based metal-oxide-semiconductor field effect transistors (MOSFETs), and as a guard ring for edge termination in MOSFETs and Schottky barrier diodes (SBDs) with increased breakdown voltage.

CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS,M↗

Drivers for paralleled semiconductor switches

An apparatus includes a plurality of parallel-connected semiconductor switches (e.g., silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) or other wide-bandgap semiconductor switches) and a plurality of driver circuits having outputs configured to be coupled to control terminals of respective ones of the plurality of semiconductor switches and configured to drive the parallel-connected semiconductor switches responsive to a common switch state control signal. The driver circuits may have respective different power supplies, which may be adjustable. Respective output resistors may couple respective ones of the driver circuits to respective ones of the semiconductor switches. The output resistors may be adjustable.

Nojima, Geraldo↗

Thermal Optimization and Experimental Demonstration of a Silicon Carbide, Half-Bridge Power Module

This paper describes modeling and experimental work to design and demonstrate a silicon carbide (SiC), single-side-cooled power module. Two SiC metal-oxide-semiconductor field-effect transistors (MOSFET) were used for each switch position and packaged on a metalized ceramic substrate. Thermal modeling was first conducted to optimize the module packaging to minimize junction-to-fluid thermal resistance and device temperature variations. This procedure identified the optimal device placement and baseplate thickness to maximize thermal performance. A heat exchanger - incorporating impinging jets of water-ethylene glycol - was designed to cool the module's baseplate to minimize thermal resistance and pumping power. The heat exchanger used relatively low fluid velocities (<1.5 m/s) to minimize erosion-corrosion effects and relatively large fluid channel sizes (>=1 mm) to prevent clogging. The power module concept was fabricated, and experiments were conducted to measure its thermal performance. Direct current was used to power the module devices, and junction temperatures were measured via device temperature-sensitive parameters. The experimental results were found to be in good agreement with model predictions (within 2%) and yielded junction-to-fluid thermal resistance values as low as about 15 mm2 K/W at relatively low pumping power values. The results demonstrate the improved performance associated with jet impingement cooling and represent an improvement over existing channel-flow-type cold plates, which can enable improvements to power density and reliability.

36 MATERIALS SCIENCE↗

Investigation on gate oxide reliability under gate bias screening for commercial SiC planar and trench MOSFETs

This paper evaluates the impact of the fast high gate-voltage screening technique on gate oxide reliability of commercial 1.2 kV 4H-SiC power metal-oxide-semiconductor field-effect transistors (MOSFETs) with planar and trench gate structures. The measurements are conducted on packaged devices with the intent that the results will be applicable to wafer-level screening. The threshold voltage (V th ) of SiC MOSFETs is measured before and after various screening treatments and recovery process. In addition, constant-voltage time-dependent dielectric breakdown (TDDB) measurements are performed on SiC MOSFETs to obtain the intrinsic lifetime of gate oxide. The objective of this study is to determine the optimal screening conditions and improve screening efficiency without degradation of gate oxide reliability, such as V th shift and reduced oxide intrinsic lifetime. Due to the differences in the gate oxidation process and structural design of SiC planar and trench MOSFETs, the two types of devices exhibit different oxide reliability in the screening process. The recommended screening conditions obtained in this paper reveal that SiC trench MOSFETs can accept higher screening voltages compared to SiC planar MOSFETs. Hence, it can be concluded that more efficient screening techniques can be adopted for SiC MOSFETs with thicker gate oxide to meet the requirements of industrial applications.

36 MATERIALS SCIENCE↗

Radiation Response of Ga 2 O 3 MOSFETs Probed via Focused Particle Beams

Gallium Oxide (Ga 2 O 3 ), particularly in its β-phase, is attracting lots of interest for high-power and high-voltage electronics due to its wide bandgap, high breakdown field, and thermal stability. This study investigates the radiation response of Ga 2 O 3 Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) under Total Ionizing Dose (TID) and Displacement Damage (DD) conditions, which are critical for applications in radiation environments. Utilizing a dual-beam Focused Ion Beam and Scanning Electron Microscope setup, microscale analysis of radiation effects on individual devices is performed. The findings reveal distinct behaviors under TID and DD + TID conditions, with TID leading to threshold voltage shifts due to trapped charges, while DD results in decreased drive current attributed to increased carrier scattering from lattice defects. Notably, it is demonstrated that the TID effect can be mitigated through dynamic threshold voltage adjustments and that the predicted TID from ions calculated by Monte Carlo simulations overestimates actual TID due to unaccounted charge yield effects. In conclusion, this research enhances the understanding of Ga2O3 MOSFETs' performance in harsh radiation environments, providing insights for the design of robust electronic devices for space and nuclear applications.

MOSFET↗

Graphite-Embedded High-Performance Insulated Metal Substrate for Wide-Bandgap Power Modules

Emerging wide-bandgap (WBG) semiconductor devices such as silicon carbide (SiC) metal–oxide semiconductor field-effect transistors (MOSFETs) and gallium nitride high-electron-mobility transistors can handle high power in reduced semiconductor areas better than conventional Si-based devices owing to superior material properties. With increased power loss density in a WBG-based converter and reduced die size in power modules, thermal management of power devices must be optimized for high performance. Here, we present a graphite-embedded insulated metal substrate (thermally-annealed-pyrolytic-graphite-embedded insulated metal substrate—IMSwTPG) designed for WBG power modules. Theoretical thermal performance analysis of graphite-embedded metal cores is presented, with design details for IMSwTPG with embedded graphite to replace a direct-bonded copper (DBC) substrate. The proposed IMSwTPG is compared with an aluminum nitride-based DBC substrate using finite-element thermal analysis for steady-state and transient thermal performance. The solutions’ thermal performances are compared under different coolant temperature and thermal loading conditions, and the proposed substrate's electrical performance is validated with static and dynamic characterization. Using graphite-embedded substrates, junction-to-case thermal resistance of SiC MOSFETs can be reduced up to 17%, and device current density can be increased by 10%, regardless of the thermal management strategy used to cool the substrate. Reduced transient thermal impedance of up to 40% of dies owing to increased heat capacity is validated in transient thermal simulations and experiments. The half-bridge power module's electrical performance is evaluated for on -state resistance, switching performance, and switching loss at three junction temperature conditions. The proposed substrate solution has minimal impact on conduction and switching performance of SiC MOSFETs.

42 ENGINEERING↗

Off-state magnetoresistance in long-channel germanium Schottky-barrier MOSFETs

An increasing magnetic field perpendicular to an undoped semiconductor surface at low temperature is known to strengthen the binding of localized electrons to stationary ions, as the wavefunction's tails evolve from exponential to Gaussian. It is also known that application of a high bias voltage to a depleted semiconductor can liberate bound charge and induce a large drop in electrical resistance. We connect these established results to experimental electrical transport measurements on off-state germanium Schottky-barrier metal–oxide–semiconductor field-effect transistor (MOSFETs) with an aluminum oxide insulating dielectric and platinum germanide contacts. We make measurements at the three distinct orientations of the magnetic field with respect to the substrate and the current. At 6 K, we observe sharp attenuation of current by more than 2 orders of magnitude, within 60 mT, at a crossover magnetic field perpendicular to the substrate. A 1 T magnetic field attenuates the current by more than 4 orders of magnitude. The strength of the attenuation and the value of the crossover field are controlled by both the gate–source and drain–source voltages. The attenuation is much weaker when the magnetic field is parallel to the current. Finally, we orient the magnetic field parallel to the substrate, but perpendicular to the current, allowing us to distinguish charge hopping at the oxide interface from charge hopping in the bulk. In conclusion, this large off-state magnetoresistance can be exploited for cryogenic magnetic- and photo-detection, and for high-bias, low-leakage MOSFETs.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Design, Analysis, Comparison, and Experimental Validation of Insulated Metal Substrates for High-Power Wide-Bandgap Power Modules

Direct bonded copper (DBC) substrates used in power modules have limited heat spreading and manufacturing capability due to ceramic properties and manufacturing technology. The ceramic and copper bonding is also subject to high mechanical stress due to coefficient of thermal expansion mismatch between the copper and the ceramic. For wide-bandgap (WBG) devices, it is of interest exploring new substrate technologies that can overcome some of the challenges of direct bonded copper substrates. In this technical paper, the design, analysis, and comparison of insulated metal substrates (IMSs) for high-power wide-bandgap semiconductor-based power modules are discussed. This paper starts with technical description and discussion of state-of-the-art DBC substrates with different ceramic insulators such as aluminum nitride (AlN), Al 2 O 3 , and Si 3 N 4 . Next, an introduction of IMSs and their material properties, and a design approach for SiC (silicon carbide) metal-oxide-semiconductor field-effect transistor (MOSFET)-based power modules for high-power applications is provided. The influence of dielectric thickness on the power handling capability of the substrate are also discussed. The designed IMS and DBC substrates were characterized in terms of steady-state and transient thermal performance using finite element simulation. Finally, the performance of the IMS and DBC are validated in an experimental setup under different loading and cooling temperature conditions. We report the simulation and experimental results showed that the IMS can provide high steady-state thermal performance for high-power modules based on SiC MOSFETs. Furthermore, the IMS provided enhanced transient thermal performance, which provided a reduced junction temperature when the module is operated at low fundamental output frequencies in traction drive systems.

42 ENGINEERING↗

Gate-All-Around Nanowire Field-Effect Transistors: A Historical Perspective

The development of transistor architectures, evolving from 2D planar metal-oxide-semiconductor field-effect transistors (MOSFETs) to FinFETs and then to gate-all-around nanowire (GAANW) FETs, plays a crucial role in downscaling technology nodes in the semiconductor industry. This perspective reviews the concept of MOSFETs and summarizes this historical development with particular emphasis on GAANW transistors due to their importance in next-generation technology for nodes below 3 nm. Specifically, the concept of GAANW transistors and their advantages over planar and FinFET devices for further scaling are presented, along with a discussion of their transition from early conceptual ideas to laboratory demonstrations and, ultimately, industrial adoption. Furthermore, potential solutions, such as complementary FETs (CFETs) and 2D semiconductor-based FETs, and their associated challenges for the future generation, known as the Angstrom Era, are discussed in a technological roadmap. In conclusion, this perspective may inspire both industry and academia in future research directions for realizing the Angstrom Era.

gate-all-around transistors↗

A portable and reusable sensor system based on graphene for real-time and sensitive detection of lead ions in water

Long-term exposure to Pb 2+ can cause irreversible damage to the nervous, cardiovascular, and reproductive systems. Therefore, developing a fast and sensitive detection system capable of monitoring minuscule concentrations of Pb 2+ is essential. In this study, we demonstrated a fully portable sensor system enabling rapid, sensitive, and real-time monitoring of Pb 2+ . The sensor system adopted the remote-gate field-effect transistor (RGFET) detection scheme and was easy to operate, even for non-experts. The sensor system comprised two printed circuit boards (PCBs): a sensor PCB with a remote-gate electrode and an analyzer PCB with a metal-oxide-semiconductor field-effect transistor (MOSFET) transducer and peripheral electronics to manage sensor signals. To achieve a high sensitivity for Pb 2+ , we utilized graphene ink drop-casted on the sensor PCB as a sensing membrane. The graphene film was easy to deposit and remove, enabling the sensor PCB to be reused multiple times. The sensor system was further linked to a smartphone application that instantly monitors the sensor response, allowing for rapid point-of-use detection. The sensor exhibited a high sensitivity of 21.7% when the limit of detection (LOD) value of 1 nM (∼0.2 ppb) was detected, and the typical detection time for each sample was approximately 60 seconds. This portable sensor system advances sensing technologies and could potentially supplement expensive, laborious conventional sensing equipment.

54 ENVIRONMENTAL SCIENCES↗