Inverter-Based MicroLED Pixel Circuit Using LTPO TFTs Achieving Submicrosecond Pulse-Width Modulation With Low Power Consumption Through Dynamic SWEEP Generation
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Kang, Kyeong-Soo [Department of Electrical and Com↗
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Tunnel junction-enabled monolithically integrated GaN micro-light emitting transistor
GaN/InGaN microLEDs are a very promising technology for next-generation displays. Switching control transistors and their integration are key components in achieving high-performance, efficient displays. Monolithic integration of microLEDs with GaN switching devices provides an opportunity to control microLED output power with capacitive (voltage)-controlled rather than current-controlled schemes. This approach can greatly reduce system complexity for the driver circuit arrays while maintaining device opto-electronic performance. In this work, we demonstrate a 3-terminal GaN micro-light emitting transistor that combines a GaN/InGaN blue tunneling-based microLED with a GaN n-channel FET. Further, the integrated device exhibits excellent gate control, drain current control, and optical emission control. This work provides a promising pathway for future monolithic integration of GaN FETs with microLED to enable fast switching, high-efficiency microLED display and communication systems.
42 ENGINEERING↗
Mixed-dimensional stackable electronics enabled by freestanding 2D/3D materials
2D material-based devices have received great deal of attention as they can be easily stacked to obtain multifunctionality. With their ultrathin thicknesses, such multifunctioning devices become so flexible and conformal that they can be placed onto any 3D featured surfaces. However, 2D heterostructures are typically demonstrated as stacked flakes where single or few devices can be fabricated due to lack of strategies for layer-by-layer stacking of 2D materials at the wafer scale. In this talk, I will discuss about our unique strategy to isolate wafer-scale 2D materials into monolayers and stack them into a heterostructures by using a layer-resolved splitting (LRS) technique. This technique enables my group at MIT to explore unprecedented wafer-scale 2D heterodevices including integrated photonics, 3D neuromorphic computing, and microLEDs, which will be introduced in my talk. While 2D heterostructures promise interesting futuristic devices, the performance of 2D material-based devices is substantially inferior to that of conventional 3D semiconductor materials. However, 3D materials exist as their bulk form, thus it is challenging to stack them together for heterostructures. Obviously, conformal coating of such single-crystalline bulks on 3D features is impossible. My group at MIT has recently invented a 2D materials-based layer transfer (2DLT) technique that can produce single-crystalline freestanding membranes from any compound materials with their excellent semiconducting performance. This technique is based on remote epitaxy of single-crystalline films on graphene followed by peeling from graphene. Stacking of freestanding 3D material membranes will enable unprecedented 3D heterostructures whose performance is expected to be superior to that of 2D heterostructures. I will talk about our group’s effort to apply single-crystalline freestanding membranes for flexible, conformal electronics as well as for 3D heterostructures. Finally, I will conclude my talk by discussing perspectives of coupling 2D-3D freestanding membranes for 2D-3D mixed heterostructured devices that can be enabled by our LRS and 2DLT techniques.
Kim, Jeehwan↗
Influence of Superlattice Structure on V-Defect Distribution, External Quantum Efficiency and Electroluminescence for Red InGaN Based µLEDs on Silicon
Achieving high quantum efficiency in long-wavelength LEDs has posed a significant challenge to the solid-state lighting and display industries. In this article, we use V-defect engineering as a technique to achieve higher efficiencies in red InGaN LEDs on (111) Si through lateral injection. We investigate the effects of superlattice structure on the V-defect distribution, the electroluminescence properties, and the external quantum efficiency. Increasing the relative thickness of In in the InGaN/GaN superlattice and the total superlattice thickness correlate with a reduction of active region defects and increased external quantum efficiencies. The highest measured on-chip EQE was 0.15% and based on Monte-Carlo ray tracing simulations for light extraction we project this would correspond to a flip-chip EQE of ~2.5%.
36 MATERIALS SCIENCE↗