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At least 19 records

Fast Offset Laser Phase-Locking System

Figure 1 shows a simplified block diagram of an improved optoelectronic system for locking the phase of one laser to that of another laser with an adjustable offset frequency specified by the user. In comparison with prior systems, this system exhibits higher performance (including higher stability) and is much easier to use. The system is based on a field-programmable gate array (FPGA) and operates almost entirely digitally; hence, it is easily adaptable to many different systems. The system achieves phase stability of less than a microcycle. It was developed to satisfy the phase-stability requirement for a planned spaceborne gravitational-wave-detecting heterodyne laser interferometer (LISA). The system has potential terrestrial utility in communications, lidar, and other applications. The present system includes a fast phasemeter that is a companion to the microcycle-accurate one described in High-Accuracy, High-Dynamic-Range Phase-Measurement System (NPO-41927), NASA Tech Briefs, Vol. 31, No. 6 (June 2007), page 22. In the present system (as in the previously reported one), beams from the two lasers (here denoted the master and slave lasers) interfere on a photodiode. The heterodyne photodiode output is digitized and fed to the fast phasemeter, which produces suitably conditioned, low-latency analog control signals which lock the phase of the slave laser to that of the master laser. These control signals are used to drive a thermal and a piezoelectric transducer that adjust the frequency and phase of the slave-laser output. The output of the photodiode is a heterodyne signal at the difference between the frequencies of the two lasers. (The difference is currently required to be less than 20 MHz due to the Nyquist limit of the current sampling rate. We foresee few problems in doubling this limit using current equipment.) Within the phasemeter, the photodiode-output signal is digitized to 15 bits at a sampling frequency of 40 MHz by use of the same analog-to-digital converter (ADC) as that of the previously reported phasemeter. The ADC output is passed to the FPGA, wherein the signal is demodulated using a digitally generated oscillator signal at the offset locking frequency specified by the user. The demodulated signal is low-pass filtered, decimated to a sample rate of 1 MHz, then filtered again. The decimated and filtered signal is converted to an analog output by a 1 MHz, 16-bit digital-to-analog converters. After a simple low-pass filter, these analog signals drive the thermal and piezoelectric transducers of the laser.

Shaddock, Daniel↗

Weak-light Phase-locking for LISA

The long armlengths of the LISA interferometer, and the finite aperture of the telescope, leads to an optical power attenuation of approximately equal to 10(exp -10) of the transmitted to received light. Simple reflection at the end of the arm is therefore not an optimum interferometric design. Instead, a local laser is offset phase-locked to the weak incoming beam, transferring the phase information of the incoming to the outgoing light. This paper reports on an experiment to characterize a weak light phase-locking scheme suitable for LISA in which a diode-pumped, Nd:YAG, non-planar ring oscillator (NPRO) is offset phase-locked to a low power (13pW) frequency stabilised master NPRO. Preliminary results of the relative phase noise of the slave laser shows shot noise limited performance above 0.4 Hz. Excess noise is observed at lower frequencies, most probably due to thermal effects in the optical arrangement and phase sensing electronics.

McNamara, Paul W.↗

Sample-Clock Phase-Control Feedback

To demodulate a communication signal, a receiver must recover and synchronize to the symbol timing of a received waveform. In a system that utilizes digital sampling, the fidelity of synchronization is limited by the time between the symbol boundary and closest sample time location. To reduce this error, one typically uses a sample clock in excess of the symbol rate in order to provide multiple samples per symbol, thereby lowering the error limit to a fraction of a symbol time. For systems with a large modulation bandwidth, the required sample clock rate is prohibitive due to current technological barriers and processing complexity. With precise control of the phase of the sample clock, one can sample the received signal at times arbitrarily close to the symbol boundary, thus obviating the need, from a synchronization perspective, for multiple samples per symbol. Sample-clock phase-control feedback was developed for use in the demodulation of an optical communication signal, where multi-GHz modulation bandwidths would require prohibitively large sample clock frequencies for rates in excess of the symbol rate. A custom mixedsignal (RF/digital) offset phase-locked loop circuit was developed to control the phase of the 6.4-GHz clock that samples the photon-counting detector output. The offset phase-locked loop is driven by a feedback mechanism that continuously corrects for variation in the symbol time due to motion between the transmitter and receiver as well as oscillator instability. This innovation will allow significant improvements in receiver throughput; for example, the throughput of a pulse-position modulation (PPM) with 16 slots can increase from 188 Mb/s to 1.5 Gb/s.

Quirk, Kevin J.↗

Overview of the LISA Phasemeter

The LISA phasemeter is required to measure the phase of an electrical signal with an error less than 3 (micro)cycles/pHz over times scales from 1 to 1000 seconds. This phase sensitivity must be achieved in the presence of laser phase fluctuations 108 times larger than the target sensitivity. Other challenging aspects of the measurement are that the heterodyne frequency varies from 2 to 20 MHz and the signal contains multiple frequency tones that must be measured. The phasemeter architecture uses high-speed analog to digital conversion followed by a digital phase locked loop. An overview of the phasemeter architecture is presented along with results for the breadboard LISA Phasemeter demonstrating that critical requirements are met.

offset phase locks↗

Programmable Oscillator

A programmable oscillator is a frequency synthesizer with an output phase that tracks an arbitrary function. An offset, phase-locked loop circuit is used in combination with an error control feedback loop to precisely control the output phase of the oscillator. To down-convert the received signal, several stages of mixing may be employed with the compensation for the time-base distortion of the carrier occurring at any one of those stages. In the Goldstone Solar System Radar (GSSR), the compensation occurs in the mixing from an intermediate frequency (IF), whose value is dependent on the station and band, to a common IF used in the final stage of down-conversion to baseband. The programmable oscillator (PO) is used in the final stage of down-conversion to generate the IF, along with a time-varying phase component that matches the time-base distortion of the carrier, thus removing it from the final down-converted signal.

Quirk, Kevin J.↗

Flight Phasemeter on the Laser Ranging Interferometer on the GRACE Follow-On Mission

As the first inter-spacecraft laser interferometer, the Laser Ranging Interferometer (LRI) on the GRACE Follow-On Mission will demonstrate interferometry technology relevant to the LISA mission. This paper focuses on the completed LRI Laser Ranging Processor (LRP), which includes heterodyne signal phase tracking at µcycle/vHz precision, differential wavefront sensing, offset frequency phase locking and Pound-Drever-Hall laser stabilization. The LRI design has characteristics that are similar to those for LISA: 1064nm NPRO laser source, science bandwidth in the mHz range, MHz-range intermediate frequency and Doppler shift, detected optical power of tens of picoWatts. Laser frequency stabilization has been demonstrated at a level below 30 Hz/vHz, better than the LISA requirement of 300 Hz/vHz. The LRP has completed all performance testing and environmental qualification and has been delivered to the GRACE Follow-On spacecraft. The LRI is poised to test the LISA techniques of tone-assisted time delay interferometry and arm-locking. GRACE Follow-On launches in 2017.

Bachman, B↗

NASA Tech Briefs, May 2008

Topics covered inclde: Deployable Wireless Camera Penetrators; Hand-Held Units for Short-Range Wireless Biotelemetry; Wearable Wireless Telemetry System for Implantable BioMEMS Sensors; Electronic Escape Trails for Firefighters; Architecture for a High-to-Medium-Voltage Power Converter; 24-Way Radial Power Combiner/Divider for 31 to 36 GHz; Three-Stage InP Submillimeter-Wave MMIC Amplifier; Fast Electromechanical Switches Based on Carbon Nanotubes; Solid-State High-Temperature Power Cells; Fast Offset Laser Phase-Locking System; Fabricating High-Resolution X-Ray Collimators; Embossed Teflon AF Laminate Membrane Microfluidic Diaphragm Valves; Flipperons for Improved Aerodynamic Performance; System Estimates Radius of Curvature of a Segmented Mirror; Refractory Ceramic Foams for Novel Applications; Self-Deploying Trusses Containing Shape-Memory Polymers; Fuel-Cell Electrolytes Based on Organosilica Hybrid Proton Conductors; Molecules for Fluorescence Detection of Specific Chemicals; Cell-Detection Technique for Automated Patch Clamping; Redesigned Human Metabolic Simulator; Compact, Highly Stable Ion Atomic Clock; LiGa(OTf)(sub 4) as an Electrolyte Salt for Li-Ion Cells; Compact Dielectric-Rod White-Light Delay Lines; Single-Mode WGM Resonators Fabricated by Diamond Turning; Mitigating Photon Jitter in Optical PPM Communication; MACOS Version 3.31; Fiber-Optic Determination of N2, O2, and Fuel Vapor in the Ullage of Liquid-Fuel Tanks; Spiking Neurons for Analysis of Patterns; Symmetric Phase-Only Filtering in Particle-Image Velocimetry; Efficient Coupler for a Bessel Beam Dispersive Element; and Attitude and Translation Control of a Solar Sail Vehicle.

Source record↗

Investigation of techniques for improving Saturn 5 RF tracking and ranging systems

Results of theoretical analyses of 12 problems are presented and comparisons of theoretical and experimental results are given. The investigations covered were: (1) techniques for improving the Saturn radar altimeter, (2) performance of the phase lock loop of the offset Doppler transponder, (3) signal processing equipment design for an orbital altitude radar return experiment, (4) spectral studies of signals present in the command and communication system (CCS) up-link transmitter, (5) intermodulation in the CCS down-link data demodulators, (6) error rate performance of the CCS transponder command demodulator, (7) flame attenuation effects on telemetry transmissions during Saturn launches, (8) design of a digital television system which converts a standard monochrome picture to a slow-scan picture, (9) methods of obtaining an additional CCS 72-kilobit/sec telemetry channel, (10) computation of the CCS S-band down-link spectra, (11) modeling of portions of the communications systems, and (12) modeling of a telemetry transmitter.

Walsh, J. R., Jr.↗

Multichannel X-Band Dielectric-Resonator Oscillator

A multichannel dielectric-resonator oscillator (DRO), built as a prototype of a local oscillator for an X-band transmitter or receiver, is capable of being electrically tuned among and within 26 adjacent frequency channels, each 1.16 MHz wide, in a band ranging from 7,040 to 7,070 GHz. The tunability of this oscillator is what sets it apart from other DROs, making it possible to use mass-produced oscillator units of identical design in diverse X-band applications in which there are requirements to use different fixed frequencies or to switch among frequency channels. The oscillator (see figure) includes a custom-designed voltage-controlled-oscillator (VCO) monolithic microwave integrated circuit (MMIC), a dielectric resonator disk (puck), and two varactor-coupling circuits, all laid out on a 25-mil (0.635-mm)-thick alumina substrate having a length and width of 17.8 mm. The resonator disk has a diameter of 8.89 mm and a thickness of 4.01 mm. The oscillator is mounted in an 8.9-mm-deep cavity in a metal housing. The VCO MMIC incorporates a negative- resistance oscillator amplifier along with a buffer amplifier. The resonator disk is coupled to a microstrip transmission line connected to the negative-resistance port of the VCO MMIC. The two varactor-coupling circuits include microstrip lines, laid out orthogonally to each other, for coupling with the resonator disk. Each varactor microstrip line is DC-coupled to an external port via a microwave choke. One varactor is used for coarse tuning to select a channel; the other varactor is used (1) for fine tuning across the 1.16-MHz width of each channel and (2) as a feedback port for a phase-lock loop. The resonator disk is positioned to obtain (1) the most desirable bandwidth, (2) relatively tight coupling with the microstrip connected to the coarse-tuning varactor, and (3) relatively loose coupling with the microstrip connected to the fine-tuning varactor. Measurements of performance showed that the oscillator can be switched among any of the 26 channels and can be phase-locked to a nominal frequency in any channel. The degree of nonlinearity of tuning was found not to exceed 2.5 percent. The tuning sensitivity was found to be 6.15 MHz/V at a bias offset of -2 V on the phase-lock-loop varactor. The phase noise of the oscillator in free-running operation was found to be -107 dBc/Hz (where dBc signifies decibels relative to the carrier signal) at 100 kHz away from the carrier frequency.

Mysoor, Narayan↗

Robust Timing Synchronization in Aeronautical Mobile Communication Systems

This work details a study of robust synchronization schemes suitable for satellite to mobile aeronautical applications. A new scheme, the Modified Sliding Window Synchronizer (MSWS), is devised and compared with existing schemes, including the traditional Early-Late Gate Synchronizer (ELGS), the Gardner Zero-Crossing Detector (GZCD), and the Sliding Window Synchronizer (SWS). Performance of the synchronization schemes is evaluated by a set of metrics that indicate performance in digital communications systems. The metrics are convergence time, mean square phase error (or root mean-square phase error), lowest SNR for locking, initial frequency offset performance, midstream frequency offset performance, and system complexity. The performance of the synchronizers is evaluated by means of Matlab simulation models. A simulation platform is devised to model the satellite to mobile aeronautical channel, consisting of a Quadrature Phase Shift Keying modulator, an additive white Gaussian noise channel, and a demodulator front end. Simulation results show that the MSWS provides the most robust performance at the cost of system complexity. The GZCD provides a good tradeoff between robustness and system complexity for communication systems that require high symbol rates or low overall system costs. The ELGS has a high system complexity despite its average performance. Overall, the SWS, originally designed for multi-carrier systems, performs very poorly in single-carrier communications systems. Table 5.1 in Section 5 provides a ranking of each of the synchronization schemes in terms of the metrics set forth in Section 4.1. Details of comparison are given in Section 5. Based on the results presented in Table 5, it is safe to say that the most robust synchronization scheme examined in this work is the high-sample-rate Modified Sliding Window Synchronizer. A close second is its low-sample-rate cousin. The tradeoff between complexity and lowest mean-square phase error determines the rankings of the Gardner Zero-Crossing Detector and both versions of the Early-Late Gate Synchronizer. The least robust models are the high and low-sample-rate Sliding Window Synchronizers. Consequently, the recommended replacement synchronizer for NASA's Advanced Air Transportation Technologies mobile aeronautical communications system is the high-sample-rate Modified Sliding Window Synchronizer. By incorporating this synchronizer into their system, NASA can be assured that their system will be operational in extremely adverse conditions. The quick convergence time of the MSWS should allow the use of high-level protocols. However, if NASA feels that reduced system complexity is the most important aspect of their replacement synchronizer, the Gardner Zero-Crossing Detector would be the best choice.

Xiong, Fu-Qin↗

Frequency Stabilization of DFB Laser Diodes at 1572 nm for Spaceborne Lidar Measurements of CO2

We report a fiber-based, pulsed laser seeder system that rapidly switches among 6 wavelengths across atmospheric carbon dioxide (CO2) absorption line near 1572.3 nm for measurements of global CO2 mixing ratios to 1-ppmv precision. One master DFB laser diode has been frequency-locked to the CO2 line center using a frequency modulation technique, suppressing its peak-to-peak frequency drifts to 0.3 MHz at 0.8 sec averaging time over 72 hours. Four online DFB laser diodes have been offset-locked to the master laser using phase locked loops, with virtually the same sub-MHz absolute accuracy. The 6 lasers were externally modulated and then combined to produce the measurement pulse train.

Numata, Kenji↗

Precision and Fast Wavelength Tuning of a Dynamically Phase-Locked Widely-Tunable Laser

We report a precision and fast wavelength tuning technique demonstrated for a digital-supermode distributed Bragg reflector laser. The laser was dynamically offset-locked to a frequency-stabilized master laser using an optical phase-locked loop, enabling precision fast tuning to and from any frequencies within a ~40-GHz tuning range. The offset frequency noise was suppressed to the statically offset-locked level in less than ~40 s upon each frequency switch, allowing the laser to retain the absolute frequency stability of the master laser. This technique satisfies stringent requirements for gas sensing lidars and enables other applications that require such well-controlled precision fast tuning.

Numata, Kenji↗

Suppressed carrier full-spectrum combining

A technique to accomplish full spectrum arraying where all the telemetry power is put into the subcarrier sidebands (suppressed carrier) is described. The matched filter needed in each antenna prior to cross correlation for deriving the coherence delay and phase offsets is an open loop version of the telemetry phase lock loop provided in the Advanced Digital Receiver. In analogy with a Costas loop telemetry receiver, a squaring loss is derived, and a signal to noise ratio for the cross correlation loop phase is presented.

Rogstad, D. H.↗

Centering a DDR Strobe in the Middle of a Data Packet

The Orion CEV Northstar ASIC (application- specific integrated circuit) project required a DDR (double data rate) memory bus driver/receiver (DDR PHY block) to interface with external DDR memory. The DDR interface (JESD79C) is based on a source synchronous strobe (DQS\) that is sent along with each packet of data (DQ). New data is provided concurrently with each edge of strobe and is sent irregularly. In order to capture this data, the strobe needs to be delayed and used to latch the data into a register. A circuit solves the need for training a DDR PRY block by incorporating a PVT-compensated delay element in the strobe path. This circuit takes an external reference clock signal and uses the regular clock to calibrate a known delay through a data path. The compensated delay DQS signal is then used to capture the DQ data in a normal register. This register structure can be configured as a FIFO (first in first out), in order to transfer data from the DDR domain to the system clock domain. This design is different in that it does not rely upon the need for training the system response, nor does it use a PLL (phase locked loop) or a DLL (delay locked loop) to provide an offset of the strobe signal. The circuit is created using standard ASIC building blocks, plus the PVT (process, voltage, and temperature) compensated delay line. The design uses a globally available system clock as a reference, alleviating the need to operate synchronously with the remote memory. The reference clock conditions the PVT compensated delay line to provide a pre-determined amount of delay to any data signal that passes through this delay line. The delay line is programmed in degrees of offset, so that one could think of the clock period representing 360deg of delay. In an ideal environment, delaying the strobe 1/4 of a clock cycle (90deg) would place the strobe in the middle of the data packet. This delayed strobe can then be used to clock the data into a register, satisfying setup and hold requirements of the system.

Johnson, Michael↗

Apparatus and Method to Enable Precision and Fast Laser Frequency Tuning

An apparatus and method is provided to enable precision and fast laser frequency tuning. For instance, a fast tunable slave laser may be dynamically offset-locked to a reference laser line using an optical phase-locked loop. The slave laser is heterodyned against a reference laser line to generate a beatnote that is subsequently frequency divided. The phase difference between the divided beatnote and a reference signal may be detected to generate an error signal proportional to the phase difference. The error signal is converted into appropriate feedback signals to phase lock the divided beatnote to the reference signal. The slave laser frequency target may be rapidly changed based on a combination of a dynamically changing frequency of the reference signal, the frequency dividing factor, and an effective polarity of the error signal. Feed-forward signals may be generated to accelerate the slave laser frequency switching through laser tuning ports.

Chen, Jeffrey R.↗