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Results for “offset phase locks”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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10 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Linewidth narrowing and wideband frequency modulation of a DBR laser

We present a scheme to phase-lock a 240 mW, 852 nm distributed Bragg reflector (DBR) laser to a fixed-frequency narrow-linewidth laser with a rapidly tunable frequency offset near 9 GHz. The phase-lock is accomplished by electronic feedback on the beatnote between the two lasers. The frequency offset can be swept 200 MHz in 300 us, limited by the feedback loop bandwidth, allowing for its use in complex cooling and state preparation schemes needed in atomic physics experiments. Here, we find that the phase-lock reduces the linewidth of the DBR laser below its natural linewidth of ~400 kHz to ~100 kHz

47 OTHER INSTRUMENTATION↗
DOE OSTI2023

Offset lock with a 440-GHz range using electro-optic modulation

Offset locking is crucial to many physics experiments. Wide range offset locks are desirable, as they increase the span of usable frequencies in an experiment. Here, we experimentally realize a wide-range offset lock using a beat-note setup combined with electro-optic phase modulation. By using frequency down-conversion of the beat note and locking to sidebands generated by electro-optic modulation, we achieve an offset range of ± 220.1 GHz with offset frequency fluctuations under 0.1 Hz and a phase error variance of 0.017 rad 2 over a 100 kHz bandwidth, greatly widening the range compared to past setups using this method. The relative simplicity of our setup provides a compelling method for locking at offsets in the hundreds of GHz range.

Zhou, Ocean (ORCID:0000000279192636)↗
DOE OSTI2022

Carrier and sampling frequency offset estimation for RF communication with crystal-less nodes

When the ultra-low power mm-scale sensor node does not have a crystal oscillator and phase-lock loop, it inevitably exhibits significant carrier frequency offset (CFO) and sampling frequency offset (SFO) with respect to the reference frequencies in the gateway. This disclosure enables efficient real-time calculation of accurate SFO and CFO at the gateway, thus the ultra-low power mm-scale sensor node can be realized without a costly and bulky clock reference crystal and also power-hungry phase lock loop. In the proposed system, the crystal-less sensor starts transmission with repetitive RF pulses with a constant interval, followed by the data payload using pulse-position modulation (PPM). A proposed algorithm uses a two-dimensional (2D) fast Fourier transform (FFT) based process that identifies the SFO and CFO at the same time to establish successful wireless communication between the gateway and crystal-less sensor nodes.

Kim, Hun-Seok↗
DOE OSTI2021

Compact, All-PM Fiber Integrated and Alignment-Free Ultrafast Yb:Fiber NALM Laser With Sub-Femtosecond Timing Jitter

We report a simple and compact design of a dispersion compensated mode-locked Yb:fiber oscillator based on a nonlinear amplifying loop mirror (NALM). The fully polarization maintaining (PM) fiber integrated laser features a chirped fiber Bragg grating (CFBG) for dispersion compensation and a fiber integrated compact non-reciprocal phase bias device, which is alignment-free. The main design parameters were determined by numerically simulating the pulse evolution in the oscillator and by analyzing their impact on the laser performance. Experimentally, we achieved an 88 fs compressed pulse duration with sub-fs timing jitter at 54 MHz repetition rate and 51 mW of output power with 5.5×10 -5 [20 Hz, 1 MHz] integrated relative intensity noise (RIN). Furthermore, we demonstrate tight phase-locking of the laser's carrier-envelope offset frequency ( fceo ) to a stable radio frequency (RF) reference and of one frequency comb tooth to a stable optical reference at 291 THz.

47 OTHER INSTRUMENTATION↗
DOE OSTI2020

Long-term hybrid stabilization of the carrier-envelope phase

Controlling the carrier envelope phase (CEP) in mode-locked lasers over practically long timescales is crucial for real-world applications in ultrafast optics and precision metrology. We present a hybrid solution that combines a feed-forward technique to stabilize the phase offset in fast timescales and a feedback technique that addresses slowly varying sources of interference and locking bandwidth limitations associated with gain media with long upper-state lifetimes. We experimentally realize the hybrid stabilization system in an Er:Yb:glass mode-locked laser and demonstrate 75 hours of stabilization with integrated phase noise of 14 mrad (1 Hz to 3 MHz), corresponding to around 11 as of carrier to envelope jitter. Additionally, we examine the impact of environmental factors, such as humidity and pressure, on the long-term stability and performance of the system.

47 OTHER INSTRUMENTATION↗
DOE OSTI2023

Implementing an electronic sideband offset lock for isotope shift spectroscopy in radium

We demonstrate laser frequency stabilization with at least 6 GHz of offset tunability using an in-phase/quadrature (IQ) modulator to generate electronic sidebands (ESB) on a titanium sapphire laser at 714 nm and we apply this technique to perform isotope shift spectroscopy of 226 Ra and 225 Ra. By locking the laser to a single resonance of a high finesse optical cavity and adjusting the lock offset, we determine the frequency difference between the magneto-optical trap (MOT) transitions in the two isotopes to be 2630.0 ± 0.3 MHz, a factor of 29 more precise than the previously available data. Using the known value of the hyperfine splitting of the 3 P 1 level, we calculate the isotope shift for the 1 S 0 to 3 P 1 transition to be 2267.0 ± 2.2 MHz, a factor of 8 more precise than the best available value. Our technique could be applied to countless other atomic systems to provide unprecedented precision in isotope shift spectroscopy and other relative frequency comparisons.

47 OTHER INSTRUMENTATION↗
DOE OSTI2025

Injection Locking of Gigahertz‐Frequency Surface Acoustic Wave Phononic Crystal Oscillator

Low-noise gigahertz (GHz) frequency sources are essential for applications in signal processing, sensing, and telecommunications. Surface acoustic wave (SAW) resonator-based oscillators offer compact form factors and low-phase noise due to their short mechanical wavelengths and high-quality (Q) factors. However, their small footprint makes them vulnerable to environmental variation, resulting in their poor long-term frequency stability. Injection locking is widely used to suppress frequency drift of lasers and oscillators by synchronizing to an ultra-stable reference. Here, injection locking of a 1-GHz SAW phononic-crystal oscillator is demonstrated, achieving 40-dB phase noise reduction at low offset frequencies and unperturbed low noise at large offset frequencies. Compared to a free-running SAW oscillator, which typically exhibits frequency drifts of several hundred hertz over minutes, the injection-locked oscillator reduces the frequency deviation to below 0.35 Hz. The locking range and oscillator dynamics is also investigated in the injection pulling region. The demonstrated injection-locked SAW oscillator could find applications in high-performance portable telecommunications and sensing systems.

injection locking↗
DOE OSTI2022

Colliding Pulse Mode Locking and Nonequilibrium Carrier Dynamics within Vertical External-Cavity Surface-Emitting Lasers

The complex nonlinear dynamics of colliding counterpropagating ultrashort laser pulses circulating in a vertical external-cavity surface-emitting ring laser cavity are captured by a first-principles quantum-mechanical microscopic model coupled to an intracavity beam propagator. Furthermore, our numerical simulations establish that overall mode locking stability is sensitive to relative phases and delays of the pulses impinging on the semiconductor saturable absorber mirror. Delay offsets of the counterpropagating pulses lead to asymmetric carrier recovery and instability, often leading in turn to single unidirectional circulating pulses. Although computationally challenging, we also include transverse effects and show that the influence of interference patterns from spatial gratings written by the counterpropagating pulses is significant in stabilizing the modelocked pulses.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2021

A 24-Channel Digitizer With a JESD204B-Compliant Serial Interface for High-Speed Detectors

In this report a 24-channel application-specific integrated circuit (ASIC) for the readout of high-speed CMOS active pixel sensors for charged particle detection is presented. The chip comprises 24 preamplifiers, 24 distinct 12-bit, 25 MSPS Pipelined analog-to-digital converters (ADCs) with self-calibration, an internal phase-locked loop (PLL), and a 3 Gbps serial interface that conforms to the JESD204B standard. To simplify interfacing with a variety of sensors, the ASIC also includes an automatic offset calibration loop. The high level of integration of the ASIC reduces overall system cost and area, and exploiting the signal characteristics of the image sensor allows the ADC to be optimized for reduced power dissipation. The use of an integrated serializer and an industry standard protocol simplifies integration of the ASIC into a complete camera system. The ASIC, called the High-Speed Image Preprocessor Targeted for Electron Readout, or HIPSTER, with a die area of 64.26 mm 2 , is packaged in a 480-ball grid array (BGA) and is fabricated in 180-nm CMOS technology. HIPSTER achieves typical differential nonlinearity (DNL) < 0.55 LSB, input-referred thermal noise of $114.5 μV-rms, and a bit error rate (BER) of better than 10-14. The power dissipation is 98 mW/channel.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2020

A 1.2-V 6-GHz Dual-Path Charge-Pump PLL Frequency Synthesizer for Quantum Control and Readout in CMOS 65-nm Process

This paper presents a low jitter dual-path chargepump phase locked loop (PLL) synthesizer in a CMOS 65-nm process for quantum readout applications. The PLL incorporates a programmable dual chargepump and a loop filter with both proportional and integral paths that can be driven independently providing flexible control of the loop bandwidth to achieve low jitter performance. The design is implemented at 300 K and critical blocks like voltage-controlled oscillator (VCO) and chargepump (CP) are analyzed at 77 K based on the characterized results. The LC-VCO is realized with the class-C NMOS only architecture with 5-bit coarse control and quadrature signals are generated with poly phase filter. The VCO is designed with the tuning range of 1 GHz around the center frequency of 6 GHz with Phase Noise of -123 dBc/Hz and -132 dBc/Hz at 1MHz offset at 300 K and 77 K temperature. The simulated PLL rms jitter is 125 fs at 6 GHz with a power consumption of 8 mW at the 1.2 V power supply.

47 OTHER INSTRUMENTATION↗