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At least 19 records

Circuit for automatic load sharing in parallel converter modules

A nondissipative circuit for automatic load sharing in parallel converter modules having push-pull power transistors is presented. Each transistor has a separate current-sensing transformer and an impedance-adjusting transformer in series with its collector. The impedance-adjusting transformer functions as a current-controlled variable impedance that is responsive to the difference between the peak collector current of the transistor and the average peak current of all collector currents of power transistors in all modules, thereby to control the collector currents of all power transistors with reference to the average peak collector current.

Nagano, S.↗

Low Temperature (30 K) TID Test Results of a Radiation Hardened 128 Channel Serial-to-Parallel Converter

This viewgraph presentation reviews the low temperature, Total Ionizing Dose (TID) tests of radiation hardened serial to parallel converter to be used on the James Webb Space Telescope. The test results show that the original HV583 level shifter - a COTS part -was not suitable for JWST because the supply currents exceeded specs after 20 krad( Si) .The HV584 - functionally similar to the HV583 -was designed using RHBD approach that reduced the leakage currents to within acceptable levels and had only a small effect on the level-shifted output voltage.

Meyer, Stephen↗

Operation of high power converters in parallel

High power converters that are used in space power subsystems are limited in power handling capability due to component and thermal limitations. For applications, such as Space Station Freedom, where multi-kilowatts of power must be delivered to user loads, parallel operation of converters becomes an attractive option when considering overall power subsystem topologies. TRW developed three different unequal power sharing approaches for parallel operation of converters. These approaches, known as droop, master-slave, and proportional adjustment, are discussed and test results are presented.

Decker, D. K.↗

Modeling and Dynamic Analysis of Paralleled dc/dc Converters With Master-Slave Current Sharing Control

A simple, application-oriented, transfer function model of paralleled converters employing Master-Slave Current-sharing (MSC) control is developed. Dynamically, the Master converter retains its original design characteristics; all the Slave converters are forced to depart significantly from their original design characteristics into current-controlled current sources. Five distinct loop gains to assess system stability and performance are identified and their physical significance is described. A design methodology for the current share compensator is presented. The effect of this current sharing scheme on 'system output impedance' is analyzed.

Rajagopalan, J.↗

Operation of high power converters in parallel

Three different unequal power sharing approaches for parallel operation of converters - droop, master-slave, and proportional adjustment - are discussed. The approaches have been incorporated in the breadboard dc-dc converter units used in the space station power management and distribution dc test bed at the Lewis Research Center, where the system operation has been verified.

Decker, D. K.↗

State-plane analysis of parallel resonant converter

A method for analyzing the complex operation of a parallel resonant converter is developed, utilizing graphical state-plane techniques. The comprehensive mode analysis uncovers, for the first time, the presence of other complex modes besides the continuous conduction mode and the discontinuous conduction mode and determines their theoretical boundaries. Based on the insight gained from the analysis, a novel, high-frequency resonant buck converter is proposed. The voltage conversion ratio of the new converter is almost independent of load.

Oruganti, R.↗

A nonsaturating dc-to-dc parallel power converter

Device is conventional circuit modified with pair of diode rectifiers coupled to switching transistors via feedback winding. Transient-causing collector-current overlap between transistors is eliminated. Technique may be used with nonsaturating parallel-transistor converters operating from voltage source which remains fixed or varies over small range.

Lavigna, T.↗

Parallel Stirling Converters Being Developed for Spacecraft Onboard Power

Stirling Technology Co., as part of a NASA Lewis Research Center Phase II Small Business Innovation Research contract, has successfully demonstrated paralleling two thermodynamically independent Stirling converters. A system of four Stirling converters is being developed by NASA and the Department of Energy as an alternative high-efficiency radioisotope power source for spacecraft onboard electric power for NASA deep space missions. The high Stirling efficiency, exceeding 20 percent for this application, will greatly reduce the necessary isotope inventory in comparison to the current radioisotope thermoelectric generators (RTG s), significantly reducing mission cost and risk. Stirling is the most developed converter option of the advanced power technologies under consideration.

Thieme, Lanny G.↗

Phase substitution of spare converter for a failed one of parallel phase staggered converters

Failure detection and substitution of a spare module is provided in a system having a plurality of phase staggered modules connected in parallel to deliver regulated voltage from an unregulated source. Phase control signals applied to the active converter modules are applied to the spare module through NOR gates associated with and disabled by the power output of respective modules such that failure of any one enables its phase control signal to be applied to the spare module, thus controlling the spare module to operate in the phase position of the failed module. A NAND gate detects when any one active module fails and enables a gate in the spare module, thus activating the spare module.

Mclyman, W. T.↗

Charge-coupled-device parallel-to-serial converter

A CCD parallel-to-serial converter comprising two successions of charge transfer stages, recurrently side-loaded with respective ones of parallelly supplied charge packets, then serially unloaded by time-interleaved respective shift register operations. The charge packets converted to time-division-multiplexed serial form are supplied to a shared electrometer, and the electrometer response is de-multiplexed. Preferably, shift register operations are carried forward concurrently at the same rate, but with the final charge transfer stages clocked in phases staggered in time.

Tower, John R.↗

Modeling and Dynamic Analysis of Paralleled of dc/dc Converters with Master-Slave Current Sharing Control

A simple, application-oriented, transfer function model of paralleled converters employing Master-Slave Current-sharing (MSC) control is developed. Dynamically, the Master converter retains its original design characteristics; all the Slave converters are forced to depart significantly from their original design characteristics into current-controlled current sources. Five distinct loop gains to assess system stability and performance are identified and their physical significance is described. A design methodology for the current share compensator is presented. The effect of this current sharing scheme on 'system output impedance' is analyzed.

Rajagopalan, J.↗

Multi-Modulator for Bandwidth-Efficient Communication

A modulator circuit board has recently been developed to be used in conjunction with a vector modulator to generate any of a large number of modulations for bandwidth-efficient radio transmission of digital data signals at rates than can exceed 100 Mb/s. The modulations include quadrature phaseshift keying (QPSK), offset quadrature phase-shift keying (OQPSK), Gaussian minimum-shift keying (GMSK), and octonary phase-shift keying (8PSK) with square-root raised-cosine pulse shaping. The figure is a greatly simplified block diagram showing the relationship between the modulator board and the rest of the transmitter. The role of the modulator board is to encode the incoming data stream and to shape the resulting pulses, which are fed as inputs to the vector modulator. The combination of encoding and pulse shaping in a given application is chosen to maximize the bandwidth efficiency. The modulator board includes gallium arsenide serial-to-parallel converters at its input end. A complementary metal oxide/semiconductor (CMOS) field-programmable gate array (FPGA) performs the coding and modulation computations and utilizes parallel processing in doing so. The results of the parallel computation are combined and converted to pulse waveforms by use of gallium arsenide parallel-to-serial converters integrated with digital-to-analog converters. Without changing the hardware, one can configure the modulator to produce any of the designed combinations of coding and modulation by loading the appropriate bit configuration file into the FPGA.

Gray, Andrew↗

Fast Asynchronous Data Communication Via Fiber Optics

Transmitter and receiver devised for asynchronous digital communication via optical fiber at rates above 100 Mb/s. Transmitter converts parallel data to serial for high-speed transmission; receiver recovers clock signal and converts data back to parallel. No phase-lock loops used. New receiver design avoids over-sampling altogether. Local sampling oscillator operating nominally at clock frequency generates N clock signals of equally spaced phase, used to clock incoming data into N separate shift registers.

Bergman, Larry A.↗

Memory-based frame synchronizer

A frame synchronizer for use in digital communications systems wherein data formats can be easily and dynamically changed is described. The use of memory array elements provide increased flexibility in format selection and sync word selection in addition to real time reconfiguration ability. The frame synchronizer comprises a serial-to-parallel converter which converts a serial input data stream to a constantly changing parallel data output. This parallel data output is supplied to programmable sync word recognizers each consisting of a multiplexer and a random access memory (RAM). The multiplexer is connected to both the parallel data output and an address bus which may be connected to a microprocessor or computer for purposes of programming the sync word recognizer. The RAM is used as an associative memory or decorder and is programmed to identify a specific sync word. Additional programmable RAMs are used as counter decoders to define word bit length, frame word length, and paragraph frame length.

Stattel, R. J.↗

Research on spacecraft electrical power conversion

The steady state characteristics and starting behavior of some widely used self-oscillating magnetically coupled square wave inverters were studied and the development of LC-tuned square wave inverters is reported. An analysis on high amplitude voltage spikes which occur in dc-to-square-wave parallel converters shows the importance of various circuit parameters for inverter design and for the suppression of spikes. A computerized simulation of an inductor energy storage dc-to-dc converter with closed loop regulators and of a preregulating current step-up converter are detailed. Work continued on the computer aided design of two-winding energy storage dc-to-dc converters.

Wilson, T. G.↗

NASA Tech Briefs, June 2011

Topics covered include: Wind and Temperature Spectrometry of the Upper Atmosphere in Low-Earth Orbit; Health Monitor for Multitasking, Safety-Critical, Real-Time Software; Stereo Imaging Miniature Endoscope; Early Oscillation Detection Technique for Hybrid DC/DC Converters; Parallel Wavefront Analysis for a 4D Interferometer; Schottky Heterodyne Receivers With Full Waveguide Bandwidth; Carbon Nanofiber-Based, High-Frequency, High-Q, Miniaturized Mechanical Resonators; Ultracapacitor-Based Uninterrupted Power Supply System; Coaxial Cables for Martian Extreme Temperature Environments; Using Spare Logic Resources To Create Dynamic Test Points; Autonomous Coordination of Science Observations Using Multiple Spacecraft; Autonomous Phase Retrieval Calibration; EOS MLS Level 1B Data Processing Software, Version 3; Cassini Tour Atlas Automated Generation; Software Development Standard Processes (SDSP); Graphite Composite Panel Polishing Fixture; Material Gradients in Oxygen System Components Improve Safety; Ridge Waveguide Structures in Magnesium-Doped Lithium Niobate; Modifying Matrix Materials to Increase Wetting and Adhesion; Lightweight Magnetic Cooler With a Reversible Circulator; The Invasive Species Forecasting System; Method for Cleanly and Precisely Breaking Off a Rock Core Using a Radial Compressive Force; Praying Mantis Bending Core Breakoff and Retention Mechanism; Scoring Dawg Core Breakoff and Retention Mechanism; Rolling-Tooth Core Breakoff and Retention Mechanism; Vibration Isolation and Stabilization System for Spacecraft Exercise Treadmill Devices; Microgravity-Enhanced Stem Cell Selection; Diagnosis and Treatment of Neurological Disorders by Millimeter-Wave Stimulation; Passive Vaporizing Heat Sink; Remote Sensing and Quantization of Analog Sensors; Phase Retrieval for Radio Telescope and Antenna Control; Helium-Cooled Black Shroud for Subscale Cryogenic Testing; Receive Mode Analysis and Design of Microstrip Reflectarrays; and Chance-Constrained Guidance With Non-Convex Constraints.

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