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Results for “phase-locked loops (PLLs)”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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Switching-cycle-based Startup for Grid-connected Inverters

Conventional inverter startups, or grid synchronization, are hindered by slow dynamics and inrush current issues, which impede the integration of more renewable energy resources into the power grid. This paper overcomes the barriers by introducing a novel switching cycle-based startup approach for grid-connected inverters, eliminating the need for voltage sensors and phase-locked loops (PLLs). The proposed method surpasses the bandwidth constraints of traditional PLL-based techniques and achieves grid synchronization in just two switching cycles. Relying solely on sensed three-phase currents, synchronization is accomplished without inrush currents or the need for additional hardware or increased software complexity, resulting in a faster inverter startup. The paper also presents a sensitivity analysis to discuss the impact of critical parameters on the method's accuracy. As a result, the effectiveness of the proposed technique is demonstrated through simulation and experimental results.

14 SOLAR ENERGY↗

An Arbitrary Time Interval Generator Base on Vernier Clocks with 0.67 ps Adjustable Steps Implemented in FPGA

In TDC testing and timing system implementations, it is often necessary to generate signal pulses with finely adjustable time intervals. In delay cell–based schemes, the adjustment resolution is constrained by the propagation delay of the cells—typically 15–20 ps per step—and is sensitive to temperature and supply voltage variations. This document presents a fully digital approach that uses two vernier clocks, generated by two stages of cascaded phase-locked loops (PLLs) with a slight frequency difference, to achieve adjustable timing intervals through accumulated phase differences. The scheme was validated on two families of low-cost FPGA devices, achieving adjustable step sizes of 0.67 ps and 0.97 ps.

Wu, Jin-yuan [Fermilab] (ORCID:0000000344329521)↗

Direct Phase-Angle Detection for Three-Phase Inverters in Asymmetrical Power Grids

This paper introduces a signal reformation based direct phase-angle detection (DPD-SR) technique for three-phase inverters supporting asymmetrical grids. Asymmetries in three-phase systems may happen because of unbalanced three-phase loads, which can lead to the voltage asymmetry at the terminals of grid-tied inverters. The proposed DPD-SR technique can detect the voltage phase-angle under asymmetrical conditions. The DPD-SR technique also offers precise and rapid phase-angle detection via signal reformation and trigonometric functions. In essence, the phase-angle detection is directly derived from the trigonometric properties of the line-line voltages, while signal reformation is implemented to handle asymmetrical voltages. The proposed method measures two line-line voltages and detects the phase-angle of a three-phase system under both symmetrical and asymmetrical conditions. Unlike classical phase-locked loop (PLL) techniques, DPD-SR does not need any closed-loop PI controller, which significantly reduces the complexity and the delay in detecting the phase-angle. In this paper, the efficacy of the proposed technique is examined in comparison with the state-of-the-art PLLs under asymmetrical conditions via a set of laboratory experiments. Here, the performance of the phase-angle detection is also tested as part of an inverter feeding an asymmetrical grid.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Switching-Cycle-Based Startup for Grid-tied Inverters

This paper presents a novel switching cycle-based startup approach that eliminates the need for voltage sensors and phase-locked loops. Here, the proposed method surpasses the bandwidth limitations inherent in traditional PLL-based synchronization techniques and attains grid synchronization of the inverter within two switching cycles. Despite the absence of voltage sensors and PLLs, this synchronization is achieved without inrush currents. Furthermore, the startup method does not necessitate the addition of any hardware or an increase in software complexity. Simulation and experimental results are presented to verify the effectiveness of the proposed method.

42 ENGINEERING↗

Evaluating Methods for Measuring Grid Frequency in Low-Inertia Power Systems: Preprint

Accurate measurement of grid frequency is a critical component of reliable grid control. Traditionally, methods such as phase locked loops (PLLs) and discrete Fourier transforms (DFTs) have been used in inverters and phasor measurement units (PMUs) to measure frequency. However, as the percentage of inverter-based resources (IBRs) such as solar and wind has increased, these conventional frequency measurement methods are proving unable to guarantee reliable control in some cases. One challenge is measuring frequency during transient events, where there is a disruption in the steady state sinusoidal voltage. During these events, the underlying frequency of the grid may barely change, but measurement methods report a large spike in frequency due to the disrupted waveform. New methods must balance between suppressing spikes in frequency during faults, and providing fast, accurate, measurements in all other grid operation conditions, especially during events with high rate-of-change-of frequency (ROCOF), which are more prevalent in high-IBR power systems. This paper first surveys frequency measurement methods that have been proposed to reduce measurement errors during transient events. Then, both conventional and more novel frequency measurement methods are tested against an IEEE standard and industry recommendations, and their performance is evaluated for events simulated in PSCAD. Results quantify the trade-offs in performance during different grid conditions and lead to suggestions for the most appropriate frequency and ROCOF measurement methods for low inertia grids.

frequency↗