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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Tailoring Growth Interfaces of Virtual Substrates for Power Electronics

Power electronics materials are poised to play a critical role in fulfilling next generation energy needs, with up to 90% of future energy demand predicted to flow through power electronics at some point. AlxGa1-xN ranks high among candidate materials, having bipolar dopability, thermal and chemical stability and an ultra-wide bandgap. However, AlGaN growth is limited by a lack of lattice-matched substrates, ultimately stunting material quality at higher thicknesses needed for power electronics applications. Further, high power applications increasingly call for fully vertical device structures, necessitating a conductive substrate. Recently our group identified the (111) plane of TaC as a conductive surface lattice-matched to Al0.55Ga0.45N, taking inspiration from prior work of AlN and GaN binaries on carbide and boride substrates. In this talk we demonstrate the growth of (111)-oriented TaC by RF sputtering. We investigate the interface of TaC with sapphire and SiC substrates and identify means to suppress competing Ta2C nucleation in order to stabilize (111)-oriented TaC. Potential stacking sequences are identified with respect to crystal structure and observed twinning in the TaC films. We next assess structural changes and film recrystallization that results from face-to-face annealing of TaC thin films at high temperatures above 1500 degrees C. Changes to grain structure and domain size are assessed by x-ray diffraction and surface morphology is explored using atomic force microscopy. Figure 1 shows significant improvements to in- and out-of-plane strain following annealing along with the formation of terraced step edges at the film surface. Strain as a function of material composition and thickness is considered, as this may play a major role in future nucleation of AlGaN layers. (1) R. J. in a face-to-face configuration, as illustrated in the schematic at left. Kaplar et al 2017, ECS J. Solid State Sci. Technol. 6 Q3061; (2) D. M. Roberts et al 2022, https://arxiv.org/abs/2208.11769; (3) T. Aizawa et al 2008, J Crys Growth 310, 1 22; (4) R. Liu et al 2002, Appl. Phys. Lett. 81, 3182-3184.

ENGINEERING↗
DOE OSTI2025

A Modified DBC Substrate Improving Thermal Performance for Confined Space Applications

High-power modules use substrates to house the semiconductor device and for electrical insulation. These substrates are constructed with thermally conductive dielectric material sandwiched between two metals to extract heat from semiconductor chips. Thus, the required cooling performance of a power module is linked to the substrate’s thermal performance and can vary based on the substrate technologies. Here, in this study, five substrate technologies were evaluated for space-restricted applications: direct-bonded copper (DBC), an insulated metal substrate (IMS), a thermally annealed pyrolytic graphite (TPG)-based IMS, DBC-based double-sided cooling, and direct-bonded aluminum (DBA) where the heat sink is directly attached without thermal interface materials (TIMs). The finite element (FE) analysis results suggest that the popular DBC substrate has thermal performance better than that of the other substrates for space-constrained applications. To further improve the thermal performance, a modified DBC substrate was proposed where a copper block was added between the semiconductor and the DBC substrate to achieve heat spreading underneath the chip. The modified DBC performance was then compared with the aforementioned substrates and the results showed significant thermal performance improvement. The results were verified with experimental results where the proposed substrate showed 20% more loss handling capability compared to an identical DBC substrate.

42 ENGINEERING↗
DOE OSTI2026

Power Electronic Development Challenges for High Power Density Integrated Electric Drive Applications

The ever-increasing demand for compact, efficient, and high-performance traction drive systems for transportation applications has accelerated the development of integrated electric drives. In these systems, the electric machine and inverter are integrated within a single housing, offering significant advantages in electrical performance, volume, weight, cost, and overall system efficiency. Despite these benefits, such high levels of integration introduce a new set of challenges, particularly in power electronic design and component selection. This article presents an in-depth investigation of a highly integrated electric drive architecture with an internal stator-mounted inverter, highlighting key design considerations and trade-offs aimed exclusively at maximizing system power density.Based on a comprehensive review of the literature, the power density of a voltage-source-inverter-driven electric drive is primarily governed by the volumetric contributions of the power modules, heat sinks, and DC-link capacitors. Accordingly, this work focuses on the optimization of these three critical components to enhance the inverter's overall power density. The proposed design achieves a power density of 100 kW/L, demonstrating the effectiveness of the presented approach for next-generation integrated electric drive systems.

33 ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2025

Robust Avalanche (1.5 kV, 2 kA/cm²) in Vertical GaN Diodes on Patterned Sapphire Substrate

The lack of avalanche capability is a key limitation of current lateral GaN devices. Despite the report of avalanche in vertical GaN-on-GaN devices, the high wafer cost hinders device commercialization. Here, in this work, we demonstrate a circuit-level avalanche in vertical GaN diodes on low-cost patterned sapphire substrate (PSS), with the avalanche voltage (1.57 kV) and avalanche current density (>2 kA/cm 2 ) both being the highest reported in GaN devices on foreign substrates. The PSS enables a lower dislocation density than conventional sapphire substrate and is employed in high-voltage GaN devices for the first time. The avalanche voltage in the circuit test reaches 98% of the parallel-plane limit, further affirming that near-ideal avalanche breakdown can be realized on GaN devices on foreign substrates. These results show the promise of the GaN-on-PSS platform for low-cost, robust power devices.

42 ENGINEERING↗
DOE OSTI2024

Designing Ta C Virtual Substrates for Vertical Al x Ga 1 − x N Power Electronics Devices

Power electronics are critical for a sustainable energy future, playing a key role in electrification and integration of renewable energy sources into the grid. Advances in ultrawide band gap materials are needed to handle higher powers in smaller form factors while reducing electrical and thermal losses. High Al content Al x Ga 1 − x N is theoretically capable of meeting these demands, but its impact in power electronics has been severely restricted by a lack of substrates that can satisfy conductivity, lattice matching, and/or thermal expansion requirements. We demonstrate that electrically conductive Ta C can be used as a virtual substrate for Al x Ga 1 − x N heteroepitaxy. Scaleably sputtered Ta C grown on Al 2 O 3 , followed by high-temperature face-to-face annealing, produces a thin film Ta C template with an effective hexagonal lattice constant matched to Al 0.70 Ga 0.30 N . Annealing of the Ta C promotes recrystallization, significantly improving crystallinity and reducing crystalline defects from as-deposited columnar grains to a step-and-terrace surface morphology, enabling the subsequent growth of high-quality Al 0.70 Ga 0.30 N by molecular beam epitaxy. X-ray diffraction and scanning transmission electron microscopy confirm that the Al x Ga 1 − x N layer is heteroepitaxially aligned, strain-free, and lattice-matched, transitioning abruptly from Ta C to Al x Ga 1 − x N without intermediate phases. These results demonstrate Ta C virtual substrates as electrically conductive, lattice-matched, and thermally compatible templates for vertical Al x Ga 1 − x N devices that can meet the growing power needs of a sustainable energy future. Published by the American Physical Society 2024

36 MATERIALS SCIENCE↗
DOE OSTI2026

Power Electronics Module with Integrated Ceramic Heat Exchanger

NREL, in partnership with Synteris and Packet Digital, has developed a 3D-printable ceramic package for power electronic modules to improve their thermal management, power density, performance, and lifetime. Existing power modules contain flat ceramic substrates that serve as both the electrically insulating component and thermal conductor that transfer the large heat outputs of these devices. The team has developed an additive manufacturing process that replaces the traditional insulating metalized substrate, substrate attach, and baseplate/heat exchanger with an additively-manufactured ceramic packaging that acts as both an electrical insulator and heat exchanger for better thermal management. The design, manufacturability, and function of this power module will be discussed.

25 ENERGY STORAGE↗
DOE OSTI2024

High conductivity coherently strained quantum well XHEMT heterostructures on AlN substrates with delta doping

Polarization-induced two-dimensional electron gases (2DEGs) in AlN/GaN/AlN quantum well high-electron-mobility transistors on ultrawide bandgap AlN substrates offer a promising route to advance microwave and power electronics with nitride semiconductors. The electron mobility in thin GaN quantum wells embedded in AlN is limited by high internal electric field and the presence of undesired polarization-induced two-dimensional hole gases (2DHGs). To enhance the electron mobility in such heterostructures on AlN, previous efforts have resorted to thick, relaxed GaN channels with dislocations. In this work, we introduce n-type compensation δ-doping in a coherently strained single-crystal (Xtal) AlN/GaN/AlN heterostructure to counter the 2DHG formation at the GaN/AlN interface, and simultaneously lower the internal electric field in the well. This approach yields a δ-doped XHEMT structure with a high 2DEG density of ∼3.2×1013 cm−2 and a room temperature (RT) mobility of ∼855 cm2/Vs, resulting in the lowest RT sheet resistance 226.7 Ω/□ reported to date in coherently strained AlN/GaN/AlN HEMT heterostructures on the AlN platform.

Physics↗
DOE OSTI2026

Tunable Multisite Proton-Coupled Electron Transfer Mediators: Distinct Pathways for Substrate Reduction Versus Competing Hydrogen Evolution

Proton-coupled electron transfer (PCET) reagents have emerged as powerful tools for transferring net H atoms to organic substrates from relatively weak X–H bonds. One advantage of employing PCET reagents is the tunability of the X–H bond strength by independently varying their redox potential and/or p K a for selective substrate reductions; however, the rational development of modular catalytic PCET reagents based on these features remains underdeveloped. In this work, we address important mechanistic questions relevant to a dimethylaniline-appended cobaltocene PCET mediator that our lab has previously introduced. Specifically, we examine where protonation occurs within the reactive Co(II, NH) + intermediate of a Brønsted-base modified cobaltocene mediator, whether substrate reduction and hydrogen evolution reaction (HER) proceed by a common or bifurcated mechanistic pathway, and how the redox, acid–base, and structural properties of PCET mediators can dictate their reactivity and selectivity. We show that substrate compatibility can be tuned and, via a model study with N -aryl imine substrates, provide data pointing to a multisite PCET (MS-PCET) pathway. Moreover, we rigorously characterize the site of protonation in the reactive reduced, protonated form of the mediator, and through kinetic analysis establish that the pathway for undesired competing HER is fundamentally different and involves Cp-ring protonation. Our findings point to a high degree of flexibility in the design of reductive PCET mediators.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2026

Performance of Heterostructural TaC/AlGaN Schottky Diodes Based on First Principles Electronic Structure Properties

Advances in ultra-wide bandgap materials, such as high Al-content AlxGa1-xN (AlGaN), are essential for next generation power electronics, but the requirement for lattice matched substrates is currently a significant obstacle. Recently, conductive TaC has emerged as a promising virtual substrate for AlGaN heteroepitaxy, with wurtzite (0001) AlxGa1-xN lattice-matched to rocksalt (111) TaC at x ~ 0.5. Thus, understanding and controlling the electronic properties of the TaC/AlGaN interface is key for developing technological applications based on TaC/AlGaN devices. Using density functional theory and electronic structure calculations, we here investigate TaC/Al0.5Ga0.5N interfaces, where we include explicit alloy models in the slab calculations. We predict the Schottky barrier height and the electric field discontinuity resulting from interface charges. Considering all possible combinations of (Ta, C) substrate termination, (Al/Ga, N) nucleation, and (Al/Ga, N) polarity, we construct a chemical potential phase diagram to identify the stable interfaces that can be accessed through variation of the synthesis conditions. The predicted interface electronic properties are implemented in device performance simulations to demonstrate a practical design for a strain-free, high-efficiency TaC/AlGaN Schottky diode with a low barrier height and without interface charges, underscoring the potential of TaC as a substrate for ultra-wide bandgap devices.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2026

Epitaxy of Beta-Ga2O3 on Highly-Offcut (Greater than 10 Degrees) Substrates

Beta-Ga2O3 has emerged as a leading candidate for next-generation power electronics, radio frequency (RF) switches, and extreme environment electronics due to a wide band gap (4.6 - 4.9 eV), high dopability (approximately 40 meV activation energy for an isolated silicon donor), and melt growth characteristics resulting in commercially available 4-inch substrates and commercial demonstrations of 6-inch substrates by multiple techniques. The (100) surface of Ga2O3 is highly desirable from a device and epitaxy standpoint - bulk growth of (100) material is more scalable than (010), the surface is nearly lattice-matched to p-type partner NiO, and Al2O3 incorporates at higher concentrations without phase separation. However, the epitaxial growth rate on (100) surfaces is less than 10% of other faces due to weak bonding and favorable desorption. Recent demonstrations have shown growth rate improvements from 0.4 nm/min to 1.5 nm/min by growing on (100) wafers that are offcut 6 degrees in the -c direction.1 These films show step-flow growth from (-201) step-edges and high electron mobility. Despite these exciting results, offcuts greater than 6 degrees have not been explored due to the waste associated with grinding and polishing large offcuts. In this talk we will discuss the molecular beam epitaxy (MBE) growth and properties of Beta-Ga2O3 grown on (100) substrates offcut in the -c direction up to 13.4 degrees. These large offcuts are enabled by edge-fed film-defined growth (EFG) where the offcut is grown into the surface by pulling the crystal through the EFG die with the seed crystal rotated by the desired offcut angle. We will demonstrate that 13.4 degrees offcut substrates still exhibit a terraced (100) surface, and that a >10x increase (4.8 nm/min) in growth rate is achieved. As previously reported on lower offcuts, we observe 100% reversal of substrate twin domains around the (001) direction at the substrate-epilayer interface. We will discuss electrical properties including record-low (by MBE) unintentional doping densities of < 5E15 cm-3.

36 MATERIALS SCIENCE↗
DOE OSTI2026

Fast Growth of Ga2O3 on Highly Offcut (100)-Oriented Substrates

Beta-Ga2O3 has emerged as a leading candidate for next-generation power electronics, radio frequency (RF) switches, and extreme environment electronics due to a wide band gap (4.6 - 4.9 eV), high dopability (approximately 40 meV activation energy for an isolated silicon donor), and melt growth characteristics resulting in commercially available 4-inch substrates and commercial demonstrations of 6-inch substrates by multiple techniques. The (100) surface of Ga2O3 is highly desirable from a device and epitaxy standpoint - bulk growth of (100) material is more scalable than (010), the surface is nearly lattice-matched to p-type partner NiO, and Al2O3 incorporates at higher concentrations without phase separation. More importantly, the impact ionization coefficients along the [100] direction are low, leading to the highest possible critical fields. This is advantageous compared to the current state of the art, (001), due to reduced surface defects and increased possible breakdown voltage. However, the epitaxial growth rate on (100) surfaces is less than 10% of other faces due to weak bonding and favorable desorption, and on-axis (100) growth easily forms twin domains. Recent demonstrations have shown growth rate improvements from 0.4 nm/min to 1.5 nm/min by growing on (100) wafers that are offcut 6 degrees in the -c direction. These films show step-flow growth from (20-1) step-edges and high electron mobility due to suppressed twins. Despite these exciting results, offcuts greater than 6 degrees have not been explored due to the waste associated with grinding and polishing large offcuts. In this talk we will discuss the molecular beam epitaxy (MBE) growth and properties of Beta-Ga2O3 grown on (100) substrates offcut in the -c direction up to 13.4 degrees. These large offcuts are enabled by edge-fed film-defined growth (EFG) where the offcut is grown into the surface by pulling the crystal through the EFG die with the seed crystal rotated by the desired offcut angle. We will demonstrate that 13.4 degrees offcut substrates still exhibit a terraced (100) surface, and that a >10x increase (>5 nm/min) in growth rate is achieved. As previously reported on lower offcuts, we observe reversal of substrate twin domains around the (001) direction at the substrate-epilayer interface. We will discuss electrical properties including record-low (by MBE) unintentional doping densities of < 5E15 cm-3 and critical breakdown field in Schottky barrier diodes comparable with state-of-the-art (001) Ga2O3 without edge termination.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Thermal Management of Discretized Heaters Using CuW Microchannel Heat Sinks and FC3283

Single-phase cooling using microchannel heat sinks (MCHS) has become a popular approach for overcoming the thermal challenges associated with high-powered microelectronic devices. Thermal management is one of the largest barriers to higher power densities in electronics and frequently limits overall device performance. The implementation of forced convective cooling via single-phase liquid cooling in MCHS reduces the thermal resistance resulting in lower device temperatures at high-power conditions, which can decrease the package size and extend the lifespan of devices. The goal of the work described in this article was to investigate practical cooling solutions for laser diode bars. This study examined the effectiveness of a copper tungsten (CuW) microchannel heat sink paired with a dielectric coolant (FC3283) for dissipating both discrete and uniform heat fluxes up to 600 W/cm2 across a 0.25-cm2 surface area through a numerical and experimental study. CuW was chosen as the MCHS material because it is thermal expansion matched to GaAs, which is a common laser diode substrate. FC3283 serves as a dielectric coolant that is compatible with power electronics cooling. The microchannels utilized in this work were approximately $365$ $μ$ m deep and $100$ $μ$ m wide resulting in a hydraulic diameter of $160$ $μ$ m. The study investigated the cooling performance across a variety of applied power loads and flow rates to determine optimal effectiveness. The resulting thermal resistance ranged from 0.15 cm2 K/W at the highest flow rate to 0.26 cm2 K/W at the lowest flow rate. Further, the resulting thermal performance from this study demonstrates the importance of considering discrete heat sources separately from uniform heat sources and proved that the unique combination of CuW microchannels with FC3283 can be a promising cooling option toward future advancements of laser diode bars and other high-power microelectronics.

42 ENGINEERING↗
DOE OSTI2024

Controlled Spalling of 4H Silicon Carbide with Investigated Spin Coherence for Quantum Engineering Integration

We detail scientific and engineering advances which enable the controlled spalling and layer transfer of single crystal 4H silicon carbide (4H-SiC) from bulk substrates. 4HSiC’s properties, including high thermal conductivity and a wide bandgap, make it an ideal semiconductor for power electronics. Moreover, 4H-SiC is an excellent host of solid-state atomic defect qubits for quantum computing and quantum networking. Because 4H-SiC substrates are expensive (due to long growth times and limited yield), techniques for removal and transfer of bulk-quality films are desirable for substrate reuse and integration of the separated films. In this work, we utilize updated approaches for stressor layer thickness control and spalling crack initiation to demonstrate controlled spalling of 4H-SiC, the highest fracture toughness crystal spalled to date. We achieve coherent spin control of neutral divacancy (VV 0 ) qubit ensembles and measure a quasi-bulk spin T 2 of 79.7 μs in the spalled films.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2024

Virtual Substrates for Wide Bandgap AlyX1-yN Growth

Lattice-matched substrates are critical for growth of high quality, compositionally-targeted ternary AlyX1-yN compounds with properties suitable for a wide variety of next-generation opto- and power electronic applications. [DOI:10.1149/2.0111702jss] We have identified the (111) plane of transition metal carbides and nitrides as lattice matched "virtual" substrate layers that have additional benefits of electrical conductivity and appropriate coefficients of thermal expansion for nitride layer at both growth and operating temperatures. [arXiv:2208.11769 2022] In this work, (111)-oriented TaC and ZrN are grown by RF sputtering and optimized as substrate layers for AlyGa1-yN and AlyGd1-yN, respectively. TaC is demonstrated as a full proof of concept. (111)-stabilized TaC layers with a rock-salt crystal structure are annealed to improve surface crystal quality and surface morphology and then used as a template for growth of an Al0.7Ga0.3N layer by molecular beam epitaxy. X-ray diffraction (XRD) demonstrates epitaxial registry of the grown layer to the substrate. High resolution transmission electron microscopy (TEM) is used to investigate interface behavior, showing regions of abrupt interface transitions and nitrogen polar termination of the Al0.7Ga0.3N. We also grew (111)-oriented ZrN on Ti-Zr-N graded buffer layers as a lattice-matched virtual substrate for AlyGd1-yN. Structure, morphology, and strain are analyzed using XRD and atomic force microscopy. Structure and quality of initial Al0.8Gd0.2N thin films are investigated for both in-situ and ex-situ growths.

AlyX1-yN↗
DOE OSTI2025

Investigation of CrMnV and CrMnTiV multi principal element alloys thin films for use as exit windows of electron beam accelerators

Here, this study explores CrMnV and CrMnTiV multi principal element alloy (MPEA) films as candidates for electron beam exit windows in industrial, high-power accelerators. Films were deposited via magnetron sputtering on various substrates and exposed to 66 kGy of 10 MeV e-beam irradiation. Structural and mechanical properties were analyzed using FESEM, XRD, and nanoindentation. CrMnTiV films exhibited superior grain uniformity and hardness, regardless of the substrate type. Compared to bulk materials, both MPEA films demonstrated higher hardness and excellent radiation resistance. These results highlight the potential of MPEA films as durable, radiation-tolerant materials for high-performance accelerator exit window applications.

Electron Beam Irradiation↗
DOE OSTI2024

Heterostructural interface engineering for ultrawide-gap nitrides from first principles: Ta C / Al N and Ta C / Ga N rocksalt-wurtzite interfaces

Epitaxial lattice matching is an important condition for the formation of coherent interfaces with low defect densities. However, lattice-matched substrates with the same crystal structure as the active layer are often not available, suggesting opportunities for utilizing heterostructural interfaces. For example, at high Al contents that are interesting for ultrawide-gap applications in power electronics, Al x ⁢Ga 1-x ⁢N semiconductor alloys in the (0001) orientation of the wurtzite (wz) structure become lattice-matched to (111)-oriented rocksalt (rs) Ta⁢C substrates. To predict the expected interface atomic structures under different synthesis conditions, we perform high-throughput density-functional-theory calculations, using an algorithm for systematic sampling of the possible stacking sequences of the atomic layers on the in-plane hexagonal lattice. The approach considers octahedral, tetrahedral, and prismatic coordination motifs, and is generally applicable for the modeling of commensurate rs/wz heterostructural interfaces. Our results provide guidance for synthesis control of substrate-film bonding and the polarity of ultrawide-gap Al x⁢ Ga 1-x⁢ N alloys on Ta⁢C substrates.

36 MATERIALS SCIENCE↗
DOE OSTI2024

SMART SiC Power ICs: Scalable, Manufacturable, and Robust Technology for SiC Power Integrated Circuits (Final Technical Report)

This collaborative project was initiated with the goal of developing Scalable, Manufacturable, and Robust Technology for SiC Power Integrated Circuits (SMART SiC Power ICs). In pursuit of this objective, innovative designs and fabrication processes were implemented, enabling the development of large-scale (>1 cm²) SiC Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuits and high-voltage (400–600 V) lateral power MOSFETs (HV-LDMOS) on 150 mm 4H-SiC substrates. The resulting SMART SiC Power ICs are tailored to support a wide range of applications requiring diverse voltage and power levels, including automotive systems, industrial equipment, electronic data processing, energy harvesting, and power conditioning. To achieve the proposed ‘SMART’ technology for SiC ICs, the team focused on 1) the Development of highly scalable CMOS (with high channel mobilities for n-type and p-type MOSFETs), LDMOS (~600V, 10A rated), and IC technologies, 2) Establishment of a manufacturable process baseline in a production-grade-, 150mm, SiC fabrication facility, and 3) Demonstration of SMART SiC ICs. The project initially comprised of fabricating 5 lots. In lot 1 monolithic integration using a single process was achieved. Here, we were able to successfully accomplish Integrated HV NMOSFET with LV CMOS on N-epi/N+ Substrate. The HV NMOS demonstrated a Breakdown Voltage (BV) more than 600V. Circuit demonstration of CMOS was also another achievement from this lot. In lot 2, priority was in place for isolation and integration. Here we addressed the isolation concerns and integrated the HV NMOS and LV CMOS using the N-epi/P-epi/N+ substrate. Similar to the lot 1, we were able to achieve a BV of 600 V for HV NMOS. Optimized gate oxide process with high channel mobilities, better gate oxide reliability, development of SPICE models, successful ohmic process development, novel wafer area saving design layouts, P+ isolation schemes with channeling implantations and high temperature operational circuits demonstrations are some of the key highlights from lot 1 and lot2. In lot 3, discrete device performances of HV NMOS with a BV ~700V and reliable LV CMOS performances were achieved. Also, novel architectural solutions were successfully implemented to suppress the electric field crowding at the gate oxide for reliable operations. In lot 4, half bridge power driver ICs with a conversion efficiency of (target 90% to 95%) in the 1-5MHz switching frequency range for output power between 25 W to 3 kW have been included in. However, due to the unfortunate events of sudden foundry shutdown (SiCamore Semi) the processing of lot 4 wafers came to a complete stop (January 2024). Arrangements have recently been made to shift the fabrication to another foundry, General Electric Aerospace. The fabrication process now on course (as of December 2024). Characterizations are delayed due to this unfortunate circumstance. The proposed trench architectural-based devices and ICs (lot 5) underwent modifications from the original project proposal. This change was necessitated by limitations in the availability of trench-based processes at commercial production-grade fabrication facilities in the US. Apart from above achievements, a Process Development Kit (PDK) was successfully developed for planar type SiC CMOS/LDMOS.

42 ENGINEERING↗
DOE OSTI2025

Hexagonal Boron Nitride: Physical Properties, Hydride Vapor‐Phase Epitaxy Growth of Large‐Diameter Quasi‐Bulk Wafers and Applications

Hexagonal boron nitride ( h ‐BN), with its ultrawide bandgap and 2D structure, holds an immense promise for advanced semiconductor applications. Scaling bulk crystals to large‐diameter wafers, crucial for complex device fabrication, remains a challenge with high temperature, high pressure, and metal flux solution methods. To address this, recent efforts have focused on hydride vapor‐phase epitaxy (HVPE) for producing large diameter thick h ‐BN quasi‐bulk wafers, reaching hundreds of micrometers. These HVPE‐grown quasi‐bulk crystals exhibit excellent c ‐axis long‐range order. Notably, the in‐plane mobility‐lifetime products for both electrons and holes surpass 10 −4 cm 2 V −1 , which are two orders of magnitude greater than the out‐of‐plane (vertical) values, highlighting the potential for high‐performance devices leveraging superior lateral transport. Lateral detectors fabricated from 100 μm thick B‐10 enriched h‐ BN wafers have achieved a record 60% thermal neutron detection efficiency. Based on its physical properties, h‐ BN appears to be an outstanding material of choice for light‐triggered electronic power switches capable of supporting high ‐ voltage and high ‐ power operations. These recent advancements in large‐diameter h ‐BN quasi‐bulk crystal growth, enabled by HVPE, pave the way for applications spanning deep UV photonics, high‐power electronics, high‐efficiency neutron detection, and quantum information technologies, establishing h ‐BN as both a versatile active semiconductor and an ideal substrate.

Jiang, Hongxing [Department of Electrical and Comp↗