Search NASA⌕ Search

SEARCH · Search NASA

Results for “software architecture design subsystem”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

Logic in Memory Emulator

Logic in Memory Emulator (LiME) is a hardware/software tool specially designed for memory system evaluation and experiment. Emerging memories display a wide range of bandwidths, latencies, and capacities, making it challenging for the computer architect to navigate the design space of potential memory configurations, and for the application developer to assess performance implications of using such memories. With the LiME framework, architectural ideas can be prototyped in great detail yet with sufficient performance to support realistic evaluation on long running applications. LiME consists of two fundamental components: 1) the hardware and OS infrastructure for the emulator, and 2) a suite of benchmark applications to assist in characterizing the performance of current and future computer architectures. Some of the applications have been collected from other open source projects. Uses: Logging, replay and analysis of an application's memory behavior Evaluate impact of emerging memory technology on application performance. Emulate complex memory interactions in whole applications orders of magnitude faster than software simulation. Emulate acceleration hardware co-located with the memory subsystem. Features: Capture and log external memory accesses to a separate off-chip memory device without affecting application execution. Memory traces include the address, length, timestamp, and optionally the data for each transaction. Captured trace data can be saved to an SD card for off-line analysis. Configure a wide range of memory latencies in sub-nanosecond increments that encompass highbandwidth and storage class memories. Specify regions of interest (ROI) in applications to reduce the amount of trace data captured for analysis. Currently supports execution on Xilinx Zynq SoC which integrates an ARM processor with FPGA logic on a single device. Applications can be run under Linux or in bare metal mode on the ARM cores.

Jain, AbhishekK↗

An Integrated Framework for Memory-Centric Analysis: From Trace Collection to Co-Design

The memory wall phenomenon—where advances in processor performance significantly outpace those in memory subsystems—poses a fundamental challenge for contemporary computing systems. In memory-bound applications, memory subsystem behavior dominates performance, yet existing analysis approaches present significant limitations: detailed microarchitectural simulators require days to weeks to simulate modest workloads; hardware performance counters provide only aggregate statistics that obscure temporal and spatial access patterns; and scaled simulation approaches face challenges in capturing certain behaviors that emerge at larger scales. These limitations reflect a processor-centric design philosophy increasingly misaligned with memory-bound workloads where detailed understanding of memory access patterns, cache hierarchy interactions, and contention is critical for effective optimization. This paper presents an integrated framework for memory-centric analysis that enables effective hardware-software co-design. We describe practical trace collection techniques, including hardware-assisted processor tracing with minimal overhead and portable software-based instrumentation with statistical sampling. We present multi-perspective analysis methods that examine memory behavior from temporal, sequential, spatial, and relational viewpoints, revealing distinct optimization opportunities invisible in aggregate metrics. We detail an architectural modeling framework that uses sampled traces with temporal interpolation and confidence-based filtering to evaluate cache and memory configurations. Evaluation on representative benchmarks demonstrates that this framework achieves practical accuracy (L2 cache errors of 2.64\%, confidence-filtered L3 errors of 9.92\%, bandwidth errors of 7.33\%) while providing substantial speedup (26.8×) over cycle-accurate simulation, enabling rapid design space exploration. We demonstrate how this integrated framework enables systematic identification of both hardware optimizations (memory controller tuning, bank partitioning, NUMA configuration) and software optimizations (data layout restructuring, prefetching strategies, memory-aware scheduling). Through this comprehensive treatment of the memory-centric analysis pipeline—from trace collection through architectural modeling to co-design application—we provide researchers and practitioners with practical techniques for addressing memory bottlenecks in contemporary computing systems.

Gajaria, Dhruv Mayur↗

Waste Compliance and Tracking System (WCATS) Version 3 Requirements Document

This document describes the end-user requirements for the Waste Compliance and Tracking System (WCATS) project in accordance with the WCATS Software Quality Management Plan, EPC-WMP-WCATSPLAN-001. The WCATS application shall support the generation, characterization, processing, and shipment of LANL radioactive, hazardous, and industrial waste. Regulatory drivers include RCRA hazardous waste, DOT shipping, NNSA nuclear material control and accountability, DOE nuclear safety, TSDF permit, and transuranic waste certification requirements. The system will utilize a task-based architecture that supports the spectrum of treatment, storage, disposal, administrative, and characterization based unit operations necessary to manage waste from cradle to grave. The application design shall readily accommodate new facilities, processes, workflow, signature requirements, and so forth, via end-user established metadata. WCATS will provide support for representing waste storage and disposal facilities, buildings, rooms, and grid layouts (x, y, z) to support waste and radioactive material inventory management. Nuclear material at risk (MAR), DOE hazard rating (e.g., Category II facility) compliance per DOE-STD-1027, and permit inventory requirements will be configurable for any storage or disposal facility, or waste operation, and the system will automatically evaluate and enforce those requirements. In addition, the application will support the characterization and management of the entire range of hazardous and radioactive wastes (TRU, MTRU, LLW, MLLW, hazardous waste, etc.) that might be colocated or processed at a permitted facility. Some capabilities not found in traditional systems include user-defined tank systems for liquid waste, user-defined work paths (i.e., sequence of operations), and an equipment subsystem for tracking the calibration, maintenance, and inspection of tools used to process waste, such as torque wrenches, scales, pH probes, etc. The application incorporates a desktop and mobile user interface as shown in Figure 1. The mobile interface supports field operations, such as waste item characterization, intra-facility transfers, internal and external audits, and shipment preparation and receipt.

12 MANAGEMENT OF RADIOACTIVE AND NON-RADIOACTIVE W↗

Integrated Heat Exchanger-Phase Change Material Thermal Energy Storage System

The purpose of this study is to experimentally investigate the thermal performance of an innovative thermal energy storage (TES) system that combines the advantages of the phase-change material (PCM)/graphite foam latent heat TES medium developed at Argonne National Laboratory (Argonne) and the internally supported plate-fin (ISPE) cell architecture heat transfer fluid (HTF) flow channels developed at Brayton Energy (Brayton). Several essential tasks were accomplished: (1) Thermal property characterization. Thermal properties of the graphite foam were characterized, providing necessary data for experimental result analysis and numerical simulation. (2) Design and optimization of lab-scale test module. Based on Brayton’s full-scale heat exchanger (HX)-TES system, the experimental test module was designed, optimized, and fabricated. (3) Thermal performance testing and data analysis. Five cycle tests were successfully conducted—including one with approximately 3.5 psig of pressure applied to the diaphragms—to investigate the thermal performance of the experimental test module for charging and discharging. Temperature profiles were generated for each charging test and discharging test as a function of time. The temperature profiles clearly show three TES stages: sensible heat (temperature increase), latent heat (melting), and sensible heat (temperature increase) for the charging process. Similarly, the temperature profiles clearly show three thermal energy release stages: sensible heat (temperature decrease), latent heat (solidification), and sensible heat (temperature decrease). Melting and solidification of the PCM generally occurred in relatively narrow temperature ranges, indicated by the flattened temperature regions in the temperature profiles. These phase changes ranged approximately 3°C for melting and 3.5°C for solidification. The charging and discharging temperature profiles were similar for similar experimental parameter tests whether or not pressure was applied to the diaphragm to eliminate the gap between the HX surface and the TES subsystem. This indicates that the effect of a small gap between the HX surface and the TES subsystem is insignificant for charging and discharging. (4) Comparison of experimental data and simulation results. We compared the experimental data to the numerical simulation results. Numerical simulations were conducted by using the ANSYS FLUENT 2019 R3 commercial computational fluid dynamics software. The predicted phase-change times agreed reasonably well with those from the experimental data. In most cases, the estimated time differences between the relative phase changes were within 16%. The predicted start and end times for the charging process agreed well with those from the experimental data. However, the simulation results showed earlier start and end times than the experimental data for the discharging process. Overall, the experimental data and its comparison with the simulation predictions verified the technical viability of the integrated ISPF HX-PCM/graphite foam latent-heat TES system.

25 ENERGY STORAGE↗