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Results for “space vector pulse width modulation”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

A Digital Three Level Space Vector Modulator for High Frequency Vector Sequence Generation

This letter proposes a digital high-speed three-level space vector pulse width modulator (3L-SVPWM). A conventional 3L-SVPWM is typically computation-based, involving a sequential execution of sub-tasks on a digital signal processor (DSP) based controller. The resulting high computation time of 5.4 μs limits the implementation of additional control blocks for switching frequencies greater than 100 kHz. This is overcome by transforming sub-tasks into digital blocks with 1-0 decisions and simpler arithmetic operations. The sub-task blocks are executed concurrently on a programmable logic device (PLD). Hence, a fast 3L-SVPWM execution in 140 ns is achieved. The proposed digital 3L-SVPWM enables high switching frequency operation of wide bandgap (WBG) device-based 3 L inverters to generate high fundamental frequency waveforms. A finite state machine is an integral part of the proposed implementation with the ability to generate any vector sequence, maximizing the usage of redundant vector states in 3L-SVPWM. Here, the proposed digital 3L-SVPWM operation is demonstrated with a GaN-based 3 L active neutral point clamped (3L-ANPC) inverter. Experimental results are presented at 250 kHz switching frequency to generate vector sequences for center-aligned SVPWM (CA-SVPWM) and common mode voltage reduced SVPWM (CMVR-SVPWM). The results also showcase a high fundamental frequency generation capability of 10 kHz.

active neutral point clamped inverter↗
DOE OSTI2021

Stacked Low-Inertia Converter or Solid-State Transformer: Modeling and Model Predictive Priority-Shifting Control for Voltage Balance

This paper presents control challenges of stacked low-inertia converter (SLIC) or cascaded reduced dc-link solid-state transformer (SST) and proposes a novel model predictive priority-shifting (MPPS) control with implicit modulator and a discrete-time large-signal model for voltage balancing and dc-link regulation. Low-inertia converters, featuring small electrolytic capacitor-less dc links, dramatically reduce cost, size, and weight compared to conventional solutions. However, without a large dc-link buffer, the input and output are tightly coupled, leading to significant control challenges. The control becomes even more challenging with these converters stacked input-series output-parallel (ISOP) for medium-voltage (MV) grid, which causes coupling between the modules besides the coupling within each module. This paper analyzes the multi-objective, multi-degree of freedom control problem, using the modular soft-switching solid-state transformer (M-S4T) as an example of the SLIC. First, distribution of control efforts under controller saturation is critical because multiple control objectives can be conflicting, especially when the module voltages are unbalanced and are being restored. The MPPS can shift the priorities to address this issue. Second, due to the low inertia and high dc-link ripple, classic space vector pulse-width modulation (SVPWM), average model with small-ripple assumption, and control design based on small-signal model cannot accurately modulate, model, and control the nonlinear reduced dc link. Therefore, a discrete-time large-signal model of the M-S4T is established to derive the predictive control in the MPPS. The MPPS and the PI control are compared in MV simulations to show the issue of applying the PI to the SLIC and the effectiveness of the MPPS for voltage balancing and dc-link regulation in a deadbeat manner. Finally, the proposed control is tested on a 5 kV ISOP SiC SST prototype to verify priority shifting to address controller saturation issue and fast and robust voltage balancing.

14 SOLAR ENERGY↗
DOE OSTI2021

A Phase-Disposition PWM Enabled Model Predictive Control for a Nine-Level Inner-Interleaved Hybrid Multilevel Converter

This article brings forward a phase-disposition pulse width modulation enabled model predictive control (PDPWM-MPC) for a nine-level inner-interleaved hybrid multilevel converter (9L-IHMC). Firstly, three layers of virtual space vector diagrams (VSVD) are established based on the sign patterns of the original and virtual reference vectors in the abcframe, respectively, to achieve the phase-disposition pulse width modulation (PD-PWM) in a non-independent three-phase way. Then, three adjacent virtual vectors in the third-layer VSVD, together with their optimized duty cycles, are applied to guarantee the optimal current tracking. Finally, through the use of the duty cycle alternation approach, dc-link and floating capacitors voltages are balanced and circulating currents are mitigated as well. The proposed PDPWM-MPC can not only enable the decoupling of the low-and high-frequency stages in the 9L-IHMC, but also reduce both output current ripples and computational burden. In addition, it can achieve a constant equivalent switching frequency and address the disproportion of power losses associated with the PD-PWM. Here, both simulations and experiments on a silicon carbide device-based prototype substantiate the effectiveness of the proposed control strategy.

42 ENGINEERING↗
DOE OSTI2022

Thermal Stress Reduction in Power Switching Devices Using Distributed Loss PWM Concept for Current Source Inverters

A new modulation scheme is proposed for current source inverters (CSIs) that reduces the variation and peak junction temperature in the CSIs' power devices. The distributed loss pulse-width modulation (DLM) concept is introduced and applied to traditional space vector modulation methods to develop modified modulation schemes that reduce the thermal stress on power devices. The device junction temperatures resulting from conventional and DLM schemes are compared. Simulation and experimental results confirm that the proposed DLM concept reduces thermal stress on the devices while maintaining the same high output current waveform quality compared to traditional CSI modulation schemes. The CSI power device lifetime (i.e., the number of cycles to failure) are estimated using the simulation and experimental results. The proposed DLM significantly increases the device lifetime (by 5 to 6 times) by reducing the junction temperature variation compared to the conventional modulations.

42 ENGINEERING↗
DOE OSTI2024

Simple and Robust Carrier-Based PWM Technique for Single-Stage Three-phase Rectifier Indirect Matrix Converter

Indirect matrix converters (IMC) can offer high efficiency, high power density, and bidirectional power flow capability with a single-stage three-to single-phase AC-AC power conversion integrating a conventional three-phase active rectifier with a primary side full-bridge inverter of a dual active bridge converter. However, the IMCs generally require space vector modulation techniques, leading to complex sectors and dwell times calculations. A practical implementation of the modulation methods with a commonly used digital signal processor becomes even more challenging when considering power factor correction, harmonics reduction, and deadtime between sector transitions. This paper proposes a simple and robust carrier-based pulse width modulation (PWM) technique determined through a voltage-source inverter (VSI) to current-source inverter (CSI) to IMC conversion. This translation enables the adoption of all conventional VSI control methods with active and reactive power control in the IMCs through simple carrier and reference waveform comparison. The VSI vectors are first one-on-one matched with CSI vectors and translated to IMC modulation signals without calculating sectors and dwell times. Nine different carrier waveforms are proposed, and the converter performance is analyzed. Grid current THD and efficiency are estimated for each modulation method. The symmetric A and B methods had the lowest THD of the grid current, 2.80%, and the efficiency remained at approximately 98.3%, making it the most suitable carrier-based method proposed in this paper. The space vector PWM (SVPWM) modulation method was implemented to the DSP and generated the expected twelve gate signals.

Benson, Mikayla↗