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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records

NanoMechanics: Elasticity and Friction in Nano‐Objects

A large scientific and technological effort is underway to investigate the properties of two‐dimensional (2D) materials to become building blocks in integrated nano‐electronic and photonic circuits, composites, coatings, energy harvesting nano‐ systems, nano‐sensors, and nano‐electro‐mechanical systems (NEMS).While several experiments and calculations have revealed exciting novel phenomena in these nanostructures, many scientific and technological questions remain open. In particular, understanding and controlling the structure and mechanical properties of 2D materials at the interface with a solid surface is of key importance to enable the aforementioned nanotechnologies, as well as to fulfill the potential of strain engineering to tailor their properties. The vision of this DoE research program was to investigate novel mechanical properties and phenomena in 1D and 2D materials with the overarching goal of defining a new basic understanding of mechanical behavior in nano and quantum systems. The group of the PI has developed in the last years several studies on the mechanical properties of Carbon nanotubes and oxide nanobelts, more recently the PI has focused her attention on the properties of two‐dimensional materials, such as graphene and MoS 2 , which are a few‐atomic‐layer thick films and hold a great potential for technological and energy applications. The most studied 2D material is graphene, existing as a single layer of graphite or a few‐layer thick epitaxial graphene film. Graphene possesses a large in‐plane Young’s modulus as well as high intrinsic carrier mobility, and high in‐plane thermal conductivity. Besides graphene, also 2D films of graphene oxide (GO), hexagonal Boron Nitride (h‐BN), and transition metal dichalcogenides such as MoS 2 exhibit unique and excellent properties and hold great promise for nanotechnology applications. This research program was aimed at developing a new basic understanding of the mechanical properties of 1D and 2D materials at the interface with solid substrates, with a focus on the role of defects, materials structure, and substrate interaction. Ultimately, we aimed at developing the basic knowledge and experimental tools for manipulating 1D and 2D materials’ structure, stacking, substrate interaction, defects, and number of layers to realize an entirely new class of ultra‐hard, ultra‐thin, and ultra‐light active materials with ad‐ hoc mechanical properties for a variety of applications.

2D Materials↗

Reliability Analysis of Large-Area, Low Pressure-Assisted Silver Sintering for Medium-Voltage Power Modules

Multi-layer insulating ceramic substrates can enable medium-voltage (MV) power modules with reduced peak electric field. This benefit is particularly important for MV silicon carbide (SiC) MOSFETs due to their higher operating voltages. Large-area, low-pressure assisted silver sintering is a potential solution for bonding substrates to create a multi-layer structure. The voiding content and defect density of the bond used to create the multi-layer substrate stack-up is critical to the reliability of the power module and the thermal performance, as this bond is in the primary path for heat dissipation in the power module structure. Here, samples of two-layer direct bonded aluminum (DBA) stacks have been fabricated and subjected to thermal cycling to analyze their reliability. Passive thermal cycling from -40 degrees C to 200 degrees C was performed. Cross-sections were cut at pre-determined intervals and imaged with Scanning Electron Microscopy (SEM). After 1000 thermal cycles, adhesive failures are observed between the sintered silver and the DBA surface. Cross-sections were cut and imaged via optical microscope and SEM. Thermal analyzer measurements are recorded on a 10-kV SiC power module utilizing the sintered DBA substrate stacks.

30 DIRECT ENERGY CONVERSION↗

Lasing characteristics of InAs quantum dot laers on InP substrate

Single-stack InAs self-assembled quantum dots (QD) lasers based on InP substrate have been grown by metalorganic vapor phase epitaxy. The narrow ridge waveguide lasers lased up to 260 K in continuous wave operation, and near room temperature in pulsed mode, with wavelengths between 1.59 to 1.74 mu m.

quantum dot semiconductor laser↗

Room-temperature continuous operation of InAsSb quantum-dot lasers near 2 mu m based on (100) InP substrate

Single-stack InAsSb self-assembled quantum-dot lasers based on (001) InP substrate have been grown by metalorganic vapor-phase epitaxy. The narrow ridge waveguide lasers lased at wavelengths near 2 mu m up to 25 degrees C in continuous-wave operation. At room temperature, a differential quantum efficiency of 13 percent is obtained and the maximum output optical power reaches 3 mW per facet with a threshold current density of 730 A/cm(sup 2). With increasing temperature the emission wavelength is extremely temperature stable, and a very low wavelength temperature sensitivity of 0.05 nm/degrees C is measured, which is even lower than that caused by the refractive index change.

Semiconductor lasers quantum dots↗

High-Efficiency and Low-Carbon Energy Storage and Power Generation System for Electric Aviation

This report summarizes the work performed by University of California San Diego (UCSD) – Honeywell Aerospace (Honeywell) team for the U.S. Department of Energy/Advanced Research Projects Agency-Energy (DOE/ARPA-E) under Phase 1 (April 2021 – October 2023) project, Cooperative Agreement DE-AR0001347 entitled “High-Efficiency and Low-Carbon Energy Storage and Power Generation System for Electric Aviation”. The main objective of this project is to develop and demonstrate an energy storage and power generation (ESPG) system operating on bio liquid natural gas (LNG) for electric aviation applications. The ESPG system concept in this project is a fuel cell, battery, and gas turbine hybrid system that incorporates an innovative solid oxide fuel cell (SOFC) technology. This SOFC technology has two main novel elements: (i) a lightweight and compact stack architecture that consists of cells and cell modules in electrical parallel and series connections (the module design) and (ii) exceptionally high performance, direct methane thin-film cells on porous substrate made by sputtering deposition process. This fuel cell has the specific power and volumetric power density suitable for electric aviation applications. Based on the current status of the SOFC technology, the Phase 1 work focused on the following activities: (i) ESPG System Modeling – to design and optimize an aircraft SOFC-based ESPG system concept that met the performance, weight and cost targets; (ii) Cell Material Development and Scaleup – to demonstrate scalability of the sputtering process for manufacture of thin-film SOFC cells of practical sizes, confirm the exceptional performance of sputtered cells, improve cell stability and durability for operation with hydrogen and methane fuel, and develop a suitable electrically conducting porous substrate to replace the current non-conducting ceramic substrate; (iii) Stack Development – to design and manufacture stack components for the stack architecture, evaluate and select a suitable sealant, and build and operate multi-cell stacks to demonstrate stack operation, and (iv) Technology to Market – to develop business models and commercialization plans, conduct various market and technology analysis and estimate SOFC and ESPG system costs.

25 ENERGY STORAGE↗

Evaluation of Low-Pressure-Sintered Multi-Layer Substrates for Medium-Voltage SiC Power Modules: Preprint

Direct-bonded aluminum (DBA) multi-layer substrates have been fabricated using low-pressure silver sintering. These multi-layer substrates can be used to reduce the peak electric field strength inside power modules. This benefit is particularly important for medium-voltage silicon carbide (SiC) MOSFETs due to their higher operating voltages. The voiding content and defect density of the bond used to create the multi-layer substrate stackup is critical to the thermal performance and reliability of the power module. This work two low-pressure-assisted sintering techniques; one using nano-silver preform and the other using nano-silver paste to bond 23 mm by 49 mm DBA substrates. Scanning acoustic microscopy (C-SAM) is used to evaluate the bond quality after sintering. To evaluate the reliability of the sintered multi-layer substrates, passive thermal cycling from –40 °C to 200 °C was performed. Cross-sections were cut at pre-determined intervals and imaged with Scanning Electron Microscopy (SEM). After 1,000 thermal cycles, minor cracking was observed, but no failures have occurred.

28 EE - Advanced Manufacturing Office (EE-5A)↗

Flexible and Extensive Platinum Ion Gel Condensers for Programmable Catalysis

Catalytic condensers composed of ion gels separating a metal electrode from a platinum-on-carbon active layer were fabricated and characterized to achieve more powerful, high surface area dynamic heterogeneous catalyst surfaces. Ion gels comprised of poly(vinylidene difluoride)/1-ethyl-3-methylimidazolium bis(trifluoromethylsulfonyl) imide were spin coated as a 3.8 μm film on a Au surface, after which carbon sputtering of a 1.8 nm carbon film and electron-beam evaporation of 2 nm Pt clusters created an active surface exposed to reactant gases. Electronic characterization indicated that most charge condensed within the Pt nanoclusters upon application of a potential bias, with the condenser device achieving a capacitance of ∼20 μF/cm 2 at applied frequencies of up to 120 Hz. The maximum charge of ∼10 14 |e – | cm –2 was condensed under stable device conditions at 200 °C on catalytic films with ∼10 15 sites cm –2 . Grazing incidence infrared spectroscopy measured carbon monoxide adsorption isobars, indicating a change in the CO* binding energy of ∼19 kJ mol –1 over an applied potential bias of only 1.25 V. Condensers were also fabricated on flexible, large area Kapton substrates allowing stacked or tubular form factors that facilitate high volumetric active site densities, ultimately enabling a fast and powerful catalytic condenser that can be fabricated for programmable catalysis applications.

Catalysis↗

Ultra high speed image processing techniques

Packaging techniques for ultra high speed image processing were developed. These techniques involve the development of a signal feedthrough technique through LSI/VLSI sapphire substrates. This allows the stacking of LSI/VLSI circuit substrates in a 3 dimensional package with greatly reduced length of interconnecting lines between the LSI/VLSI circuits. The reduced parasitic capacitances results in higher LSI/VLSI computational speeds at significantly reduced power consumption levels.

Anthony, T.↗

Advanced UVOIR Mirror Technology Development (AMTD) for Very Large Space Telescopes

AMTD partner Exelis developed & demonstrated a technique to manufacture a 400 mm thick substrate via stacking and fusing core structural elements to front and back faceplates; making a 40 cm cut-out of a 4 meter diameter 60 kilograms per square meter mirror. This new process offers a lower cost approach for manufacturing large-diameter high-stiffness mirrors.

Postman, Marc↗

Advanced Mirror Technology Development (AMTD): Year Five Status

The Advanced Mirror Technology Development (AMTD) project is in Phase 2 of a multiyear effort initiated in Fiscal Year (FY) 2012, to mature the Technology Readiness Level (TRL) of critical technologies required to enable 4-m-or-larger monolithic or segmented ultraviolet, optical, and infrared (UVOIR) space telescope primary-mirror assemblies for general astrophysics, ultra-high-contrast observations of exoplanets, and National Interest missions. Key accomplishments of 2016/17 include the completion of the Harris Corp approximately 150 Hz 1.5-meter Ultra-Low Expansion (ULE Registered trademark) mirror substrate using stacked core method to demonstrate lateral stability of the stacked core technology, as well as the characterization and validation by test of the mechanical and thermal performance of the 1.2-meter Zerodur (Registered trademark) mirror using the STOP model prediction and verification of CTE homogeneity.

Space Mirror Technology↗

Round superconductor wires

A round superconductor wire and method for fabricating same are disclosed. Embodiments are directed to a round superconductor wire including at least two superconductor tapes wound on a wire former. Each superconductor tape includes: bottom stabilizer and silver layers; substrate disposed above the bottom silver layer; buffer film stack disposed above the substrate; superconductor film disposed above the buffer film stack; top silver layer disposed above the superconductor film; and top stabilizer layer disposed above the top silver layer. At least one of the bottom stabilizer layer, bottom silver layer, substrate, buffer film stack, superconductor film, top silver layer, or top stabilizer layer is of a different width, thickness, or material composition in one of the superconductor tapes than in another of the superconductor tapes. These and other embodiments achieve a round superconductor wire having improved current density in high magnetic field applications when made in small diameters.

Majkic, Goran↗

Hybrid semiconductor-piezoacoustic radiofrequency device

An amplifying radiofrequency device includes a piezoelectric film and a semiconductor amplifier layer. The piezoelectric film is conformed as an acoustic waveguide. The piezoelectric film has a principal acoustic propagation direction parallel to the principal conduction direction of the amplifier layer. Interdigitated transducers are positioned on the piezoelectric film to respectively launch an acoustic wave in response to an input RF signal, and transduce the acoustic wave back to an output RF signal. There is a distance of less than the acoustic wavelength between the semiconductor amplifier layer and the piezoelectric film. The piezoelectric film has a thickness of less than the acoustic wavelength. According to a method for making such a device, a stack of III-V layers is epitaxially grown on a III-V substrate, wherein the stack comprises a first etch stop layer, a second etch stop layer, an amplifier layer, and a contact layer. The stack is bonded to a lithium niobate film. The III-V substrate is removed by etching down to the first etch stop layer. Deposition windows are opened by etching from the first etch stop layer down to the contact layer. Metal contact electrodes are deposited in the deposition windows.

36 MATERIALS SCIENCE↗

Optoelectronic and structural characterization of trapezoidal defects in 4H-SiC epilayers and the effect on MOSFET reliability

To this day, trapezoidal defects are found in clusters and high counts in wafers representing the industry standard in terms of material quality being produced. This study sheds light on the nature, origin, behavior, and impact of this defect on device yield and reliability. Trapezoidal defects in 4H-SiC epitaxial layers were investigated by photoluminescence (PL) imaging, scanning electron microscopy (SEM), cathodoluminescence spectrum imaging (CLSI), SEM electron beam induced current (EBIC) imaging, and by transmission electron microscopy (TEM) observation. The bar-shaped stacking faults were identified by the PL and CL measurements with a peak emission wavelength of 420 and 450 nm. An optoelectronic behavioral study based on the recombination enhanced dislocation glide mechanism revealed how expanding dislocations and stacking faults interact with each other. Combining the luminescence and microscopy results, the nature of the stacking faults was identified as being a combination of Shockley-type and Frank-type stacking faults. The TEM analysis showed that these defects originate from the substrate and the stacking sequences of some of the faults were determined as (…2, 4, 2…) and (…2, 3, 2…) in the Zhdanov's notation by high-resolution TEM. The origin of this defect is speculated based on our results and previous reports. The EBIC imaging showed that the high density of SFs in these towers is a strong site of carrier recombination, which presumably has an impact on the transfer characteristics of SiC devices. Furthermore, these defects have shown to impact metal oxide semiconductor field effect transistors electrical performance via an increase in the on-state resistance depending on the coverage percentage of the tower of defects in the active area of the device.

4H-SiC↗

A wide-band dual-polarized VHF microstrip antenna for global sensing of sea ice thickness

A VHF microstrip patch antenna was developed to achieve a bandwidth of 45 MHz (30%) from 127 MHz to 172 MHz with dual-linear-polarization capability. This microstrip antenna used foam substrates and dual stacked patches with capacitive probe feeds to achieve wide bandwidth. Four such capacitive feeds were used to achieve dual polarizations with less than -20 dB of cross-polarization level. Twenty-four shorting pins were used on the lower patch to achieve acceptable isolation between the four feed probes. This antenna has a measured gain of 8.5 dB at 137 MHz and 10 dB at 162 MHz. By using the Method of Moments technique, multipath scattering patterns were calculated when the antenna is mounted on the outside of a Twin Otter aircraft.

VHF↗

Fabrication Methods for Adaptive Deformable Mirrors

Previously, it was difficult to fabricate deformable mirrors made by piezoelectric actuators. This is because numerous actuators need to be precisely assembled to control the surface shape of the mirror. Two approaches have been developed. Both approaches begin by depositing a stack of piezoelectric films and electrodes over a silicon wafer substrate. In the first approach, the silicon wafer is removed initially by plasmabased reactive ion etching (RIE), and non-plasma dry etching with xenon difluoride (XeF2). In the second approach, the actuator film stack is immersed in a liquid such as deionized water. The adhesion between the actuator film stack and the substrate is relatively weak. Simply by seeping liquid between the film and the substrate, the actuator film stack is gently released from the substrate. The deformable mirror contains multiple piezoelectric membrane layers as well as multiple electrode layers (some are patterned and some are unpatterned). At the piezolectric layer, polyvinylidene fluoride (PVDF), or its co-polymer, poly(vinylidene fluoride trifluoroethylene P(VDF-TrFE) is used. The surface of the mirror is coated with a reflective coating. The actuator film stack is fabricated on silicon, or silicon on insulator (SOI) substrate, by repeatedly spin-coating the PVDF or P(VDFTrFE) solution and patterned metal (electrode) deposition. In the first approach, the actuator film stack is prepared on SOI substrate. Then, the thick silicon (typically 500-micron thick and called handle silicon) of the SOI wafer is etched by a deep reactive ion etching process tool (SF6-based plasma etching). This deep RIE stops at the middle SiO2 layer. The middle SiO2 layer is etched by either HF-based wet etching or dry plasma etch. The thin silicon layer (generally called a device layer) of SOI is removed by XeF2 dry etch. This XeF2 etch is very gentle and extremely selective, so the released mirror membrane is not damaged. It is possible to replace SOI with silicon substrate, but this will require tighter DRIE process control as well as generally longer and less efficient XeF2 etch. In the second approach, the actuator film stack is first constructed on a silicon wafer. It helps to use a polyimide intermediate layer such as Kapton because the adhesion between the polyimide and silicon is generally weak. A mirror mount ring is attached by using adhesive. Then, the assembly is partially submerged in liquid water. The water tends to seep between the actuator film stack and silicon substrate. As a result, the actuator membrane can be gently released from the silicon substrate. The actuator membrane is very flat because it is fixed to the mirror mount prior to the release. Deformable mirrors require extremely good surface optical quality. In the technology described here, the deformable mirror is fabricated on pristine substrates such as prime-grade silicon wafers. The deformable mirror is released by selectively removing the substrate. Therefore, the released deformable mirror surface replicates the optical quality of the underlying pristine substrate.

Toda, Risaku↗

Using electron channeling contrast imaging to inform and improve the growth of high-efficiency GaAs solar cells on nanopatterned GaAs substrates

Patterned substrates provide opportunities for reducing the cost of high-efficiency III-V devices by incorporating mechanically weak layers beneficial for substrate reuse (e.g. by spalling). In this work, the functionality of electron channeling contrast imaging (ECCI) as a tool to efficiently understand and mitigate defect formation is exemplified by developing a process in which high-quality III-V material can be grown on nanopatterned GaAs substrates. Reactive ion etching used in the patterning process was found to damage the GaAs substrate surface, leading to the formation of stacking faults in the epitaxial material as observed by ECCI. Etching the patterned substrates in a 1 NH4OH: 1 H2O2: 50 DI H2O solution for 10 s prior to growth removed the substrate surface damage and stacking faults were no longer present. Growth of solar cell device structures initially produced samples with many macroscale flaws creating shunts in the devices, which complicated the assessment of material quality by device measurements. However, ECCI revealed that the epitaxial material surrounding macroscale flaws was free from any crystallographic defects such as stacking faults and threading dislocations. With this knowledge, we focused on refining the patterning process to eliminate the macroscale flaws. Solar cells were then grown on the improved nanopatterned substrates and exhibited device structures with defect densities less than 5 x 105 cm -2 and average conversion efficiency of 24.8%, nearly identical to devices grown on unpatterned epi-ready substrates (25.0%).

14 SOLAR ENERGY↗

Ferroelectrics everywhere: Ferroelectricity in magnesium substituted zinc oxide thin films

We demonstrate ferroelectricity in Mg-substituted ZnO thin films with the wurtzite structure. Zn 1–x Mg x O films are grown by dual-cathode reactive magnetron sputtering on (111)-Pt // (0001)-Al 2 O 3 substrates at temperatures ranging from 26 to 200 °C for compositions spanning from x = 0 to x = 0.37. X-ray diffraction indicates a decrease in the c-lattice parameter and an increase in the a-lattice parameter with increasing Mg content, resulting in a nearly constant c/a axial ratio of 1.595 over this composition range. Transmission electron microscopy studies show abrupt interfaces between Zn 1–x Mg x O films and the Pt electrode. When prepared at pO 2 = 0.025, film surfaces are populated by abnormally oriented grains as measured by atomic force microscopy for Mg concentrations >29%. Raising pO 2 to 0.25 eliminates the misoriented grains. Optical measurements show increasing bandgap values with increasing Mg content. When prepared on a 200 °C substrate, films display ferroelectric switching with remanent polarizations exceeding 100 μC cm –2 and coercive fields below 3 MVcm –1 when the Mg content is between ~30% and ~7%. Substrate temperature can be lowered to ambient conditions, and when doing so, capacitor stacks show only minor sacrifices to crystal orientation and nearly identical remanent polarization values; however, coercive fields drop below 2 MV/cm. Using ambient temperature deposition, we demonstrate ferroelectric capacitor stacks integrated directly with polymer substrate surfaces.

36 MATERIALS SCIENCE↗