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At least 19 records

Fault Tolerant State Machines

State machines are commonly used to control sequential logic in FPGAs and ASKS. An errant state machine can cause considerable damage to the device it is controlling. For example in space applications, the FPGA might be controlling Pyros, which when fired at the wrong time will cause a mission failure. Even a well designed state machine can be subject to random errors us a result of SEUs from the radiation environment in space. There are various ways to encode the states of a state machine, and the type of encoding makes a large difference in the susceptibility of the state machine to radiation. In this paper we compare 4 methods of state machine encoding and find which method gives the best fault tolerance, as well as determining the resources needed for each method.

encoding↗

Design of an advanced energy management system for microgrid control using a state machine

A state machine is proposed as the solution for an automated microgrid energy management system (EMS) to improve transient performance during transition operations. It characterizes microgrid operation by seven states that cover all the operating modes: two for steady-state operation (grid-connected and islanded), four for transition operation (preparing for disconnection, transitioning to islanding, preparing for reconnection, and transitioning to grid-connected), and one for emergency operation (black-start operation). A unique dispatch algorithm is developed for each state to achieve the control objective, and the transition function is implemented in the state machine as control logics to transition the system from one state to the next. The feasibility and effectiveness of the developed state machine is validated by simulation in MATLAB with an example microgrid, and the test results show excellent performance of the state machine to achieve the target control objective in each state and to improve the system's transient performance during transition operation.

36 MATERIALS SCIENCE↗

Classification and regression models of audio and vibration signals for machine state monitoring in precision machining systems

Here we present a data-driven method for monitoring machine status in manufacturing processes. Audio and vibration data from precision machining are used for inference in two operating scenarios: (a) variable machine health states (anomaly detection); and (b) settings of machine operation (state estimation). Audio and vibration signals are first processed through Fast Fourier Transform and Principal Component Analysis to extract transformed and informative features. These features are then used in the training of classification and regression models for machine state monitoring. Specifically, three classifiers (K-nearest neighbors, convolutional neural networks and support vector machines) and two regressors (support vector regression and neural network regression) were explored, in terms of their accuracy in machine state prediction. It is shown that the audio and vibration signals are sufficiently rich in information about the machine that 100% state classification accuracy could be accomplished. Data fusion was also explored, showing overall superior accuracy of data-driven regression models.

42 ENGINEERING↗

Using Pipelined XNOR Logic to Reduce SEU Risks in State Machines

Single-event upsets (SEUs) pose great threats to avionic systems state machine control logic, which are frequently used to control sequence of events and to qualify protocols. The risks of SEUs manifest in two ways: (a) the state machine s state information is changed, causing the state machine to unexpectedly transition to another state; (b) due to the asynchronous nature of SEU, the state machine's state registers become metastable, consequently causing any combinational logic associated with the metastable registers to malfunction temporarily. Effect (a) can be mitigated with methods such as triplemodular redundancy (TMR). However, effect (b) cannot be eliminated and can degrade the effectiveness of any mitigation method of effect (a). Although there is no way to completely eliminate the risk of SEU-induced errors, the risk can be made very small by use of a combination of very fast state-machine logic and error-detection logic. Therefore, one goal of two main elements of the present method is to design the fastest state-machine logic circuitry by basing it on the fastest generic state-machine design, which is that of a one-hot state machine. The other of the two main design elements is to design fast error-detection logic circuitry and to optimize it for implementation in a field-programmable gate array (FPGA) architecture: In the resulting design, the one-hot state machine is fitted with a multiple-input XNOR gate for detection of illegal states. The XNOR gate is implemented with lookup tables and with pipelines for high speed. In this method, the task of designing all the logic must be performed manually because no currently available logic synthesis software tool can produce optimal solutions of design problems of this type. However, some assistance is provided by a script, written for this purpose in the Python language (an object-oriented interpretive computer language) to automatically generate hardware description language (HDL) code from state-transition rules.

Le, Martin↗

Design of a State Machine for Smooth Microgrid Transition Operation

A state machine is proposed in the energy management system (EMS) of a microgrid as the solution for smooth microgrid's transition operation. This state machine includes six 'states' that cover all the operating modes during the microgrid's transition operation: two basic modes (grid-connected and islanded) and four temporary modes (preparing for disconnection, transition to islanding, preparing for resynchronization, and transition to grid-connected). Temporary modes are designed to fine-tune the control references for the microgrid assets to avoid harmful transients during microgrid transitions, therefore achieving smooth transition operation. The developed state machine is validated by simulation in MATLAB with a sample microgrid, and the test results show excellent performance of the state machine and smooth microgrid transition operation.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Fault-Tolerant Coding for State Machines

Two reliable fault-tolerant coding schemes have been proposed for state machines that are used in field-programmable gate arrays and application-specific integrated circuits to implement sequential logic functions. The schemes apply to strings of bits in state registers, which are typically implemented in practice as assemblies of flip-flop circuits. If a single-event upset (SEU, a radiation-induced change in the bit in one flip-flop) occurs in a state register, the state machine that contains the register could go into an erroneous state or could hang, by which is meant that the machine could remain in undefined states indefinitely. The proposed fault-tolerant coding schemes are intended to prevent the state machine from going into an erroneous or hang state when an SEU occurs. To ensure reliability of the state machine, the coding scheme for bits in the state register must satisfy the following criteria: 1. All possible states are defined. 2. An SEU brings the state machine to a known state. 3. There is no possibility of a hang state. 4. No false state is entered. 5. An SEU exerts no effect on the state machine. Fault-tolerant coding schemes that have been commonly used include binary encoding and "one-hot" encoding. Binary encoding is the simplest state machine encoding and satisfies criteria 1 through 3 if all possible states are defined. Binary encoding is a binary count of the state machine number in sequence; the table represents an eight-state example. In one-hot encoding, N bits are used to represent N states: All except one of the bits in a string are 0, and the position of the 1 in the string represents the state. With proper circuit design, one-hot encoding can satisfy criteria 1 through 4. Unfortunately, the requirement to use N bits to represent N states makes one-hot coding inefficient.

Naegle, Stephanie Taft↗

State Machine Operation of Complex Systems

Operation of complex systems which depend on one or more other systems with many process variables often operate in more than one state. For each state there may be a variety of parameters of interest, and for each of these, one may require different alarm limits, different archiving needs, and have different critical parameters. Relying on operators to reliably change 10s-1000s of parameters for each system for each state is unreasonable. Not changing these parameters results in alarms being ignored or disabled, critical changes missed, and/or possible data archiving problems. To reliably manage the operation of complex systems, such as cryomodules (CMs), Fermilab is implementing state machines for each CM and an over-arching state machine for the PIP-II superconducting linac (SCL). The state machine transitions and operating parameters are stored/restored to/from a configuration database. Proper implementation of the state machines will not only ensure safe and reliable operation of the CMs, but will help ensure reliable data quality. A description of PIP-II SCL, details of the state machines, and lessons learned from limited use of the state machines in recent CM testing will be discussed.

43 PARTICLE ACCELERATORS↗

State Machine Operation of Complex Systems

Operation of complex systems which depend on one or more other systems with many process variables often operate in more than one state. For each state there may be a variety of parameters of interest, and for each of these, one may require different alarm limits, different archiving needs, and have different critical parameters. Relying on operators to reliably change 10s-1000s of parameters for each system for each state is unreasonable.Not changing these parameters results in alarms being ignored or disabled, critical changes missed, and/or possible data archiving problems.To reliably manage the operation of complex systems, such as cryomodules (CMs), Fermilab is implementing state machines for each CM and an over-arching state machine for the PIP-II superconducting linac (SCL). The state machine transitions and operating parameters are stored/restored to/from a configuration database. Proper implementation of the state machines will not only ensure safe and reliable operation of the CMs, but will help ensure reliable data quality. A description of PIP-II SCL, details of the state machines, and lessons learned from limited use of the state machines in recent CM testing will be discussed.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

State Machine Operation of Complex Systems

Operation of complex systems which depend on one, or more, sub-systems with many process variables often operate in more than one state. For each state there may be a variety of parameters of interest, and for each of these, one may require different alarm limits, different archiving needs, and have different critical parameters. Relying on operators to reliably change 102-105 parameters for each system for each state is unreasonable. Not changing these parameters results in alarms being ignored or disabled, critical changes missed, and/or data archiving inefficiencies. To reliably manage the operation of complex systems, such as cryomodules (CMs), Fermilab is implementing state machines for each CM and an over-arching state machine for the PIP-II superconducting LINAC (SCL). The state machine transitions and operating parameters are stored/restored to/from a configuration database. Proper implementation of the state machines will not only ensure safe and reliable operation of the CMs, but will help ensure reliable data quality. A description of PIP-II SCL, details of the state machines, and plans for imminent use the state machines for CM testing will be discussed.

43 PARTICLE ACCELERATORS↗

Compositional Reasoning for Hierarchical State Machines

Harel statecharts and its derivatives are popular graphical languages for specifying discrete control systems via hierarchical state machines. Separately, there has been a long line of work on specifying concurrent systems with process calculi which come equipped with an algebraic theory, the ability reason compositionally about various temporal properties, and strong type systems. While these two approaches to modeling systems are tantalizingly similar, the integrated reasoning principles that exist for process calculi have not been demonstrated in hierarchical state machines. A key issue is that operational theories for process calculi do not behave like control systems, and thus, there is virtually no tool support for modeling control systems with such languages. For a control system designer, bringing the integrated, more scalable reasoning from the process calculi to state-machine languages would enable the specification of more complex systems and a more modular systems development process. Our insight is that we can recover many important results from the process calculi in hierarchical state machines with local scope. We employ a structural operational semantics, which is ubiquitous in process and 𝜆-calculi but uncommon in hierarchical statemachine formalizations, to enable inductive reasoning about behavior. Taking inspiration from the structure of process calculi metatheories, we define a calculus of refinement and equivalence that we prove sound with respect to local notion of (bi)simulation. Furthermore, we prove that the calculus preserves the behavioral properties of reactivity, observational determinism, traces, and linear temporal properties. Our results are mechanized in the Rocq proof assistant.

97 MATHEMATICS AND COMPUTING↗

Non-Destructive State Machine Reverse Engineering

Most of the integrated circuits (ICs) that are in electronic systems today are based on state machines. We are taking advantage of this to develop a hardware reverse engineering method that discovers the IC’s underlying state machine, rather than its transistors and gates. While there are other methods for destructively reverse engineering ICs or for non-destructively characterizing ICs, our method offers a fast and accurate analysis while remaining non-destructive. To do this, we present an intelligent brute-force method of exploring the logic of the IC using only the input and outputs designed into the IC - the I/O pins. From this exploration, we can apply a folding algorithm to discover the designed state machine.

counterfeit↗

State Machine Modeling of the Space Launch System Solid Rocket Boosters

The Space Launch System is a Shuttle-derived heavy-lift vehicle currently in development to serve as NASA's premiere launch vehicle for space exploration. The Space Launch System is a multistage rocket with two Solid Rocket Boosters and multiple payloads, including the Multi-Purpose Crew Vehicle. Planned Space Launch System destinations include near-Earth asteroids, the Moon, Mars, and Lagrange points. The Space Launch System is a complex system with many subsystems, requiring considerable systems engineering and integration. To this end, state machine analysis offers a method to support engineering and operational e orts, identify and avert undesirable or potentially hazardous system states, and evaluate system requirements. Finite State Machines model a system as a finite number of states, with transitions between states controlled by state-based and event-based logic. State machines are a useful tool for understanding complex system behaviors and evaluating "what-if" scenarios. This work contributes to a state machine model of the Space Launch System developed at NASA Ames Research Center. The Space Launch System Solid Rocket Booster avionics and ignition subsystems are modeled using MATLAB/Stateflow software. This model is integrated into a larger model of Space Launch System avionics used for verification and validation of Space Launch System operating procedures and design requirements. This includes testing both nominal and o -nominal system states and command sequences.

model-based systems engineering↗

PLA realizations for VLSI state machines

A major problem associated with state assignment procedures for VLSI controllers is obtaining an assignment that produces minimal or near minimal logic. The key item in Programmable Logic Array (PLA) area minimization is the number of unique product terms required by the design equations. This paper presents a state assignment algorithm for minimizing the number of product terms required to implement a finite state machine using a PLA. Partition algebra with predecessor state information is used to derive a near optimal state assignment. A maximum bound on the number of product terms required can be obtained by inspecting the predecessor state information. The state assignment algorithm presented is much simpler than existing procedures and leads to the same number of product terms or less. An area-efficient PLA structure implemented in a 1.0 micron CMOS process is presented along with a summary of the performance for a controller implemented using this design procedure.

Gopalakrishnan, S.↗

Finite-state machines as elements in control systems.

Demonstration that approximate solutions to certain classes of differential and difference equations can be expressed in form of finite state machines. Based on this result, a finite-state machine model of an adaptive gain changer in an aircraft stability augmentation system is developed. Results of simulated flights using the finite-state machine gain changer are presented.

Burgin, G. H.↗