Switching Transition Analysis and Optimization for Bidirectional CLLC Resonant DC Transformer
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Novel Quadratic High Gain Boost Converter With Adaptive Soft-Switching Scheme and Reduced Conduction Loss
In this article, an improved soft-switching quadratic boost converter is proposed. Instead of inserting an additional active clamp or auxiliary zero-voltage transition circuit at the switching node, the proposed topology connects the high-voltage switching node to the input diode node by replacing one of the input diodes with a low-rated switch. The proposed topology can attain soft-switching condition for all the switches and input diode turns- off under zero-current switching (ZCS). The operation of input-side switch not only aids zero-voltage switching (ZVS) turn- on for the main switch but also helps in reducing the conduction loss. Also, the input-side switch operates under ZCS turn- on and ZVS turn- off , making it a loss economical solution. An adaptive timing scheme for driving the input switch is proposed, which can ensure soft-switching condition under varying gain and load range. The detailed operational modes, analysis, and design considerations of the proposed topology are presented. A 250 W hardware prototype is built to validate the performance of the proposed converter operating at 100 kHz switching frequency. Results with adaptive soft-switching scheme shows that the converter is modulated to achieve its best efficiency condition under various system conditions. Furthermore, a peak efficiency of 96.1% at 155 W and efficiencies above 95.75% over a wide load range are achieved using all Si devices.
14 SOLAR ENERGY↗
Triple Phase-Shift Optimization of SiC-based Dual-Active Bridge DC/AC Converter
This paper presents a loss-optimized Triple Phase-Shift (TPS) switching strategy for Dual-Active Bridge (DAB) based converters. The proposed strategy considers minimizing total converter loss with respect to minimizing device rms cur-rents, enabling Zero-Voltage Switching (ZVS) turn-on of devices and accurate control of device turn-off current. A model for switching currents is presented, followed by a loss model and optimization strategy. A 1.3kV/100kW prototype based on SiC MOSFETs was used in this work and experimental results up to 10kW show the proposed TPS strategy to be more efficient for operation.
Vetrivelan, Adithyan↗
Current-Source Solid-State DC Transformer Integrating LVDC Microgrid, Energy Storage, and Renewable Energy Into MVDC Grid
Solid-state DC transformer to integrate low-voltage DC (LVDC) microgrid, wind turbine (WT) generator, photovoltaic (PV), and energy storage (ES) into medium-voltage (MV) direct-current (MVDC) distribution grids is attractive. This paper proposes current-source DC solid-state transformer (SST) for MVDC collection system in WT, PV, and ES farms or as an interface between the MVDC grid and the LVDC microgrid. Compared to conventional current-source converter (CSC) based SSTs, a switch reduction scheme on reverse-blocking device bridges is proposed to reduce device count and the number of devices on the DC-link current path. Importantly, the proposed switch reduction scheme is generic and can be applied to the DC ports of DC-AC, AC-DC, or DC-DC hard-switching or soft-switching CSC-based SSTs. Based on this scheme, the proposed current-source DC SSTs are derived, which have reduced electrolytic-capacitor-less DC-link. The proposed DC SSTs also achieve single-stage isolated DC-DC or DC-AC conversion, full-range zero-voltage switching (ZVS) for main switches, zero-current switching (ZCS) for resonant switches, and controlled dv/dt. The proposed DC SSTs, operating principles, predictive control method, the ZVS, and the controlled dv/dt under voltage buck-boost ranges are verified with MV simulations and an experimental prototype based on SiC MOSFETs, diodes, and a nanocrystalline transformer.
14 SOLAR ENERGY↗
New Modulation and Impact of Transformer Leakage Inductance on Current-Source Solid-State Transformer
This article presents a novel modulation scheme for device voltage stress mitigation and comprehensive analysis of the impact of transformer leakage inductance in a current-source solid-state transformer (SST). Different from dual active bridge (DAB) SST, the operation of the current-source SST is similar to that of a flyback converter. The device bridge on only one side of the transformer is active to store energy into or release energy from the magnetizing inductance which acts as a current-source dc link. Such flyback operation with reverse-blocking switches can lead to additional device voltage stress and incomplete zero-voltage switching (ZVS) on the current-source soft-switching solid-state transformer (S4T) under conventional modulation. A new modulation scheme is proposed to address this issue. Moreover, different from the DAB, the leakage inductance of the medium-frequency transformer (MFT) in the S4T is a parasitic element similar to that in a matrix SST and can cause additional device voltage stress. Though the resonant capacitors, originally added to achieve ZVS, can absorb and recycle the leakage energy in the S4T, these capacitors need to be increased with larger leakage inductances to limit the voltage stress. However, large resonant capacitors can result in more lost duty cycles and reduced efficiency. The impact of such leakage inductance on device voltage stress is analyzed comprehensively, which is critical to guide future research and design of the S4T. Experimental results from S4T prototypes for DC-DC, multiport AC-DC, and AC-AC conversion with 1:1 and 4:1 MFT comprehensively verify the proposed concepts. Lastly, a case study of a three-phase AC-AC S4T over a power range from 1 kVA to 100 kVA each module reveals that the MFT leakage inductance should be less than 1% of the magnetizing inductance for safe operation.
14 SOLAR ENERGY↗
PWM for Simultaneous Minimization of Switching Losses and CM Voltage in Current Source Inverters
This article proposes a new pulsewidth modulation (PWM) scheme that reduces common-mode (CM) voltage and switching losses simultaneously in CSI. The proposed PWM [i.e., reduced voltages PWM (RVM)] reduces CM voltages and switching losses by selecting the optimal zero current vector and PWM sequence based on the CSI output voltage conditions. This article also proves the proposed RVM achieves both objectives (i.e., reduced CM voltage and switching losses) simultaneously for all CSI operating conditions without compromising the other objective. The proposed RVM inherently achieves zero-voltage switching (ZVS) conditions during the zero current vector transitions, further reducing the switching losses. Experimental results demonstrate significant reductions in CM voltage, reaching up to approximately 95%, accompanied by an increase of up to about 5.5% in CSI efficiency across a wide operating range compared to alternative PWM methods, confirming the predicted advantages of the proposed RVM.
42 ENGINEERING↗
Device Voltage Stress from Ground Leakage Current in Medium-Voltage Solid-State Transformer
Grounding related issues are critical for safe and reliable operation of solid-state transformer (SST) in medium-voltage (MV) applications, e.g., solar photovoltaic and energy storage integration, date center, electric vehicle fast charging, etc. This article presents for the first time the issue of additional device voltage stress due to grounding-loop current in current-source SST, using the soft-switching solid-state transformer (S4T) as an example. The S4T features single-stage isolated AC-AC, AC-DC, or DC-DC conversion with full-range ZVS, derived from flyback converter or current-source converter (CSC). However, the flyback operation for CSC-based SST means that magnetizing current flows through the reverse-blocking devices on only one side of the medium-frequency transformer (MFT) at a time. Then, the voltages across the devices, especially those on the other side of the MFT, can be influenced by parasitic current. A parasitic model of a modular S4T (M-S4T) prototype is developed from direct measurements and datasheets. Using the developed parasitic model and equivalent circuits, the causes of the voltage stress are analyzed. A voltage-stress mitigation scheme of connecting additional grounding capacitors is proposed. Damping resistors are also installed to damp out the grounding-loop resonance. A robust parameter design of the proposed scheme is given. The existence of the voltage stress issue and the effectiveness of the proposed scheme are verified experimentally on an MV SiC M-S4T prototype with inherent parameter variations among the five modules in the prototype. Here, both single-module and stacked-module operation are demonstrated during steady state and dynamic conditions up to 4 kV peak.
42 ENGINEERING↗
7.2 kV Three-Port SiC Single-Stage Current-Source Solid-State Transformer With 90 kV Lightning Protection
This article proposes a multiport modular single-stage current-source solid-state transformer (SST) for applications like photovoltaic, energy storage integration, electric vehicle fast charging, data center, etc. The 7.2 kV 50 kVA current-source SST consists of five input-series output-parallel modules, each based on 3.3 kV SiC reverse-blocking MOSFET-plus-diode modules. The proposed SST has some unique features. First, compared to the voltage-source or matrix converter-based SSTs, the current-source SST has a unique advantage of single-stage isolated AC/DC or AC/AC conversion with an inductive DC link, but no medium-voltage (MV) AC experiments have been reported. This article for the first time demonstrates MV AC current-source SST up to 7.5 kV peak. Second, the multiport SST has a buffer port for active power decoupling (APD) or energy storage integration. The double-line-frequency power ripple from single-phase AC grid normally results in a large capacitor size in MV SSTs. The APD scheme is proposed in MV applications for the first time to enable a reduced DC link and the electrolytic capacitor-less SST with high reliability. Third, as a direct grid-connected converter without line-frequency transformer, insulation and protection are critical. A medium-frequency transformer design passes 55 kV basic-insulation level (BIL) and 60 kV high potential dielectrics withstand test with only 0.09% leakage inductance. Importantly, a lightning protection scheme is presented to protect the SST itself from 90 kV BIL impulse. Fourth, the proposed current-source SST topology is a modular soft-switching solid-state transformer (M-S4T) with full-range zero-voltage switching and controlled dv/dt for low electromagnetic interference. Furthermore, these concepts are verified in a three-port M-S4T prototype with forced oil cooling under single-module, stacked-module, steady-state, and dynamic operations.
14 SOLAR ENERGY↗