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Avizienis, A. A.

Publications and source records attributed to Avizienis, A. A..

Fault-tolerant computer study

A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed.

Rennels, D. A.

Fault-tolerant computer system

More reliable computers could be assembled by connecting four proposed VSLI "building block" circuits with built-in error detection to standard microprocessors and memory devices to form self checking computer module. Each building block detects its own malfunctions and single bit errors found in memory.

Avizienis, A. A.

Modeling transient faults in TMR computer systems

In this paper we report the development of a technique for modeling transient faults in redundant computer systems. Transient faults are characterized by their arrival rate and their duration. Fault detection, transient recovery, and the effect of permanent faults are included. A fault occurrence/recovery status state diagram is drawn to illustrate the operational status of the system while undergoing faults. The state diagram is used to formulate the equations for the mission failure probability. The techniques are then applied to a triple modular redundant computer system.

Merryman, P. M.

Low-cost coding techniques for digital fault diagnosis

Published report discusses fault location properties of arithmetic codes. Criterion for effectiveness of given code is detection probability of local fault by application of checking algorithm to results of entire set of algorithms of processor. Report also presents analysis of arithmetic codes with low-cost check algorithm which possesses partial fault-location properties.

Avizienis, A. A.

Self testing and repairing computer - A concept

STAR computer has five redundant modular function units, fixed store, arithmetic, memory, input, and output. Each unit is connected to a diagnostic control unit, each is coded for error detection and error correction. Separation into function units permits assembly of many different systems from the set of units.

Avizienis, A. A.