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NASA NTRS · 19810010149

Fault-tolerant computer study

Abstract

A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed.

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BibTeXRIS

Rennels, D. A., Avizienis, A. A., Ercegovac, M. D.. 1981-02-01. Fault-tolerant computer study. https://ntrs.nasa.gov/citations/19810010149

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