Engineering topics

Ercegovac, M. D.

Publications and source records attributed to Ercegovac, M. D..

7 records

NASA NTRS1985

Performance evaluation of a simulated data-flow computer with low-resolution actors

Basic problems related to the exploitation of parallelism in a program include sequencing of the instructions and communication of the data. It is pointed out that the data-flow approach offers an elegant solution to the sequencing problem, since all data dependencies are automatically handled and only instructions with ready input sets are activated. It is shown that a change in the level of subcomputations (actors) affects communications costs. The concept of variable resolution is discussed, and the testbed environment is examined. Attention is given to the architecture of the processing elements, the communication network, and the simulators. A description of the analytical model is also provided. Simulation and results are discussed, taking into account test programs and allocation, the variation of the number of processing elements, the variation of the resolution in directed acyclic graphs, performance in processing loops, and array handling.

Gaudiot, J. L.↗

NASA NTRS1984

Dataflow computing approach in high-speed digital simulation

New computational tools and methodologies for the digital simulation of continuous systems were explored. Programmability, and cost effective performance in multiprocessor organizations for real time simulation was investigated. Approach is based on functional style languages and data flow computing principles, which allow for the natural representation of parallelism in algorithms and provides a suitable basis for the design of cost effective high performance distributed systems. The objectives of this research are to: (1) perform comparative evaluation of several existing data flow languages and develop an experimental data flow language suitable for real time simulation using multiprocessor systems; (2) investigate the main issues that arise in the architecture and organization of data flow multiprocessors for real time simulation; and (3) develop and apply performance evaluation models in typical applications.

Ercegovac, M. D.↗

NASA NTRS1983

A functional language approach in high-speed digital simulation

A functional programming approach for a multi-microprocessor architecture is presented. The language, based on Backus FP, its intermediate form and the translation process are discussed and illustrated with an example. The approach allows performance analysis to be performed at a high level as an aid in program partitioning.

Ercegovac, M. D.↗

NASA NTRS1983

General approaches for achieving high speed computations

The basic organizational approach to achieve high speed computations has been to execute several instructions concurrently. Various algorithmic structures and related computer organizations have been identified and used for this purpose. Each of them is better suited for some classes of applications, provides a potential speed-up with respect to the sequential computer, and suffers from degradation factors that reduce the effective speed-up obtained. The basic algorithmic structures are presented, the corresponding computer organizations described and the potential degradation factors identified. Also included are considerations related to the cost of the system and to the corresponding programming methodology.

Lang, T.↗

NASA NTRS1983

Functional language and data flow architectures

This is a tutorial article about language and architecture approaches for highly concurrent computer systems based on the functional style of programming. The discussion concentrates on the basic aspects of functional languages, and sequencing models such as data-flow, demand-driven and reduction which are essential at the machine organization level. Several examples of highly concurrent machines are described.

Ercegovac, M. D.↗

NASA NTRS1982

A scheme for handling arrays in data-flow systems

An examination of the effects of atomicity (higher resolution) on the performance of array processors (data-flow computers) is presented. Data-flow principles are reviewed, noting the reliance on parallel processing using functional languages to specify sequencing of the operations. Techniques are described for eliminating the necessity of copying whole arrays between processing steps, thereby reducing the number of store cycles. The method involves setting whole columns to specific values rather than individual elements. The individual column values can be processed in parallel, i.e., a locally optimized condition exists. A drawback of the system is the need for more low level arguments, to identify the appropriate processing sequences, and high system complexity.

Gaudiot, J.-L.↗

NASA NTRS1981

Fault-tolerant computer study

A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed.

Rennels, D. A.↗