Engineering topics

Farnsworth, D. L.

Publications and source records attributed to Farnsworth, D. L..

6 records

NASA NTRS1981

Monolithic CCD-array readout

Circuit is self-biasing, with differential current-to-voltage conversion. CMOS current-differencing readout consists of dc-balanced pair of virtual ground stages and current-differencing circuit similar to circuit mirror. Triode multiplier cell replaces test sources to form monolithic configuration. Transistors belonging to selected multiplier cell need to be duplicated for each multiplier within correlator chip. Remaining elements form part of readout and may be scaled as single common readout stage.

Farnsworth, D. L.↗

NASA NTRS1976

Solid-state current transformer

A signal transformation network which is uniquely characterized to exhibit a very low input impedance while maintaining a linear transfer characteristic when driven from a voltage source and when quiescently biased in the low microampere current range is described. In its simplest form, it consists of a tightly coupled two transistor network in which a common emitter input stage is interconnected directly with an emitter follower stage to provide virtually 100 percent negative feedback to the base input of the common emitter stage. Bias to the network is supplied via the common tie point of the common emitter stage collector terminal and the emitter follower base stage terminal by a regulated constant current source, and the output of the circuit is taken from the collector of the emitter follower stage.

Farnsworth, D. L.↗

NASA NTRS1975

Camera memory study for large space telescope

Specifications were developed for a memory system to be used as the storage media for camera detectors on the large space telescope (LST) satellite. Detectors with limited internal storage time such as intensities charge coupled devices and silicon intensified targets are implied. The general characteristics are reported of different approaches to the memory system with comparisons made within the guidelines set forth for the LST application. Priority ordering of comparisons is on the basis of cost, reliability, power, and physical characteristics. Specific rationales are provided for the rejection of unsuitable memory technologies. A recommended technology was selected and used to establish specifications for a breadboard memory. Procurement scheduling is provided for delivery of system breadboards in 1976, prototypes in 1978, and space qualified units in 1980.

Hoffman, C. P.↗

NASA NTRS1972

Development of an image converter of radical design

A long term investigation of thin film sensors, monolithic photo-field effect transistors, and epitaxially diffused phototransistors and photodiodes to meet requirements to produce acceptable all solid state, electronically scanned imaging system, led to the production of an advanced engineering model camera which employs a 200,000 element phototransistor array (organized in a matrix of 400 rows by 500 columns) to secure resolution comparable to commercial television. The full investigation is described for the period July 1962 through July 1972, and covers the following broad topics in detail: (1) sensor monoliths; (2) fabrication technology; (3) functional theory; (4) system methodology; and (5) deployment profile. A summary of the work and conclusions are given, along with extensive schematic diagrams of the final solid state imaging system product.

Irwin, E. L.↗

NASA NTRS1971

Isolated-line commutator-amplifier

Commutator device combines several individual signal-input lines into single output line. Its desirable characteristics are - low input impedances, high output impedance, very high forward-to-reverse transmission ratios, and minimal gating spike coupling to either the inputs or the output.

Farnsworth, D. L.↗

NASA NTRS1969

Modification to improve self-isolating transistor arrays

Fabrication process improves the size ratio and shape factor of the base region of self-isolating transistor arrays. Basic processing steps in the modified method include, sub-diffusion, epitaxial layer growth, isolation-diffusions, enhancement diffusions, aluminum interconnect deposition, and testing and packaging.

Farnsworth, D. L.↗