NASA NTRS · 19800000307
Monolithic CCD-array readout
Abstract
Circuit is self-biasing, with differential current-to-voltage conversion. CMOS current-differencing readout consists of dc-balanced pair of virtual ground stages and current-differencing circuit similar to circuit mirror. Triode multiplier cell replaces test sources to form monolithic configuration. Transistors belonging to selected multiplier cell need to be duplicated for each multiplier within correlator chip. Remaining elements form part of readout and may be scaled as single common readout stage.
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Farnsworth, D. L., Lampe, D. R., Shutt, T. J.. 1981-01-01. Monolithic CCD-array readout. https://ntrs.nasa.gov/citations/19800000307
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