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Grunthaner, Paula J.

Publications and source records attributed to Grunthaner, Paula J..

Growth Of Delta-Doped Layer On Silicon CCD

Response to ultraviolet light enhanced. Back-side-illuminated silicon charge-coupled device fabricated exhibiting nearly 100 percent internal quantum efficiency in near ultraviolet, by using molecular beam epitaxy to grow thin crystalline-silicon layer containing high concentration of boron (p-type dopant). By confining dopant atoms to one or few atomic layers in silicon lattice, concentration-vs.-depth profile made to resemble Dirac delta function, and resulting silicon layer said to be "delta-doped."

Hoenk, Michael E.↗

Growth of delta-doped layers on silicon CCD/S for enhanced ultraviolet response

The backside surface potential well of a backside-illuminated CCD is confined to within about half a nanometer of the surface by using molecular beam epitaxy (MBE) to grow a delta-doped silicon layer on the back surface. Delta-doping in an MBE process is achieved by temporarily interrupting the evaporated silicon source during MBE growth without interrupting the evaporated p+ dopant source (e.g., boron). This produces an extremely sharp dopant profile in which the dopant is confined to only a few atomic layers, creating an electric field high enough to confine the backside surface potential well to within half a nanometer of the surface. Because the probability of UV-generated electrons being trapped by such a narrow potential well is low, the internal quantum efficiency of the CCD is nearly 100% throughout the UV wavelength range. Furthermore, the quantum efficiency is quite stable.

Hoenk, Michael E.↗

Silicon sample holder for molecular beam epitaxy on pre-fabricated integrated circuits

The sample holder of the invention is formed of the same semiconductor crystal as the integrated circuit on which the molecular beam expitaxial process is to be performed. In the preferred embodiment, the sample holder comprises three stacked micro-machined silicon wafers: a silicon base wafer having a square micro-machined center opening corresponding in size and shape to the active area of a CCD imager chip, a silicon center wafer micro-machined as an annulus having radially inwardly pointing fingers whose ends abut the edges of and center the CCD imager chip within the annulus, and a silicon top wafer micro-machined as an annulus having cantilevered membranes which extend over the top of the CCD imager chip. The micro-machined silicon wafers are stacked in the order given above with the CCD imager chip centered in the center wafer and sandwiched between the base and top wafers. The thickness of the center wafer is about 20% less than the thickness of the CCD imager chip. Preferably, four titanium wires, each grasping the edges of the top and base wafers, compress all three wafers together, flexing the cantilever fingers of the top wafer to accommodate the thickness of the CCD imager chip, acting as a spring holding the CCD imager chip in place.

Hoenk, Michael E.↗

Silicon Holder For Molecular-Beam Epitaxy

Simple assembly of silicon wafers holds silicon-based charge-coupled device (CCD) during postprocessing in which silicon deposited by molecular-beam epitaxy. Attains temperatures similar to CCD, so hotspots suppressed. Coefficients of thermal expansion of holder and CCD equal, so thermal stresses caused by differential thermal expansion and contraction do not develop. Holder readily fabricated, by standard silicon processing techniques, to accommodate various CCD geometries. Silicon does not contaminate CCD or molecular-beam-epitaxy vacuum chamber.

Hoenk, Michael E.↗

Growth of a delta-doped silicon layer by molecular beam epitaxy on a charge-coupled device for reflection-limited ultraviolet quantum efficiency

Low-temperature silicon molecular beam epitaxy is used to grow a delta-doped silicon layer on a fully processed charge-coupled device (CCD). The measured quantum efficiency of the delta-doped backside-thinned CCD is in agreement with the reflection limit for light incident on the back surface in the spectral range of 260-600 nm. The 2.5 nm silicon layer, grown at 450 C, contained a boron delta-layer with surface density of about 2 x 10 exp 14/sq cm. Passivation of the surface was done by steam oxidation of a nominally undoped 1.5 nm Si cap layer. The UV quantum efficiency was found to be uniform and stable with respect to thermal cycling and illumination conditions.

Hoenk, Michael E.↗

Pinhole-free growth of epitaxial CoSi.sub.2 film on Si(111)

Pinhole-free epitaxial CoSi.sub.2 films (14') are fabricated on (111)-oriented silicon substrates (10) with a modified solid phase epitaxy technique which utilizes (1) room temperature stoichiometric (1:2) codeposition of Co and Si followed by (2) room temperature deposition of an amorphous silicon capping layer (16), and (3) in situ annealing at a temperature ranging from about 500.degree. to 750.degree. C.

Lin, True-Lon↗

Deposition Of Pinhole-Free CoSi2 Film

New fabrication method produces pinhole-free film of cobalt silicide on silicon substrate. In new method, cobalt and silicon evaporated from electron-beam sources onto substrate of silicon having <111> crystal orientation. Materials deposited in stoichiometric ratio of two silicon atoms to one of cobalt, yielding single-crystal CoSi2 film 5 to 10 nm thick. Layer of amorphous silicon 1 to 2 nm thick deposited on CoSi2. Specimen then annealed at 550 degree C for 10 min. Absence of pinholes critical to operation of multilayer devices employing CoSi2 layers, such as metal base transistor.

Lin, True-Lon↗

Molecular-Beam Epitaxy Of CrSi2 on Si(111)

Crystalline layers grown in commercial apparatus. Experiments show CrSi2 grown on (111) face of single-crystal Si substrate by molecular-beam epitaxy. Epitaxial CrSi2 produced thus far not in desired single-crystal form. Because CrSi2 semiconductor with band gap of 0.3 eV, experimental process potential for monolitic integration of microelectronic devices based on CrSi2 (e.g., infrared detectors) with signal-processing circuitry based on Si.

Fathauer, Robert W.↗