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Hsu, I.-S.

Publications and source records attributed to Hsu, I.-S..

The VLSI design of an error-trellis syndrome decoder for certain convolutional codes

A recursive algorithm using the error-trellis decoding technique is developed to decode convolutional codes (CCs). An example, illustrating the very large scale integration (VLSI) architecture of such a decode, is given for a dual-K CC. It is demonstrated that such a decoder can be realized readily on a single chip with metal-nitride-oxide-semiconductor technology.

Reed, I. S.↗

The VLSI implementation of a Reed-Solomon encoder using Berlekamp's bit-serial multiplier algorithm

Realization of a bit-serial multiplication algorithm for the encoding of Reed-Solomon (RS) codes on a single VLSI chip using NMOS technology is demonstrated to be feasible. A dual basis (255, 223) over a Galois field is used. The conventional RS encoder for long codes often requires look-up tables to perform the multiplication of two field elements. Berlekamp's algorithm requires only shifting and exclusive-OR operations.

Hsu, I.-S.↗