Engineering topics
Publications and source records attributed to Kim, Hak.
Finite state-machines (FSMs) are used to control operational flow in application specific integrated circuits (ASICs) and field programmable gate array (FPGA) devices. Because of their ease of interpretation, FSMs simplify the design and verification process and consequently are significant components in a synchronous design.
An informative session regarding SRAM FPGA basics. Presenting a framework for fault injection techniques applied to Xilinx Field Programmable Gate Arrays (FPGAs). Introduce an overlooked time component that illustrates fault injection is impractical for most real designs as a stand-alone characterization tool. Demonstrate procedures that benefit from fault injection error analysis.
In this presentation, we provide a brief glimpse at preliminary single event test results taken from two years of testing of the Xilinx V5QV Field Programmable Gate Array (FPGA). This presentation includes an overview of test philosophy and implementation.
This study was undertaken to determine the single event effect (SEE) susceptibility of the commercial silicon carbide 1200V Schottky diode manufactured by Cree, Inc. Heavy-ion testing was conducted at the Texas A&M University Cyclotron Single Event Effects Test Facility (TAMU). Its purpose was to evaluate this device as a candidate for use in the Solar-Electric Propulsion flight project.
In this summary, we have shown that diodes are susceptible to destructive single-event effects, and that these failures occur along the guard ring. By determining the last passing voltages, a safe operating area can be derived. By derating off of those values, rather than by the rated voltage, like what is currently done with power MOSFETs, we can work to ensure the safety of future missions. However, there are still open questions about these failures. Are they limited to a single manufacturer, a small number, or all of them? Is there a threshold rated voltage that must be exceeded to see these failures? With future work, we hope to answer these questions. In the full paper, laser results will also be presented to verify that failures only occur along the guard ring.
We show examples of single event functional interrupt and destructive failure in modern POL devices. The increasing complexity and diversity of the design and process introduce hard SEE modes that are triggered by various mechanisms.
We present results on heavy-ion and proton irradiations for commercial SiGe BiCMOS operational amplifiers: LTC6400-20 from Linear Technology and THS4304 from Texas Instruments. We found that the devices are susceptible to heavy-ion-induced SETs. The SET cross-sections increase with increasing operating frequency. The LTC6400 exhibits a LET(sub th) < 7.4 MeV·sq cm/mg for frequencies ranging from 10 to 1000 MHz. The THS4304 exhibits a LET(sub th) < 4.4 MeV·sq cm/mg at 200 MHz; the LET(sub th) decreases with increasing frequency. The significance of the SETs also increases with frequency. The SETs at 1000 MHz can erase several signal cycles. We al.so found that the LTC6400 is relatively robust against 198 and 54 MeV protons. We did not observe angular sensitivity from the proton irradiations.
Single-event gate rupture (SEGR) is a potentially catastrophic failure mechanism of power MOSFETs biased in the off-state. In part due to the severity of-SEGR consequences and in part due to the difficulty of accurated SEGR rate estimation, SEGR mitigation me1hodologies emphasize risk avoidance, using heavy-ion accelerator testing to define safe operating conditions for a surface-incident linear energy transfer {LET). This "safe-operating area" (SOA) within which the device may be biased without experiencing SEGR is then often derated by a prescribed factor to ensure low risk of SEGR. Although research in 1996 indicated that such LET-based SEGR hardness requiremen1s could provide false assurance of safe operation unless one also considered· ion energy], most mission SEGR requirements are still specified in terms of surface-incident LET. Moreover, terrestrial SEGR tests at a given surface-incident LET are limited by the small number of ion species and energies available at heavy-ion accelerators. In comparison, the on-orbit radiation environment is composed of all of the naturally-occurring elements with peak fluxes at nearly GeV/nucleon energies. The primary objective of this study is to examine whether typical derating of high-energy heavy-ion accelerator test data bounds the risk for SEGR from higher-energy on-orbit ions with the mission LET requirement.
This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.
As with other bipolar analog devices, voltage regulators are known to be sensitive to single event transients (SET). In typical applications, large output capacitors are used to provide noise immunity. Therefore, since SET amplitude and duration are generally small, they are often of secondary importance due to this capacitance filtering. In low voltage applications, however, even small SET are a concern. Over-voltages may cause destructive conditions. Under-voltages may cause functional interrupts and may also trigger electrical latchup conditions. In addition, internal protection circuits which are affected by load as well as internal thermal effects can also be triggered from heavy ions, causing dropouts or shutdown ranging from milliseconds to seconds. In the case of FPGA power supplies applications, SETS are critical. For example, in the case of Actel FPGA RTAX family, core power supply voltage is 1.5V. Manufacturer specifies an absolute maximum rating of 1.6V and recommended operating conditions between 1.425V and 1.575V. Therefore, according to the manufacturer, any transient of amplitude greater than 75 mV can disrupt normal circuit functions, and overvoltages greater than 100 mV may damage the FPGA. We tested five low dropout voltage regulators for SET sensitivity under a large range of circuit application conditions.
We present radiation data, Total Ionizing Dose and Single Event Effects, on the LSI Logic 0.11 micron commercial process and two modified versions of this process. Modified versions include a buried layer to guarantee Single Event Latchup immunity.
We have irradiated engineering samples of Freescale 4M nonvolatile memories with heavy ions. They use Silicon nanocrystals as the storage element, rather than the more common floating gate. The irradiations were performed using the Texas A&M University cyclotron Single Event Effects Test Facility. The chips were tested in the static mode, and in the dynamic read mode, dynamic write (program) mode, and dynamic erase mode. All the errors observed appeared to be due to single, isolated bits, even in the program and erase modes. These errors appeared to be related to the micro-dose mechanism. All the errors corresponded to the loss of electrons from a programmed cell. The underlying physical mechanisms will be discussed in more detail later. There were no errors, which could be attributed to malfunctions of the control circuits. At the highest LET used in the test (85 MeV/mg/sq cm), however, there appeared to be a failure due to gate rupture. Failure analysis is being conducted to confirm this conclusion. There was no unambiguous evidence of latchup under any test conditions. Generally, the results on the nanocrystal technology compare favorably with results on currently available commercial floating gate technology, indicating that the technology is promising for future space applications, both civilian and military.
Abstract-Two types of single event effects - bit errors and single event functional interrupts - were observed during heavy-ion testing of the AD8151 crosspoint switch. Bit errors occurred in bursts with the average number of bits in a burst being dependent on both the ion LET and on the data rate. A pulsed laser was used to identify the locations on the chip where the bit errors and single event functional interrupts occurred. Bit errors originated in the switches, drivers, and output buffers. Single event functional interrupts occurred when the laser was focused on the second rank latch containing the data specifying the state of each switch in the 33x17 matrix.