Engineering topics
Publications and source records attributed to Lilley, R. W..
Hardware documentation is provided for the modified LORAN-C timing module, which uses direct software control in determining loop sample times. Computer loading is reduced by eliminating polled operation of the timing loop.
Full hardware documentation is provided for the circuit card implementing the Loran-C timing loop, and the receiver event-mark and re-track functions. This documentation is to be combined with overall receiver drawings to form the as-built record for this device. Computer software to support this module is integrated with the remainder of the receiver software, in the LORPROM program.
Hardware documentation is provided for the modified LORAN-C timing module, which uses interrupt-driven software control in determining loop sample times. Computer loading is reduced by eliminating polled operation of the timing loop.
An automatic gain control has been designed and fabricated to operate with the Loran-C prototype receiver and data collection system.
The design, fabrication and evaluation of a prototype Loran-C receiver is described. Hardware, and microcomputer programming for addition of area navigation capability are reported. The receiver is an envelope processor, offering simplicity of RF processor circuitry.
Prototype equipment was developed for flight evaluation which provides enroute navigation in both latitude-longitude and rho-theta coordinates. The nonprecision approach capabilities of this equipment was evaluated. The antenna/preamplifier coupler, the RF processor, tracking loop hardware, tracking loop software, and the video output are discussed. Laboratory and flight test results are evaluated.
Schematic diagrams are presented for the microcomputer processing for Loran-C. Diagrams are included for the following: microcomputer Loran-C loop improvements; Loran-C receiver commutated AGC; and DC-DC power supply.
Investigations have been conducted regarding the techniques required for Loran-C navigation with application to the general-aviation pilot. The goal has been to produce prototype equipment for flight evaluation which will provide enroute navigation in both latitude-longitude and rho-theta coordinates and to evaluate the nonprecision approach capabilities of such equipment. In connection with the considered project, a prototype Loran-C receiver has been flight-tested using a variety of flight paths, with and without simultaneous ground radar position data collection. Attention is given to a receiver overview, an antenna preamplifier/coupler, the Loran-C receiver RF processor, the tracking loop hardware, tracking loop programming, video output, the laboratory and flight evaluation, and work currently in progress.
Loran-C time-difference data were collected on January 9, 1979 during a flight from Athens, Ohio to Madison VOR in Connecticut, thence to Millville VOR in New Jersey, and a landing at Atlantic City NAFEC. Portions of the return trip to Athens, Ohio were also recorded. Loran-C GRI data frames were recorded using the 99600 U. S. Northeast Loran chain stations Seneca/Nantucket (TDA) and Seneca/Carolina Beach (TDB). The GRI sequence number TDA and TDB were recorded as integer numbers, with the TD's in integer microseconds. Actual time-of-day can be determined from the data start time, plus the time per GRI and the sequence number. The low cost Loran-C receiver was used to obtain the time-difference data for each GRI. Data was recorded on digital magnetic tape and post-processed into latitude and longitude using an IBM system/370 computer.
A microprocessor-based development system was designed and fabricated for prototype test of navigation receiver designs. During use of this system in the development of low-cost LORAN-C receiver/processor concepts, the limitations of the integral KIM-1 display were severely felt. It was to augment this numerical display that the video character display was produced. The circuit design presented meets the need for a flexible-format display capable of driving a small standard video monitor with only minimal demands upon microprocessor memory and MPU cycles.
The design and operation of a microprocessor interface unit which allows use of a computer terminal for communication at 110 or 300 baud both with a central host computer and with the microprocessor monitor are documented. Additionally, the interface permits the host computer to load the microprocessor memory directly with object code, avoiding the use of intermediate data storage such as paper tape. The central computer, containing an assembler language processor for the target microcomputer, can be used from the terminal with all the flexibility offered by the virtual machine facility, producing object code for the micro plus program listings and supporting outputs. The object code can then be loaded directly to the micro and the same terminal device used to run the micro program, communicating with the micro's monitor routine.
The LORAN program is stored in CMS disk files for use by Avionics Engineering Center terminal users. A CMS EXEC file named LORAN controls program operation. The user types LORAN and the program then prompts for data input and produces output on the terminal. The FORTRAN program refers to a disk file of LORAN master data giving station locations, coding delays, repetition rate and station pair identification letters. For Geographic-to-LORAN conversion, no iterative computations are required; the program is a straightforward coordinate conversion based upon the techniques described by the Navy. For LORAN-to-Geographic conversion, the original Navy program required a dead-reckoned position, near the actual unknown fix, to begin computations. No iteration was performed to obtain the LORAN fix, but internal program errors occurred at execution time if the dead-reckoned fix were displaced from the actual fix by more than a few minutes of latitude or longitude. In order to enhance usefulness of the program for the terminal user, an iterative routine was added which allows a single dead-reckoned position to be entered from the master data file for each LORAN chain. The results compare exactly with the LORAN-C navigation chart, and provide adequate benchmark data for general aviation flight planning and data analysis.
The JOLT (TM) commercial microcomputer, based on the MOS Technology 6502 processor chip, for use in Omega navigation system is evaluated. A computer program was prepared in hand-assembled code to demonstrate receiver operation. The processor provides binary processing with interrupts enabled, a carriage return is given to initialize the teleprinter, and a jump is performed to enter the program loop to wait for an interrupt. The program loop operates continuously testing the interrupt flag. The interrupt routine reads the receiver status word and determines whether the current time-slot is the A slot. If so, the interrupt flag, which is also the data index pointer, is reset to zero. The status word is stored in the status buffer. If the time-slot is not A, the interrupt flag/pointer is incremented by one to index the phase and status to the proper buffer words for later use by the print routine.
Design of low-cost, microcomputer-based navigation receivers, and the assembler are described. The development of computer software for microprocessors is materially aided by the assembler program using mnemonic variable names. The flexibility of the environment provided by the IBM's Virtual Machine Facility and the Conversational Monitor System, make possible the convenient assembler access. The implementation of the assembler for the microprocessor chip serves a part of the present need and forms a model for support of other microprocessors.
A hardware interface which allows both digital and analog data output from the JOLT microcomputer is described in the context of a software-based Omega Navigation receiver. The interface hardware described is designed for output of six (or eight with simple extensions) bits of binary output in response to a memory store command from the microcomputer. The interface was produced in breadboard form and is operational as an evaluation aid for the software Omega receiver.
The Ohio University Omega Prototype Receiver is currently under final design and construction. As initially designed, digital and analog hardware outputs were provided for attachment of tape recorders or chart recording equipment for capture of Omega LOP data. The interface described was designed to demonstrate the concept of direct microprocessor attachment to the existing receiver to allow far more flexibility of output data handling than previously provided.
The application of a low cost, commercially available microcomputer as the navigation processor for a simplified OMEGA navigation system is an area of current research. The interface of a low cost front end OMEGA sensor is described and an example of the phase processing software and navigation routines is given. Emphasis is placed on the description of results obtained with the software version of the OMEGA burst filter known as the memory aided phase locked loop.
A memory test program is described for use with the JOLT microcomputer 4,096-word memory board used in development of an Omega navigation receiver. The program allows a quick test of the memory board by cycling the memory through all possible bit combinations in all words.